JP2003218287A - Board for mounting semiconductor element and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a board for mounting a semiconductor element whose thermal expansion coefficient is close to that of silicon, and whose rigidity is high even when this board is light and thin, and to provide a method for manufacturing the board. <P>SOLUTION: This board for mounting a semiconductor comprises a core base board 10 configured of fiber strengthening metal, an insulating layer 14 formed on the core base board 10, and a wiring layer 20 formed on the insulating layer 14. Thus, it is possible to configure a board for mounting a semiconductor element whose thermal expansion coefficient is close to that of silicon, and whose rigidity is high even when this board is light and thin. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element mounting substrate and a manufacturing method thereof, and more particularly to a semiconductor element mounting substrate in which a fiber reinforced metal material is applied to a core substrate and a manufacturing method thereof.

[0002]

2. Description of the Related Art With the recent trend toward miniaturization and high performance of electronic equipment, semiconductor devices constituting the electronic equipment and multilayer wiring boards on which the semiconductor equipment is mounted are required to be small, thin, high performance and highly reliable. Has been done. In response to these demands, bare chip mounting, in which a semiconductor element is directly mounted on a printed circuit board, is adopted as a mounting method. Further, as the number of pins of a semiconductor element increases, the necessity of increasing the number of layers of a board on which the semiconductor element is mounted increases. A built-up method in which an insulating layer and a conductor layer are alternately stacked on one or both surfaces of a substrate is adopted as a method for forming the multi-layer.

In bare chip mounting, a silicon chip having a coefficient of thermal expansion of about 3.5 ppm / ° C. at room temperature is directly mounted on a printed circuit board having a coefficient of thermal expansion of about 10 to 20 ppm / ° C., so underfill is applied. However, thermal stress is generated in the connection portion due to the difference in thermal expansion between the two, and the connection reliability is reduced. Therefore, in order to relieve such stress, methods such as lowering the elastic modulus of the adhesive used for underfill to relieve the stress have been implemented. However, if the chip size becomes larger, this method will also be used. It becomes impossible to secure sufficient reliability. For this reason, it is essential to reduce the thermal expansion coefficient of the mounting substrate itself in order to secure high connection reliability.

In order to reduce noise and improve the performance of the device, it is common to connect a decoupling capacitor to the chip. At this time, depending on the mounting method, the capacitor may be provided on the surface side of the substrate different from the surface side on which the chip is mounted. In this case, from the viewpoint of shortening the connection distance between the chip and the capacitor to reduce the inductance, it is desirable to make the mounting substrate as thin as possible.

[0005]

From such a background,
A metal core substrate based on a metal having a smaller thermal expansion coefficient than an organic substrate has been proposed. The metal core substrate is made by forming holes for through holes in the metal plate to be the core, and then sequentially building up prepreg and copper foil on both sides of the core plate from the outer layer so as to penetrate the through holes formed in the metal plate. It can be manufactured by forming a through hole, performing electroless copper plating and electrolytic copper plating, and forming a circuit pattern on the outer layer.

Here, as the metal material used for the metal core substrate, aluminum, copper, silicon steel, nickel-iron alloy, CIC (copper / invar / copper clad material) and the like are generally used.

However, among these materials, aluminum and the like are lightweight, but have a larger coefficient of thermal expansion than silicon, which is not preferable from the viewpoint of connection reliability. On the other hand, the coefficient of thermal expansion of Invar, Kovar, alloys such as silicon steel, and the clad material such as CIC almost match the coefficient of thermal expansion of silicon, but since it has a large specific gravity and becomes heavy, it is processed on a large substrate. It was not suitable for printed boards. In addition, since the material having a large Young's modulus is not a large material, warpage or undulation occurs in a large substrate, which causes a problem during a build-up process or semiconductor mounting.

Further, it is difficult to obtain a thin plate material with a high melting point metal having a large specific gravity such as molybdenum or tungsten, which has a thermal expansion coefficient relatively close to that of silicon, and a large plate material still has a heavy weight. It becomes a thing and lacks handleability.

It is an object of the present invention to provide a semiconductor element mounting substrate having a coefficient of thermal expansion close to that of silicon and having high rigidity even if it is lightweight and thin, and a method for manufacturing the same.

[0010]

The object is to have a core substrate made of fiber reinforced metal, an insulating layer formed on the core substrate, and a wiring layer formed on the insulating layer. This is achieved by a characteristic semiconductor element mounting substrate.

Further, in the above-mentioned semiconductor element mounting substrate, the wiring layer provided so as to penetrate the core substrate and formed on one surface side of the core substrate and the other surface side of the core substrate. You may make it further have a through hole for electrically connecting with the said wiring layer formed in 1.

In the above semiconductor element mounting substrate, the wiring layer may be electrically connected to the core substrate.

Further, in the above semiconductor element mounting substrate, the core substrate is one metal material selected from the group containing magnesium, aluminum, titanium and alloys of these metals, and a group containing carbon fibers and SiC fibers. It is desirable to be composed of a composite material in which at least one fibrous material selected from the above is composited.

In the above semiconductor element mounting substrate, the fibrous material may be formed into a cloth shape, a woven cloth shape, or a composite in a non-woven cloth form.

Further, in the above semiconductor element mounting substrate, the content of the fibrous material in the core substrate is preferably 30 to 80% by volume.

Further, according to the above-mentioned object, a semiconductor device having a semiconductor element mounting substrate having a core substrate made of fiber reinforced metal and an LSI chip mounted on the semiconductor element mounting substrate is provided. Is also achieved.

Further, in the above semiconductor device, the coefficient of thermal expansion of the semiconductor element mounting substrate is 0.
It is preferably 5 to 6.5 ppm / ° C.

Further, the above object is to provide a motherboard, a semiconductor element mounting board mounted on the motherboard and having a core board made of fiber reinforced metal, and an LSI chip mounted on the semiconductor element mounting board. It is also achieved by a semiconductor device characterized by having.

Further, in the above semiconductor device, the coefficient of thermal expansion of the semiconductor element mounting substrate is 6 to 6 at room temperature.
It is preferably 17 ppm / ° C.

[0020]

[First Embodiment] A semiconductor element mounting substrate and a method of manufacturing the same according to a first embodiment of the present invention will be explained with reference to FIGS.

FIG. 1 is a schematic sectional view showing the structure of the semiconductor element mounting substrate according to the present embodiment, and FIG. 2 is a process sectional view showing the method for manufacturing the semiconductor element mounting substrate according to the present embodiment.

First, the structure of the semiconductor element mounting substrate according to the present embodiment will be explained with reference to FIG.

Fiber-reinforced metal (FRM: Fiber Reinforc
A plurality of through holes 12 penetrating the core substrate 10 are formed in the core substrate 10 made of ed metal). An insulating layer 14 made of resin is formed on the surface of the core substrate 10 and in the through holes 12. The core substrate 10 covered with the insulating layer 14 is provided with a through hole 16 penetrating the insulating layer 14 in the opening 12. The insulating layer 14 is also provided with a via hole 18 reaching the core substrate 10.

Core substrate 10 covered with insulating layer 14
A wiring layer 20 for interconnecting the wirings formed on the front and back of the core substrate 10 via the via holes 16 on both sides of the wiring layer 20.
A wiring layer 20 including a wiring layer 20b electrically connected to the core substrate 10 via the via holes 18 is formed. Insulating layers 22 and 26 and wiring layers 24 and 28 are repeatedly laminated on the core substrate 10 on which the wiring layer 20 is formed.

A semiconductor element (not shown) is electrically connected to the wiring layer 28 via a bump. At least the signal line of the conductor wiring portion on the semiconductor element mounting surface is electrically connected to the back conductor wiring layer through the through hole 16 and to the external electrode pad. Also, G on the semiconductor element surface
All or part of the ND line (or power supply line) is connected to the core substrate 10 through the via hole 18, and further connected to the GND line (or power supply line) on the back surface side.

At least the semiconductor element connecting electrode and the external circuit connecting electrode (wiring layer 28) in the circuit wiring portion are plated with a metal layer of gold, solder, palladium, silver, silver-tin alloy or the like on a nickel base. It is formed by a method such as printing. At least a part of the circuit wiring layer is covered with an overcoat layer 30 such as a solder resist. For the overcoat layer 30, it is possible to use an electrically or thermally excellent resin such as an epoxy type, a polyimide type, an acrylic type, or a BT type.

Thus, the semiconductor element mounting substrates having the multilayer wiring layers are formed on both surfaces of the core substrate 10.

Here, the semiconductor element mounting substrate according to the present embodiment is characterized mainly in that the core substrate 10 is constituted by a fiber-reinforced metal flat plate. The fiber-reinforced metal is a composite material formed by impregnating a base material made of a fibrous material with molten metal.

For the fiber-reinforced metal used in the present invention, carbon fiber or SiC fiber is used as a fibrous material. Since these fibers have high strength, sufficient strength can be secured even when the core substrate 10 is made thin. Further, as will be described later, since the carbon fiber and the SiC fiber have a thermal expansion coefficient smaller than that of metal, the effect of reducing the thermal expansion coefficient of the composite material by compounding with the metal material is obtained.

As the metallic material with which the fibrous material is impregnated, it is desirable to use magnesium (Mg), aluminum (Al), titanium (Ti) or an alloy containing these. This is because these metal materials are lightweight materials and are extremely effective in reducing the weight of the core substrate 10.

Further, as the metal material, it is desirable to use a metal having high electric conductivity and high thermal conductivity. Since the core substrate 10 itself can be provided with sufficient conductivity by compounding a metal material having a high conductivity with the core substrate 10, the core substrate 10 can be provided with a wiring layer such as the wiring layer 20b shown in FIG. The substrate 10 can be used as a GND plane or a power plane that can be expected to reduce electrical noise. Further, if a metal having a high thermal conductivity is used, the core substrate 10 can also serve as a heat dissipation plate.

The content of the fibrous material in the core substrate 10 is preferably in the range of 30 to 80% by volume. If it is less than 30% by volume, the coefficient of thermal expansion of the metallic material becomes dominant, and the effect of reducing the coefficient of thermal expansion of the fibrous material cannot be sufficiently obtained. If it is more than 80% by volume, the preform made of the fibrous material is impregnated with the metallic material. Because it will be difficult.

Table 1 summarizes the thermal expansion coefficients of fibrous materials and metallic materials at room temperature. In Table 1,
For comparison, the values of polyimide resin and epoxy resin are also shown.

[0034]

[Table 1]

As shown in Table 1, the coefficient of thermal expansion of the metal material is larger than the coefficient of thermal expansion of silicon which is 3.5 ppm / ° C., but the coefficient of thermal expansion of carbon is 0 to 2 ppm / ° C. Less than coefficient. The coefficient of thermal expansion of SiC is 4 ppm / ° C, which is almost equal to the coefficient of thermal expansion of silicon. Therefore, it can be seen that a core substrate having a coefficient of thermal expansion close to that of silicon can be formed by forming a composite material of a metal material and these fibrous materials.

If the fibrous material reduces the coefficient of thermal expansion of the composite material, the effect is strongly seen in the direction of extension of the fiber. Therefore, when the core substrate 10 is formed, it is desirable that the fibers are combined in a mesh, a cloth, or a non-woven fabric so that the fibers extend in two orthogonal directions. By doing so, the effect of reducing the thermal expansion coefficient can be further enhanced.

Table 2 shows the relationship between the composite method and the coefficient of thermal expansion when carbon fiber is used as the fibrous material and aluminum is used as the metal material.

[0038]

[Table 2]

As shown in Table 2, the coefficient of thermal expansion of the composite material changes not only with the content of the fibrous material but also with the shape of the fibrous material.

As described above, in order to obtain a core substrate having a desired coefficient of thermal expansion, it is desirable to appropriately set it in consideration of the material, the composite ratio, and the shape of the fibrous raw material.

Next, the method for manufacturing the semiconductor element mounting substrate according to the present embodiment will be explained with reference to FIGS.

First, a preform made of a fibrous material is formed. As the fibrous material, for example, carbon fiber or SiC fiber is used and is formed into a cloth shape, a woven cloth shape, or a non-woven cloth shape. Note that the cloth shape is different from the woven state, and is a plurality of fiber bundles extending in different directions alternately stacked. The process sectional view shown in FIG. 2 is an image of the case where a mesh fibrous material is used.

Next, the thus-formed fibrous material preform is impregnated with the molten metal material. Thus, the core substrate 10 made of the composite material of the fibrous material and the metal material and having a thickness of, for example, about 0.05 to 0.5 mm is formed (FIG. 2A). As the metal material, it is desirable to use a material that is lightweight and has high electrical conductivity and thermal conductivity, such as aluminum, magnesium, titanium, or an alloy containing these metals.

Next, the core substrate 10 thus formed
A through hole 1 that penetrates the core substrate 10 by, for example, a drill.
2 is formed (FIG. 2B). The through hole 12 is formed in advance in a region where a through hole will be formed later, and has a diameter of, for example, 0.2 to 1.
It shall be large in the range of 0 mm.

Next, after the core substrate 10 is subjected to a predetermined degreasing / cleaning treatment, it is vacuum-pressed, for example.
Both surfaces are laminated with a resin sheet to form an insulating layer 14 made of a resin sheet on the surface of the core substrate. At this time, the inside of the through hole 12 is also filled with the insulating layer 14 (FIG. 2C).

Incidentally, for the lamination with the resin sheet,
In addition to the vacuum press, a vacuum laminator or a laminated board press can be used. Further, as the resin material forming the insulating layer, a polyimide resin is preferable, but the resin material is not limited to this, and polyetherimide, polyether sulfone, epoxy resin, tetrafluoroethylene resin, polyurethane resin, silicone Resins having excellent heat resistance and insulating properties such as resins, acrylic resins, bismaleimide / triazine resins can be used.

Next, through holes 16 are formed in the insulating layer 14 in the regions where the through holes 12 are formed so as to penetrate the core substrate 10.
Are formed (FIG. 2D). To form the through hole 16 in the insulating layer 14, a laser such as a UV-YAG laser, a carbon dioxide gas laser, an excimer laser, or dry etching using plasma, a drill, a punch, or the like can be used. As a method of forming the through hole 16, it is desirable to appropriately select an appropriate method according to the size of the hole.

Next, when the core substrate 10 is used as a GND plane or a power plane, a via hole (not shown) reaching the core substrate 10 is formed in the insulating layer 14.

Next, the wiring layer 20 is formed on the core substrate 10 covered with the insulating layer 14. For example, an electroless copper plating film is formed on the entire surface. Then, electrolytic copper plating is performed using the dry film resist as a mask and the electroless copper plating film as a seed to selectively grow the copper film in the wiring layer formation planned region. Then, the dry film resist is peeled off, and the electroless copper plating film is panel-etched to form the wiring layer 20 made of a copper film.

The wiring layer may be formed by a similar method after filling the through holes with, for example, copper paste. Copper is preferably used as the metal material forming the wiring layer, but the material is not limited to this, and gold, silver, nickel or the like may be used.

Next, the formation of the insulating layer and the formation of the wiring layer are repeated as needed to form a predetermined multilayer wiring layer on both surfaces of the core substrate 10.

As described above, according to this embodiment, since the core substrate of the semiconductor element mounting substrate is made of the plate material made of fiber reinforced metal, the coefficient of thermal expansion is close to that of silicon, and the rigidity is high even if it is lightweight and thin. It is possible to configure a semiconductor element mounting substrate having

Although the multilayer wiring layers are formed on both sides of the core substrate 10 in the above embodiment, the multilayer wiring layers may be formed on only one side of the core substrate. When the multilayer wiring layers are formed on both sides of the core substrate, the stress due to the difference in thermal expansion coefficient between the core substrate and the multilayer wiring layer is almost canceled by the front surface side and the back surface side. On the other hand, when the multilayer wiring layer is formed only on one side of the core substrate, the stress is directly applied to the core substrate. However, since the core substrate according to the present embodiment has high rigidity, it exhibits preferable characteristics even when applied to a one-sided wiring substrate.

[A Second Embodiment] The semiconductor device according to a second embodiment of the present invention will be explained with reference to FIG. In addition,
The same reference numerals as those used in the semiconductor element mounting substrate and the method for manufacturing the same according to the first embodiment are designated by the same reference numerals to omit or simplify the description.

FIG. 3 is a schematic sectional view showing the structure of the semiconductor device according to the present embodiment.

On one surface of the core substrate 10 made of fiber reinforced metal, a multi-layer wiring layer 32 is formed by repeatedly laminating an insulating layer and a wiring layer. Thus, the semiconductor element mounting substrate 40 in which the wiring layer 32 is formed only on one surface side is configured.

LSI is mounted on the semiconductor element mounting substrate 40.
Chips 50 are connected via bumps 52. Between the semiconductor element mounting substrate 40 and the LSI chip 50,
The underfill 54 is embedded.

The semiconductor element mounting substrate 40 also has pins 56 and FPCs (Flexible Printed Circui) for connecting to an external electronic circuit 58 (or a mother board).
t: flexible printed wiring board) 60 is formed. The FPC 60 is a thin and bendable substrate that uses a polyimide film or the like as the base material of the printed circuit board, and has copper wiring formed on the base film.

As described above, the semiconductor device according to the present embodiment is characterized in that the LSI chip 50 is mounted on the semiconductor element mounting substrate 40 according to the first embodiment.

When the semiconductor element mounting substrate 40 according to the first embodiment is used in this manner, the thermal expansion coefficient of silicon constituting the LSI chip 40 at room temperature is about 3.5 ppm / ° C., for example, 0.5-6.5p
The core substrate 10 has a thermal expansion coefficient of about pm / ° C.
It is desirable to design In addition, LGA (Land Grip
The same applies when the semiconductor element mounting substrate according to the present invention is applied as a mounting structure such as an Array Package) or a mother board.

In this way, the semiconductor element mounting substrate 40
By configuring the semiconductor element mounting substrate 40 and L
The stress applied to the SI chip 50 can be reduced, and the connection reliability between the semiconductor element mounting substrate 40 and the LSI chip 50 can be improved.

As described above, according to this embodiment, the core substrate of the semiconductor element mounting substrate is made of the plate material made of fiber reinforced metal, and the thermal expansion coefficient of the substrate is made substantially equal to the thermal expansion coefficient of the LSI chip. Therefore, the stress applied between the semiconductor element mounting substrate 40 and the LSI chip 50 can be reduced. In addition, since a substrate using a plate material made of fiber-reinforced metal has high rigidity even if it is lightweight and thin, the weight of the semiconductor device can be reduced.

In the above embodiment, the case where the semiconductor element mounting substrate according to the present invention is a single-sided wiring substrate has been described as an example, but the present invention is also applicable to a double-sided wiring substrate.

[A Third Embodiment] The semiconductor device according to a third embodiment of the present invention will be explained with reference to FIG. In addition,
The same reference numerals as those used in the semiconductor element mounting substrate and the method for manufacturing the same according to the first embodiment and the semiconductor device according to the second embodiment are designated by the same reference numerals to omit or simplify the description.

FIG. 4 is a schematic sectional view showing the structure of the semiconductor device according to the present embodiment.

On both surfaces of the core substrate 10 made of fiber reinforced metal, there are formed multilayer wiring layers 32 each having an insulating layer and a wiring layer repeatedly laminated. Thus, the semiconductor element mounting substrate 40 in which the wiring layers 32 are formed on both surfaces of the core substrate 10 is configured.

LSI is mounted on the semiconductor element mounting substrate 40.
Chips 50 are connected via bumps 52. Between the semiconductor element mounting substrate 40 and the LSI chip 50,
The underfill 54 is embedded. Semiconductor element mounting substrate 4 different from the side on which the LSI chip 50 is mounted
A decoupling capacitor 62 for removing power supply noise is formed on the 0 surface side.

The semiconductor element mounting substrate 40 on which the LSI chip 50 and the capacitor 62 are mounted is connected to the mother board 64 via bumps 66.

As described above, the semiconductor device according to the present embodiment is characterized in that the semiconductor element mounting substrate 40 according to the first embodiment on which the LSI chip 50 is mounted is mounted on the mother board 64.

As described above, when the semiconductor element mounting substrate 40 according to the first embodiment is applied as a mounting structure such as BGA, the thermal expansion coefficient of silicon constituting the LSI chip at room temperature is about 3.5 ppm / ° C. And about 8 to 30 ppm / ° C. which is the coefficient of thermal expansion of the resin substrate constituting the mother board at room temperature, for example, 6 to 17 p
The core substrate 10 has a thermal expansion coefficient of about pm / ° C.
It is desirable to design

In this way, the semiconductor element mounting substrate 40
By configuring the semiconductor element mounting substrate 40 and L
The stress applied to the SI chip 50 and the stress applied to the semiconductor element mounting substrate 40 and the mother board 64 can be optimized.

As described above, according to the present embodiment, the core substrate of the semiconductor element mounting substrate is formed of the plate material made of fiber reinforced metal, and the thermal expansion coefficient of the substrate is set to the thermal expansion coefficient of the LSI chip and that of the mother board. Since the coefficient of thermal expansion is controlled approximately in the middle of the coefficient of thermal expansion, the stress applied between the semiconductor element mounting substrate 40 and the LSI chip 50 and the stress applied between the semiconductor element mounting substrate 40 and the mother board 64 are optimized. be able to. Further, since the substrate using the plate material made of fiber-reinforced metal has high rigidity even if it is lightweight and thin,
The weight of the semiconductor device can be reduced.

In the above embodiment, the case where the semiconductor element mounting substrate according to the present invention is a double-sided wiring substrate has been described as an example, but the same applies to a single-sided wiring substrate.

[0074]

[Example] [Example 1] Magnesium was impregnated into a preform in which carbon fibers were compounded in the XY directions,
A core substrate having a thickness of 0.2 mm was produced. Then, using a drill, the core substrate manufactured in this way is 0.5 m in diameter.
About 1000 through holes of m were formed.

Next, after the core substrate is subjected to a predetermined degreasing and cleaning treatment, it is vacuum-pressed at 200 ° C. for 30 minutes.
Under the conditions described above, a 0.05 mm thick thermoplastic polyimide sheet was laminated on both sides. Then, using a UV-YAG laser, a diameter of 0.2 m is formed at the center of the through hole filled with the resin.
m through holes were formed.

Then, after forming an electroless copper plating film on the entire surface, wiring patterning was performed on the surface with a dry film resist, and wiring was formed on this with electrolytic copper plating.
Then, after removing the dry film resist, the electroless copper film as the plating seed layer was panel-etched. As the etching solution, a mixed solution of hydrogen peroxide solution and sulfuric acid was used.

Then, a wiring was formed on each of the both surfaces by five layers in the same process, and an overcoat layer was further formed by using screen printing and photolithography in combination.

As a result of comparing the amounts of warpage of the semiconductor element mounting substrate thus formed with the organic core printed wiring board produced by the conventional process, the organic core substrate has a chip mounting area of 20 mm span of about 30 μm. However, in the substrate according to the present embodiment, it was as good as 10 μm or less in the same area.

Also, after mounting the chip without underfill, a cycle of -65 ° C., 30 min to + 125 ° C., 30 min was repeated for 1000 cycles. As a result, a thermal cycle test was conducted. The rate was + 10% or less, and cracking or peeling of the solder or pad portion did not occur, but in the organic core substrate, cracks were observed at the solder / pad interface of the chip corner portion after 1000 cycles.

Example 2 A preform in which carbon fibers were compounded in the XY directions was impregnated with aluminum to prepare a core substrate having a thickness of 0.2 mm. Then, using a drill, the core substrate manufactured in this manner was measured to have a diameter of 0.
About 1000 5 mm through holes were formed.

Next, after performing a predetermined degreasing and cleaning treatment on the core substrate, it is vacuum-pressed at 170 ° C. for 30 minutes.
Under the conditions described above, a 0.05 mm thick epoxy resin sheet was laminated on both sides. Then, using a UV-YAG laser, a through hole having a diameter of 0.2 mm was formed at the center of the through hole filled with the resin.

Then, after filling the through-holes thus formed with copper paste, excess paste was removed by buffing.

Next, after forming an electroless copper plating film on the entire surface, wiring patterning was performed on the surface with a dry film resist, and wiring was formed on this by electrolytic copper plating.
Then, after removing the dry film resist, the electroless copper film as the plating seed layer was panel-etched. As the etching solution, a mixed solution of hydrogen peroxide solution and sulfuric acid was used.

Then, five layers of wiring were formed on both sides by the same process, and an overcoat layer was further formed by using screen printing and photolithography in combination.

As a result of comparing the amounts of warpage of the semiconductor element mounting substrate thus formed with the organic core printed wiring board manufactured by the conventional process, the organic core substrate has a chip mounting area of 20 mm span of about 30 μm. However, in the substrate according to the present embodiment, it was as good as 10 μm or less in the same area.

After mounting the chip without underfill, a cycle of -65 ° C., 30 min to + 125 ° C., 30 min was repeated for 1000 cycles. As a result, a thermal cycle test was conducted. The rate was + 10% or less, and cracking or peeling of the solder or pad portion did not occur, but in the organic core substrate, cracks were observed at the solder / pad interface of the chip corner portion after 1000 cycles.

Further, when the semiconductor device completed by using the substrate according to the present embodiment was compared with the semiconductor device by the ordinary printed circuit board having the same function, it was confirmed that the heat dissipation property was excellent.

[0088]

As described above, according to the present invention, since the core substrate of the semiconductor element mounting substrate is made of a plate material made of fiber reinforced metal, the substrate is made to approximate the thermal expansion coefficient of the LSI chip and the thermal It is possible to realize a semiconductor device having excellent radiation performance. Further, as compared with a semiconductor device such as a BGA using a conventional double-sided printed circuit board, the connection reliability is higher and a semiconductor element having a high heat generation can be mounted. Also,
Since the metal core layer can be used as a ground plane,
The effect of noise reduction can be expected, and by using this, it is possible to cope with higher performance of semiconductor devices.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing the structure of a semiconductor element mounting substrate according to a first embodiment of the present invention.

FIG. 2 is a process sectional view showing the method of manufacturing the semiconductor device mounting substrate according to the first embodiment of the present invention.

FIG. 3 is a schematic sectional view showing the structure of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a schematic sectional view showing the structure of a semiconductor device according to a third embodiment of the present invention.

[Explanation of symbols]

10 ... Core substrate 12 ... Through hole 14, 22, 26, 28 ... Insulating layer 16 ... Through hole 18 ... Beer hall 20, 24, 28 ... Wiring layer 30 ... Overcoat layer 32 ... Multilayer wiring layer 40 ... Semiconductor element mounting substrate 50 ... LSI chip 52, 66 ... Bump 54 ... Underfill 56 ... pin 58 ... External electronic circuit 60 ... FPC 62 ... Decoupling capacitor 64 ... Motherboard

Claims (10)

[Claims] 1. A substrate for mounting a semiconductor element, comprising: a core substrate made of fiber-reinforced metal; an insulating layer formed on the core substrate; and a wiring layer formed on the insulating layer. . 2. The semiconductor element mounting substrate according to claim 1, wherein the wiring layer is provided so as to penetrate the core substrate and is formed on one surface side of the core substrate, and the other of the core substrates. A semiconductor element mounting substrate further comprising a through hole for electrically connecting to the wiring layer formed on the surface side of the semiconductor element. 3. The semiconductor element mounting substrate according to claim 1, wherein the wiring layer is electrically connected to the core substrate. 4. The semiconductor element mounting substrate according to claim 1, wherein the core substrate is one metal selected from the group consisting of magnesium, aluminum, titanium and alloys of these metals. A semiconductor element mounting substrate comprising a composite material which is a composite of a material and at least one fibrous material selected from the group including carbon fibers and SiC fibers. 5. The semiconductor element mounting substrate according to claim 4, wherein the fibrous material is formed into a cloth shape, a woven cloth shape, or a composite in a non-woven cloth form. Substrate. 6. The substrate for mounting a semiconductor element according to claim 4, wherein the content of the fibrous material in the core substrate is 3 or less.
A semiconductor element mounting substrate, which is 0 to 80% by volume. 7. A semiconductor device comprising: a semiconductor element mounting substrate having a core substrate made of fiber reinforced metal; and an LSI chip mounted on the semiconductor element mounting substrate. 8. The semiconductor device according to claim 7, wherein the semiconductor element mounting substrate has a coefficient of thermal expansion of 0.5 to 6.5 ppm / ° C. at room temperature. 9. A semiconductor device mounting board having a mother board, a core board made of fiber reinforced metal and mounted on the motherboard, and an LSI chip mounted on the semiconductor device mounting board. Characteristic semiconductor device. 10. The semiconductor device according to claim 9, wherein the semiconductor element mounting substrate has a coefficient of thermal expansion of 6 to 17 ppm / ° C. at room temperature.