JPH08279682A - Manufacture of multilayered circuit board - Google Patents

Manufacture of multilayered circuit board

Info

Publication number
JPH08279682A
JPH08279682A JP8036895A JP8036895A JPH08279682A JP H08279682 A JPH08279682 A JP H08279682A JP 8036895 A JP8036895 A JP 8036895A JP 8036895 A JP8036895 A JP 8036895A JP H08279682 A JPH08279682 A JP H08279682A
Authority
JP
Japan
Prior art keywords
insulating layer
conductor circuit
circuit board
conductor
interlayer insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8036895A
Other languages
Japanese (ja)
Inventor
Akimasa Yajima
明政 矢島
Yoshitsugu Ishizuka
義次 石塚
Hiroshi Ishio
宏 石尾
Tatsuo Wada
辰男 和田
Atsushi Yoshino
篤 吉野
Katsuro Aoshima
克郎 青島
Keiichi Murakami
圭一 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Adeka Corp
Meiko Co Ltd
Original Assignee
Meiko Co Ltd
Asahi Denka Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meiko Co Ltd, Asahi Denka Kogyo KK filed Critical Meiko Co Ltd
Priority to JP8036895A priority Critical patent/JPH08279682A/en
Publication of JPH08279682A publication Critical patent/JPH08279682A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE: To obtain a high density multilayered printed circuit board at a low cost, by repeating a process wherein an insulating layer, an interstitial viahole, a through hole, etc., are formed on a double-sided board in which a first conductor circuit is formed, and then a second conductor circuit is formed by etching or the technique of pattern copper-plating. CONSTITUTION: A viahole 3 is formed in an insulating substratum 1 and conductor layers on both surfaces are connected. A first conductor circuit 2 is formed. After roughing by a method like blackening, alkali developing type liquid state insulating resin is spread, and an interlayer insulating layer 4 is formed. An art work film or the like for forming an interstitial viahole (IVH) is aligned to the insulating resin and exposed to light, thereby forming an IVH 5. Necessary and minimum viaholes 6 are drill-worked. The surface is roughened, and a conductor layer 7 is formed by electroless plating, panel electrolytic copper plating, etc., whose layer is connected with the first conductor circuit 2. When the number of layers is increased, the process from the formation of the insulating layer to the formation of the conductor circuit is repeated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はインタースティシャルバ
イアホール(以下IVHと称す)を有する多層回路基板
の製造方法に関し、さらに詳しくは、絶縁層にアルカリ
水溶液で現像が可能な感光性を付与した絶縁樹脂を用い
て、露光、現像によってIVHを形成する多層回路基板
と該多層回路基板の導体回路と絶縁層との密着信頼性を
向上させるために樹脂表面に特殊な粗化処理を施す製造
技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multi-layer circuit board having interstitial via holes (hereinafter referred to as IVH), and more specifically, it imparts photosensitivity to an insulating layer which can be developed with an alkaline aqueous solution. A manufacturing technique for applying a special roughening treatment to the resin surface in order to improve the adhesion reliability between a multilayer circuit board that forms an IVH by exposure and development using an insulating resin and a conductor circuit of the multilayer circuit board and an insulating layer. Regarding

【0002】[0002]

【従来の技術】従来、多層プリント回路基板における層
間の接続を行うバイアホールはドリル加工などで貫通孔
を形成させる方法が主流であるが、高密度化に対応する
ために表面層回路と内層回路のみを接続させるIVHを
有する多層回路基板が普及しつつある。しかし、従来の
IVHを形成する方法は各層ごとにドリル加工し、各々
めっきで導通させ、熱硬化性樹脂のプリプレグを介して
接着させる方法で製造されており、このため工程が煩雑
になり、またドリル加工による形成のため、IVHの小
径化にも限界があるとともに、コストが大幅に高くなっ
てしまう欠点が存在している。
2. Description of the Related Art Conventionally, a via hole for connecting layers in a multilayer printed circuit board is generally formed by forming a through hole by drilling or the like, but in order to cope with high density, a surface layer circuit and an inner layer circuit are formed. Multilayer circuit boards with IVHs that only connect only are becoming popular. However, the conventional method for forming IVH is a method of drilling each layer, conducting each by plating, and adhering via a prepreg of a thermosetting resin, which makes the process complicated and Since it is formed by drilling, there is a limit in reducing the diameter of the IVH, and there are drawbacks that the cost is significantly increased.

【0003】これに対して、IVHを露光、現像などフ
ォトエッチングプロセスで形成する手法であるビルドア
ップ工法が従来より既知の方法として知られている。
On the other hand, a build-up method, which is a method of forming IVH by a photoetching process such as exposure and development, has been known as a conventionally known method.

【0004】この方法は、まず絶縁基材の表面に所望パ
ターンの第1の導体回路を形成し、次いでその上に液状
の絶縁樹脂を塗布するか、またはドライフィルムタイプ
の絶縁樹脂をラミネートなどにより貼り合わせることに
よって層間絶縁層を形成した後、露光、現像工程などを
経て、IVHを形成する。また、必要に応じてはここで
ドリル孔加工によって最低限必要な貫通バイアホールを
形成する。さらに絶縁層の表面に粗化処理を施した後、
パネル銅めっきなどにより、第2の導体層形成、及び第
1の導体回路と第2の導体層の接続を行い、さらに所望
の第2の導体回路をエッチングなどによって形成する。
この操作を順次反復することにより、所望層数の多層回
路基板が形成される。
According to this method, first, a first conductor circuit having a desired pattern is formed on the surface of an insulating base material, and then a liquid insulating resin is applied thereon, or a dry film type insulating resin is laminated or the like. After forming an interlayer insulating layer by bonding, IVH is formed through an exposure process, a development process, and the like. Further, if necessary, the minimum necessary through via hole is formed here by drilling. After roughening the surface of the insulating layer,
The second conductor layer is formed and the first conductor circuit and the second conductor layer are connected by panel copper plating or the like, and a desired second conductor circuit is further formed by etching or the like.
By repeating this operation sequentially, a multilayer circuit board having a desired number of layers is formed.

【0005】[0005]

【発明が解決しようとする課題】上記したビルドアップ
工法は小径のバイアホールをIVHの形状で形成するこ
とが可能であり、高密度な多層プリント回路基板の製造
方法として有効な手段である。
The build-up method described above is capable of forming via holes having a small diameter in the shape of IVH, and is an effective means as a method for manufacturing a high-density multilayer printed circuit board.

【0006】しかしながら、多層プリント回路基板にこ
の工法を応用する場合、層間絶縁層にアルカリ現像型の
絶縁樹脂を使用した場合、導体回路と絶縁層との密着信
頼性が乏しく、やむを得ずエポキシ系など溶剤現像型の
絶縁樹脂が使用されているのが現状である。このため、
既に主流になりつつあるアルカリ現像の既存設備を使用
することができず、また、IVHの形成における加工条
件もアルカリ現像型樹脂に比べると、例えばエポキシ系
樹脂は露光時に約3J以上の多大な光エネルギーを必要
とし、塗布〜完全硬化までの条件管理範囲が狭く、有機
溶剤で現像するためランニングコストも高くなってしま
うという欠点がある。さらに、導体回路と絶縁樹脂の密
着強度も 0.6〜1.0 kg/cmと充分な信頼性を得ていると
は言い難い。
However, when this method is applied to a multi-layer printed circuit board, when an alkali-developing insulating resin is used for the interlayer insulating layer, the adhesion reliability between the conductor circuit and the insulating layer is poor, and it is unavoidable that a solvent such as an epoxy type solvent is used. At present, a developing type insulating resin is used. For this reason,
It is not possible to use the existing equipment for alkaline development, which is already becoming the mainstream, and the processing conditions for forming IVH are, for example, an epoxy resin is a large amount of light of about 3 J or more when exposed to light when exposed. It requires energy, has a narrow range of condition management from coating to complete curing, and has the disadvantage of high running cost because it is developed with an organic solvent. Furthermore, it is hard to say that the adhesion strength between the conductor circuit and the insulating resin is 0.6 to 1.0 kg / cm, which is sufficient reliability.

【0007】また、環境面からの見地においても従来の
溶剤現像型樹脂によるビルドアップ工法は塩素系有機溶
剤を使用するために、作業者の健康を侵害する恐れや地
球の温暖化現象に対しての悪影響が予想され、将来性に
不安があった。
Also, from the environmental point of view, the conventional build-up method using a solvent-developable resin uses a chlorine-based organic solvent, so that the health of workers is impaired and the global warming phenomenon is prevented. Was expected to be adversely affected, and there was concern about the future.

【0008】本発明はビルドアップ工法で多層プリント
回路基板を製造する際の上記の課題を解決し、ビルドア
ップ工法の利点を生かし、小径のIVHを有する高密度
な多層プリント回路基板を安価に製造することができ、
しかも安全で環境への悪影響がない製造技術の提供を目
的とする。
The present invention solves the above-mentioned problems in manufacturing a multilayer printed circuit board by the build-up method, utilizes the advantages of the build-up method, and inexpensively manufactures a high-density multilayer printed circuit board having IVH with a small diameter. You can
Moreover, it aims to provide a manufacturing technology that is safe and has no adverse effect on the environment.

【0009】[0009]

【課題を解決するための手段】本発明者等は、鋭意検討
の結果、上記したビルドアップ工法における層間絶縁樹
脂にアルカリ現像型の絶縁樹脂を用いて、上記の目的を
達成するに至った。
As a result of earnest studies, the inventors of the present invention have achieved the above object by using an alkali developing type insulating resin as the interlayer insulating resin in the above-mentioned build-up method.

【0010】即ち、本発明は、第1の導体回路が形成さ
れた両面基板上に絶縁層を形成し、露光、現像によりイ
ンタースティシャルバイアホールを形成した後、必要に
応じてはドリル加工にて貫通孔を形成し、層間絶縁層表
面を粗化し、パネル銅めっきを施すことにより導通を確
保し、次いで所望の第2の導体回路をエッチングの手法
またはパターン銅めっき及びエッチングの手法を用いて
形成する工程を反復することを特徴とする多層回路基板
の製造方法に関する。
That is, according to the present invention, an insulating layer is formed on a double-sided substrate on which a first conductor circuit is formed, an interstitial via hole is formed by exposure and development, and then drilling is carried out if necessary. A through hole is formed, the surface of the interlayer insulating layer is roughened, and panel copper plating is performed to ensure continuity, and then a desired second conductor circuit is etched using an etching method or a pattern copper plating and etching method. The present invention relates to a method for manufacturing a multi-layer circuit board, which comprises repeating the steps of forming.

【0011】以下に、図1に基づいて4層回路基板を例
に本発明の方法を詳細に説明する。
The method of the present invention will be described in detail below with reference to FIG. 1 by taking a four-layer circuit board as an example.

【0012】まず、絶縁基材(1) をドリルなどによりバ
イアホール(3) を加工し、既知の銅めっきなどにより両
面の導体層を接続した後、エッチングなどにより第1の
導体回路(2) を形成し、両面回路基板を作成した。この
時、場合によってはバイアホール(3) を省略することも
可能である。
First, the insulating base material (1) is processed into via holes (3) by a drill, etc., and the conductor layers on both sides are connected by known copper plating or the like, and then the first conductor circuit (2) is etched or the like. To form a double-sided circuit board. At this time, the via hole (3) may be omitted in some cases.

【0013】次いで、その導体回路上を黒化処理などの
方法で粗化した後にアルカリ現像型の液状絶縁樹脂を例
えばカーテンコート法、スクリーン印刷法、スプレー
法、ディップコート法などの手法を用いて塗布し、仮乾
燥するか、またはフィルムタイプの絶縁樹脂をラミネー
トかホットプレスなどにより貼り合わせることによって
層間絶縁層(4) を形成する。この絶縁樹脂にIVH形成
用のアートワークフィルムなどを任意に位置合わせし、
露光した後、液温約25〜30℃、約1〜2%炭酸ナトリウ
ム水溶液などでアルカリ現像することによってIVH
(5) を形成する。
Next, after the conductor circuit is roughened by a method such as blackening treatment, an alkali developing type liquid insulating resin is used by a method such as a curtain coating method, a screen printing method, a spray method or a dip coating method. The interlayer insulating layer (4) is formed by applying and temporarily drying, or laminating a film type insulating resin by laminating or hot pressing. Arrange an IVH forming artwork film, etc. on this insulating resin as desired.
After the exposure, the solution is heated to about 25 to 30 ° C. and alkali-developed with about 1 to 2% sodium carbonate aqueous solution to obtain IVH
(5) is formed.

【0014】この時アルカリ現像型の絶縁樹脂としてエ
ポキシ−アクリレート系や、耐熱アクリル系のものをあ
げることができ、また層間絶縁層(4) の厚みは第1の導
体回路(2) の影響を受けて樹脂表面が凹凸状になること
を防止し、さらに良好な絶縁信頼性を確保するために約
40〜100 μm 程度であることが好ましい。
At this time, as the alkali developing type insulating resin, epoxy-acrylate type or heat resistant acrylic type can be used, and the thickness of the interlayer insulating layer (4) influences the influence of the first conductor circuit (2). In order to prevent the resin surface from becoming uneven when receiving it, and to secure better insulation reliability,
It is preferably about 40 to 100 μm.

【0015】この層間絶縁層(4) に用いる樹脂は完全に
硬化させることが必要であるため、熱風循環乾燥炉を用
いて約 120〜150 ℃で約20〜60分加熱硬化するか、遠赤
外線乾燥炉を用いて約 150〜180 ℃で約3〜8分加熱硬
化するか、またはUV乾燥炉にて1〜3JのUV照射に
よって硬化させる。
Since the resin used for the interlayer insulating layer (4) needs to be completely cured, it is cured by heating in a hot air circulation drying oven at about 120 to 150 ° C. for about 20 to 60 minutes, or by far infrared rays. It is cured by heating in a drying oven at about 150 to 180 ° C. for about 3 to 8 minutes, or by UV irradiation of 1 to 3 J in a UV drying oven.

【0016】次にここで、最低限必要なバイアホール
(6) をドリルなどにより加工する。
Next, the minimum required via hole
Process (6) with a drill.

【0017】さらに絶縁層表面を平滑にし、かつ第2の
導体回路(8) の密着性を向上させるために絶縁樹脂の表
面にパフ研磨、ジェットスクラブ研磨などの機械的研磨
を施すことも可能である。
Further, in order to make the surface of the insulating layer smooth and improve the adhesion of the second conductor circuit (8), the surface of the insulating resin may be subjected to mechanical polishing such as puff polishing or jet scrub polishing. is there.

【0018】ここで、第2の導体回路(8) の密着性を向
上させるために、層間絶縁層(4) に用いる樹脂表面に化
学研磨を施すことが必要であるが、従来の溶剤現像型の
絶縁樹脂では過マンガン酸カリウムなどでエポキシなど
の絶縁樹脂を化学研磨する手法が通常であったが、アル
カリ現像型のエポキシ−アクリレート樹脂の場合、過マ
ンガン酸処理のみでは密着信頼性を確保するために必要
な粗化状態にならない。このため、以下の手法で化学研
磨することによって、導体回路との密着信頼性を向上さ
せる。即ち、層間絶縁層(4) の樹脂表面を無機アルカ
リ、水溶性アミン及び有機溶剤の3成分を含む混合水溶
液からなる強アルカリ水溶液組成物で浸漬処理すること
によって1段目の粗化処理を行い、さらにこの処理の後
に過マンガン酸カリウムなどで層間絶縁層(4) のエポキ
シ系成分を化学研磨することによって、密着信頼性を確
保することに必要な粗化状態に仕上げることが可能にな
る。
Here, in order to improve the adhesion of the second conductor circuit (8), it is necessary to chemically polish the surface of the resin used for the interlayer insulating layer (4). In general, the method of chemically polishing the insulating resin such as epoxy with potassium permanganate was used for the above insulating resin, but in the case of the alkali development type epoxy-acrylate resin, the adhesion reliability is secured only by the permanganate treatment. Therefore, the roughening condition required is not achieved. Therefore, the chemical reliability is improved by the following method to improve the adhesion reliability with the conductor circuit. That is, the resin surface of the interlayer insulation layer (4) is immersed in a strong alkaline aqueous solution composition consisting of a mixed aqueous solution containing three components of an inorganic alkali, a water-soluble amine and an organic solvent to carry out the first roughening treatment. Further, after this treatment, the epoxy-based component of the interlayer insulating layer (4) is chemically polished with potassium permanganate or the like, whereby the roughened state necessary for ensuring the adhesion reliability can be finished.

【0019】ここで、1段目の粗化処理に用いる無機ア
ルカリとしては水酸化ナトリウム、水酸化カリウム、水
酸化リチウム、水酸化マグネシウムなどを挙げることが
でき、これらは1種単独でも2種以上でも用いることが
できる。水溶性アミンは下式で代表されるアミノアルコ
ール類であり、
Here, examples of the inorganic alkali used for the first-stage roughening treatment include sodium hydroxide, potassium hydroxide, lithium hydroxide, magnesium hydroxide, etc. These may be used alone or in combination of two or more. However, it can be used. Water-soluble amines are amino alcohols represented by the following formula,

【0020】[0020]

【化1】 Embedded image

【0021】(式中、R は水素、メチル基、ヒドロキシ
ルメチル基またはヒドロキシプロピル基を表し、それぞ
れ同一の基または異なる基であっても良く、R'はエチレ
ン基を表し、n は0〜3の数である。)。
(In the formula, R represents hydrogen, a methyl group, a hydroxylmethyl group or a hydroxypropyl group, which may be the same or different groups, R'represents an ethylene group, and n represents 0 to 3). Is the number of.).

【0022】ここで使用する水溶性アミンとしてはモノ
エタノールアミン、ジエタノールアミン、ジイソプロパ
ノールアミン、メチルエタノールアミン、エチレンジア
ミン、トリエチレンテトラミン、エチレンジアミンのエ
チレンオキシドまたはプロピレンオキシド1〜4モル付
加物などを挙げることができ、これらは1種単独でも2
種以上でも用いることができる。有機溶剤としてはジオ
キサン、メチルエチルケトン、アクリロニトリル、また
はコハク酸ジメチル、グルタル酸ジメチル、アジピン酸
ジメチルなどのエステル系溶剤、またはメチルジグリコ
ール、メチルトリグリコール、メチルプロピレングリコ
ール、メチルプロピレンジグリコール、プロピルジグリ
コール、プロピルプロピレングリコール、ブチルジグリ
コールなどのグリコールエーテル類などの水溶性有機溶
剤を挙げることができ、これらは1種単独でも2種以上
でも用いることができる。
Examples of the water-soluble amine used here include monoethanolamine, diethanolamine, diisopropanolamine, methylethanolamine, ethylenediamine, triethylenetetramine, ethylene oxide or propylene oxide 1 to 4 mol adduct of ethylenediamine, and the like. , These are 2 alone
More than one species can be used. Examples of the organic solvent include dioxane, methyl ethyl ketone, acrylonitrile, dimethyl succinate, dimethyl glutarate, ester solvents such as dimethyl adipate, or methyl diglycol, methyl triglycol, methyl propylene glycol, methyl propylene diglycol, propyl diglycol, Examples thereof include water-soluble organic solvents such as glycol ethers such as propyl propylene glycol and butyl diglycol, and these may be used alone or in combination of two or more.

【0023】強アルカリ水溶液組成物 100重量部中の上
記3成分の配合割合としては、無機アルカリ15〜35重量
部、水溶性アミン10〜30重量部、有機溶剤10〜30重量部
が好ましい。
The mixing ratio of the above three components in 100 parts by weight of the strong alkaline aqueous solution composition is preferably 15 to 35 parts by weight of inorganic alkali, 10 to 30 parts by weight of water-soluble amine, and 10 to 30 parts by weight of organic solvent.

【0024】さらに、浸透剤となる各種界面活性剤、カ
ルシウム塩などの沈降物生成防止剤であるキレート化剤
の添加も有用である。
Further, it is also useful to add various kinds of surfactants serving as penetrants and chelating agents serving as precipitation preventing agents such as calcium salts.

【0025】絶縁樹脂の表面を粗化した後、薄付け無電
解めっき及びパネル電解銅めっきにより、所望の厚み、
例えば約10〜50μm にて第2の導体層(7) の形成、及び
第1の導体回路(2) と第2の導体層(7) の接続を行う。
After the surface of the insulating resin is roughened, a desired thickness is obtained by thin electroless plating and panel electrolytic copper plating.
For example, the second conductor layer (7) is formed and the first conductor circuit (2) and the second conductor layer (7) are connected to each other at about 10 to 50 μm.

【0026】次に導体層(7) と層間絶縁層(4) との密着
信頼性をより確保するために、熱風循環乾燥炉で約 120
〜150 ℃、約10〜60分加熱処理する。
Next, in order to further secure the adhesion reliability between the conductor layer (7) and the interlayer insulating layer (4), a hot air circulation drying furnace is used for about 120
Heat treatment at ~ 150 ° C for about 10-60 minutes.

【0027】さらに既知のエッチング法により不要な銅
を除去することによって所望の第2の導体回路(8) を形
成し、小径のIVHを有する高密度な多層プリント回路
基板を得ることができる。
Further, by removing unnecessary copper by a known etching method, a desired second conductor circuit (8) can be formed, and a high-density multilayer printed circuit board having IVH with a small diameter can be obtained.

【0028】また第2の導体回路(8) の形成については
層間絶縁層(4) の表面粗化を施し、薄付け無電解めっき
した後のパネル電解銅めっきの厚みを約1〜5μm 程度
にするか、または厚付け無電解銅めっきのみで約1〜5
μm の厚みにして、パターン銅電解めっきで所望の厚
み、例えば約5〜50μm の銅回路を形成し、続けてはん
だ、ニッケル、クロムなどの異種金属をパターン電解め
っきした後、この異種金属をエッチングレジストとして
不要な銅をエッチング除去することも可能であり、さら
にこれらの異種金属のパターン電解めっきを省略し、不
要な銅をクイックエッチングすることで第2の導体回路
(8) を形成することも可能である。
For formation of the second conductor circuit (8), the surface of the interlayer insulating layer (4) is roughened, and the thickness of the electrolytic copper plating on the panel after thin electroless plating is set to about 1 to 5 μm. Or about 1 to 5 with thick electroless copper plating only
After forming a copper circuit of a desired thickness, for example, about 5 to 50 μm by patterned copper electroplating to a thickness of μm, and subsequently pattern electroplating different metals such as solder, nickel and chromium, and then etching this different metals. It is also possible to remove unnecessary copper as a resist by etching, and by omitting pattern electrolytic plating of these dissimilar metals and performing quick etching of unnecessary copper, a second conductor circuit can be obtained.
It is also possible to form (8).

【0029】尚、さらに層数を増やす場合は、第2の導
体回路(8) 上を黒化処理などの方法で粗化した後に前記
層間絶縁層の形成から導体回路の形成の工程を順次反復
することによって所望の多層回路基板を得ることができ
る。
When the number of layers is further increased, the steps of forming the interlayer insulating layer to forming the conductor circuit are sequentially repeated after the second conductor circuit (8) is roughened by a method such as blackening treatment. By doing so, a desired multilayer circuit board can be obtained.

【0030】[0030]

【発明の効果】本発明の方法によれば、バイアホールを
フォトエッチング形成するため、ドリル加工では困難で
あった小径のIVHを安価に提供することができる。ま
た、層間絶縁樹脂にエポキシ−アクリレート系や耐熱ア
クリル系のアルカリ水溶液で現像することが可能なフォ
トレジスト材を使用するため、従来のエポキシ系などの
溶剤現像型絶縁樹脂に比べると、安価で、安全で、環境
面への悪影響を及ぼさない製造方法であると同時に、導
体回路の密着強度が 1.0kg/cm以上の優れた信頼性を持
った多層回路基板を提供することが可能である。
According to the method of the present invention, since the via hole is formed by photoetching, it is possible to inexpensively provide the IVH having a small diameter, which was difficult by the drilling process. Further, since a photoresist material that can be developed with an epoxy-acrylate-based or heat-resistant acrylic-based alkaline aqueous solution is used for the interlayer insulating resin, it is cheaper than a conventional solvent-developing insulating resin such as an epoxy-based resin. It is possible to provide a multilayer circuit board which is a safe manufacturing method which does not have an adverse effect on the environment and at the same time has a highly reliable adhesion strength of a conductor circuit of 1.0 kg / cm or more.

【0031】[0031]

【実施例】次に、実施例により本発明を詳細に説明する
が、本発明はこれら実施例により何ら限定されるもので
はない。
EXAMPLES Next, the present invention will be described in detail with reference to examples, but the present invention is not limited to these examples.

【0032】(実施例1)まず、銅箔厚み35μm の両面
銅張積層板を既知のパネルめっき法にて導体回路(1) を
形成し、両面回路基板を作成し、黒化処理にて導体回路
(1) の表面を粗化した。次に、エポキシ−アクリレート
系のアルカリ現像型液状フォトレジストをカーテンコー
ト法により、80μm の厚みで塗布し、熱風循環乾燥炉で
75℃、20分で仮乾燥する工程を両面に行った。このフォ
トレジストにIVH形成用のアートワークフィルムを任
意に位置合わせし、超高圧水銀灯ランプで 400mJ露光
し、10分放置した後、液温30℃、1wt%の炭酸水素ナト
リウム水溶液で現像し、IVHを形成した。更に、熱風
循環乾燥炉で 150℃、30分加熱し、フォトレジストを硬
化させ、層間絶縁層(4) を形成した後、水酸化カリウム
25重量部、ジエタノールアミン20重量部、メチルプロピ
レンジグリコール20重量部、エチレンジアミンテトラ酢
酸4ナトリウム塩1重量部、水34重量部の混合液に浸漬
して表面を粗化し、十分に水洗後、過マンガン酸ナトリ
ウム処理を施す、いわゆる化学研磨を行った。次に、層
間絶縁層(4) の上に厚み 0.3μm の銅を無電解銅めっき
し、更に厚み25μm の銅をパネル電解銅めっきにて堆積
させ、この後に熱風循環乾燥炉で120℃、30分ベーキン
グし、導体層(7) を形成した。第2の導体層(7) の全面
をパフ及びスクラブ研磨で整面し、ドライフィルムを用
いて第2の導体回路のパターンをイメージングした後、
塩化第二鉄液で不要な銅をエッチング除去することによ
って第2の導体回路(8) を形成し、IVHを有する4層
回路基板が得られた。この回路基板の性能特性を測定し
た結果を表1に示す。これより密着強度は 1.2〜1.3 kg
/cmと良好な結果であった。
(Example 1) First, a conductor circuit (1) was formed on a double-sided copper-clad laminate having a copper foil thickness of 35 μm by a known panel plating method, a double-sided circuit board was prepared, and a conductor was blackened. circuit
The surface of (1) was roughened. Next, an epoxy-acrylate type alkali-development type liquid photoresist is applied to a thickness of 80 μm by the curtain coating method, and then it is dried in a hot air circulating drying oven.
A step of temporary drying at 75 ° C. for 20 minutes was performed on both sides. An artwork film for IVH formation is arbitrarily aligned with this photoresist, exposed to 400 mJ with an ultra-high pressure mercury lamp and left for 10 minutes, then developed at a liquid temperature of 30 ° C. and a 1 wt% sodium hydrogencarbonate aqueous solution to produce IVH. Was formed. After heating at 150 ° C for 30 minutes in a hot air circulation drying oven to harden the photoresist and form the interlayer insulating layer (4), potassium hydroxide is added.
25 parts by weight, diethanolamine 20 parts by weight, methylpropylene diglycol 20 parts by weight, ethylenediaminetetraacetic acid tetrasodium salt 1 part by weight, water 34 parts by weight to roughen the surface, wash thoroughly with water, and then wash with permanganese. So-called chemical polishing, which is a sodium acid treatment, was performed. Next, 0.3 μm thick copper is electroless copper plated on the interlayer insulating layer (4), and further 25 μm thick copper is deposited by panel electrolytic copper plating. Minute baking was performed to form a conductor layer (7). After the entire surface of the second conductor layer (7) is conditioned by puffing and scrubbing, and the pattern of the second conductor circuit is imaged using a dry film,
A second conductor circuit (8) was formed by etching away unnecessary copper with a ferric chloride solution, and a four-layer circuit board having IVH was obtained. The results of measuring the performance characteristics of this circuit board are shown in Table 1. Adhesion strength is 1.2 to 1.3 kg
The result was good as / cm.

【0033】(実施例2)実施例1の化学研磨処理液を
水酸化カリウム25重量部、ジエタノールアミン25重量
部、コハク酸ジメチル、グルタル酸ジメチル、アジピン
酸ジメチルの混合物15重量部、エチレンジアミンテトラ
酢酸4ナトリウム塩1重量部、水34重量部の混合液と過
マンガン酸ナトリウム溶液に変えて、実施例1と同様な
方法で基板を作成し、回路基板の性能特性を測定した。
導体回路の密着強度等の結果は表1と同様であり、密着
強度は 1.2〜1.3 kg/cmと良好な結果であった。
(Example 2) 25 parts by weight of potassium hydroxide, 25 parts by weight of diethanolamine, 15 parts by weight of a mixture of dimethyl succinate, dimethyl glutarate and dimethyl adipate, and 4 parts by weight of ethylenediaminetetraacetic acid were used. A substrate was prepared in the same manner as in Example 1 except that a mixed solution of 1 part by weight of sodium salt and 34 parts by weight of water and a sodium permanganate solution were used, and the performance characteristics of the circuit board were measured.
The results such as the adhesion strength of the conductor circuit are the same as those in Table 1, and the adhesion strength was a good result of 1.2 to 1.3 kg / cm.

【0034】(実施例3)実施例1の化学研磨処理液を
水酸化カリウム25重量部、モノエタノールアミン15重量
部、メチルジグリコール25重量部、エチレンジアミンテ
トラ酢酸4ナトリウム塩1重量部、水34重量部の混合液
と過マンガン酸ナトリウム溶液に変えて、実施例1と同
様な方法で基板を作成し、回路基板の性能特性を測定し
た。導体回路の密着強度等の結果は表1と同様であり、
密着強度は 1.2〜1.3kg /cmと良好な結果であった。
Example 3 25 parts by weight of potassium hydroxide, 15 parts by weight of monoethanolamine, 25 parts by weight of methyldiglycol, 1 part by weight of ethylenediaminetetraacetic acid tetrasodium salt, and 34 parts of water were used. Substituting parts by weight of the mixed solution and the sodium permanganate solution, a board was prepared in the same manner as in Example 1, and the performance characteristics of the circuit board were measured. The results of the adhesion strength of the conductor circuit are the same as in Table 1,
The adhesion strength was 1.2 to 1.3 kg / cm, which was a good result.

【0035】(比較例1)上記実施例の化学研磨処理液
を水酸化カリウム25重量部、エチレンジアミンテトラ酢
酸4ナトリウム塩1重量部、水74重量部の混合液と過マ
ンガン酸ナトリウムとして同様な測定を行ったが、導体
回路の密着強度は 0.2kg/cm以下であり、良好な結果が
得られなかった。
(Comparative Example 1) The same measurement was conducted using the chemical polishing treatment liquid of the above-mentioned embodiment as a mixed liquid of 25 parts by weight of potassium hydroxide, 1 part by weight of tetrasodium ethylenediaminetetraacetic acid salt and 74 parts by weight of water, and sodium permanganate. However, the adhesion strength of the conductor circuit was 0.2 kg / cm or less, and no good result was obtained.

【0036】[0036]

【表1】 [Table 1]

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の製造方法におけるビルドアップ法の工
程を示す図である。
FIG. 1 is a diagram showing steps of a build-up method in a manufacturing method of the present invention.

【符号の説明】[Explanation of symbols]

1 絶縁基材 2、8 導体回路 3、6 バイアホール 4 層間絶縁層 5 インタースティシャルバイアホール 7 導体層 1 Insulating Base Material 2, 8 Conductor Circuit 3, 6 Via Hole 4 Interlayer Insulating Layer 5 Interstitial Via Hole 7 Conductor Layer

【手続補正書】[Procedure amendment]

【提出日】平成7年5月10日[Submission date] May 10, 1995

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0010[Correction target item name] 0010

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0010】即ち、本発明は、第1の導体回路が形成さ
れた両面基板上に絶縁層を形成し、露光、現像により
VHを形成した後、必要に応じてはドリル加工にて貫通
孔を形成し、層間絶縁層表面を粗化し、パネル銅めっき
を施すことにより導通を確保し、次いで所望の第2の導
体回路をエッチングの手法またはパターン銅めっき及び
エッチングの手法を用いて形成する工程を反復すること
を特徴とする多層回路基板の製造方法に関する。
[0010] Namely, the present invention, the first double-sided substrate having conductor circuits are formed by forming an insulating layer, exposure and development I
After VH is formed, if necessary, a through hole is formed by drilling, the surface of the interlayer insulating layer is roughened, and panel copper plating is performed to ensure continuity, and then a desired second conductor circuit is formed. The present invention relates to a method for manufacturing a multi-layer circuit board, which is characterized by repeating the steps of forming using an etching method or a pattern copper plating and etching method.

【手続補正2】[Procedure Amendment 2]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0017[Correction target item name] 0017

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0017】さらに層間絶縁層(4) 表面を平滑にし、か
つ第2の導体回路(8) の密着性を向上させるために絶縁
樹脂の表面にフ研磨、ジェットスクラブ研磨などの機
械的研磨を施すことも可能である。
Furthermore interlayer insulating layer (4) The surface was smooth, and bar off polishing the surface of the insulating resin in order to improve the adhesion of the second conductor circuit (8), the mechanical polishing, such as jet scrubbing polishing It is also possible to apply.

【手続補正3】[Procedure 3]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0032[Name of item to be corrected] 0032

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0032】(実施例1)まず、銅箔厚み35μm の両面
銅張積層板を既知のパネルめっき法にて導体回路(1) を
形成し、両面回路基板を作成し、黒化処理にて導体回路
(1) の表面を粗化した。次に、エポキシ−アクリレート
系のアルカリ現像型液状フォトレジストをカーテンコー
ト法により、80μm の厚みで塗布し、熱風循環乾燥炉で
75℃、20分で仮乾燥する工程を両面に行った。このフォ
トレジストにIVH形成用のアートワークフィルムを任
意に位置合わせし、超高圧水銀灯ランプで 400mJ露光
し、10分放置した後、液温30℃、1wt%の炭酸水素ナト
リウム水溶液で現像し、IVHを形成した。更に、熱風
循環乾燥炉で 150℃、30分加熱し、フォトレジストを硬
化させ、層間絶縁層(4) を形成した後、水酸化カリウム
25重量部、ジエタノールアミン20重量部、メチルプロピ
レンジグリコール20重量部、エチレンジアミンテトラ酢
酸4ナトリウム塩1重量部、水34重量部の混合液に浸漬
して表面を粗化し、十分に水洗後、過マンガン酸ナトリ
ウム処理を施す、いわゆる化学研磨を行った。次に、層
間絶縁層(4) の上に厚み 0.3μm の銅を無電解銅めっき
し、更に厚み25μm の銅をパネル電解銅めっきにて堆積
させ、この後に熱風循環乾燥炉で120℃、30分ベーキン
グし、導体層(7) を形成した。第2の導体層(7) の全面
フ及びスクラブ研磨で整面し、ドライフィルムを用
いて第2の導体回路のパターンをイメージングした後、
塩化第二鉄液で不要な銅をエッチング除去することによ
って第2の導体回路(8) を形成し、IVHを有する4層
回路基板が得られた。この回路基板の性能特性を測定し
た結果を表1に示す。これより密着強度は 1.2〜1.3 kg
/cmと良好な結果であった。
(Example 1) First, a conductor circuit (1) was formed on a double-sided copper-clad laminate having a copper foil thickness of 35 μm by a known panel plating method, a double-sided circuit board was prepared, and a conductor was blackened. circuit
The surface of (1) was roughened. Next, an epoxy-acrylate type alkali-development type liquid photoresist is applied to a thickness of 80 μm by the curtain coating method, and then it is dried in a hot air circulating drying oven.
A step of temporary drying at 75 ° C. for 20 minutes was performed on both sides. An artwork film for IVH formation is arbitrarily aligned with this photoresist, exposed to 400 mJ with an ultra-high pressure mercury lamp and left for 10 minutes, then developed at a liquid temperature of 30 ° C. and a 1 wt% sodium hydrogencarbonate aqueous solution to produce IVH. Was formed. After heating at 150 ° C for 30 minutes in a hot air circulation drying oven to harden the photoresist and form the interlayer insulating layer (4), potassium hydroxide is added.
25 parts by weight, diethanolamine 20 parts by weight, methylpropylene diglycol 20 parts by weight, ethylenediaminetetraacetic acid tetrasodium salt 1 part by weight, water 34 parts by weight to roughen the surface, wash thoroughly with water, and then wash with permanganese. So-called chemical polishing, which is a sodium acid treatment, was performed. Next, 0.3 μm thick copper is electroless copper plated on the interlayer insulating layer (4), and further 25 μm thick copper is deposited by panel electrolytic copper plating. Minute baking was performed to form a conductor layer (7). After the entire surface of the second conductive layer (7) facing integer in bus off and scrub polishing and imaging the pattern of the second conductive circuit by using a dry film,
A second conductor circuit (8) was formed by etching away unnecessary copper with a ferric chloride solution, and a four-layer circuit board having IVH was obtained. The results of measuring the performance characteristics of this circuit board are shown in Table 1. Adhesion strength is 1.2 to 1.3 kg
The result was good as / cm.

【手続補正4】[Procedure amendment 4]

【補正対象書類名】図面[Document name to be corrected] Drawing

【補正対象項目名】図1[Name of item to be corrected] Figure 1

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【図1】 FIG.

フロントページの続き (72)発明者 石尾 宏 東京都荒川区東尾久7丁目2番35号 旭電 化工業株式会社内 (72)発明者 和田 辰男 神奈川県綾瀬市大上5丁目14番15号 株式 会社メイコー内 (72)発明者 吉野 篤 神奈川県綾瀬市大上5丁目14番15号 株式 会社メイコー内 (72)発明者 青島 克郎 神奈川県綾瀬市大上5丁目14番15号 株式 会社メイコー内 (72)発明者 村上 圭一 神奈川県綾瀬市大上5丁目14番15号 株式 会社メイコー内Front page continuation (72) Inventor Hiroshi Ishio 7-35 Higashiohisa, Arakawa-ku, Tokyo Asahi Denka Kogyo Co., Ltd. (72) Inventor Tatsuo Wada 5-14-15 Oue, Ayase City, Kanagawa Stock Company In Meiko (72) Inventor Atsushi Yoshino 5-14-15 Oue, Ayase City, Kanagawa Stock Company Meiko (72) Inventor Katsuro Aoshima 5-14-15 Oue, Ayase City, Kanagawa In Meiko Co., Ltd. (72 ) Inventor Keiichi Murakami 5-14-15 Oue, Ayase City, Kanagawa Prefecture Meiko Co., Ltd.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 第1の導体回路が形成された両面基板上
に絶縁層を形成し、露光、現像によりインタースティシ
ャルバイアホールを形成した後、必要に応じてはドリル
加工にて貫通孔を形成し、層間絶縁層表面を粗化し、パ
ネル銅めっきを施すことにより導通を確保し、次いで所
望の第2の導体回路をエッチングの手法またはパターン
銅めっき及びエッチングの手法を用いて形成する工程を
反復することを特徴とする多層回路基板の製造方法。
1. An insulating layer is formed on a double-sided substrate on which a first conductor circuit is formed, an interstitial via hole is formed by exposure and development, and then a through hole is drilled if necessary. A step of forming, roughening the surface of the interlayer insulating layer, and ensuring continuity by performing panel copper plating, and then forming a desired second conductor circuit using an etching method or a pattern copper plating and etching method. A method of manufacturing a multi-layer circuit board, characterized by repeating.
【請求項2】 層間絶縁層にアルカリ水溶液で現像が可
能な絶縁樹脂として、エポキシ−アクリレート系または
耐熱アクリレート系の絶縁樹脂を使用することを特徴と
する請求項1記載の多層回路基板の製造方法。
2. The method for producing a multilayer circuit board according to claim 1, wherein an epoxy-acrylate-based or heat-resistant acrylate-based insulating resin is used as the insulating resin that can be developed in the interlayer insulating layer with an alkaline aqueous solution. .
【請求項3】 層間絶縁層と導体回路との密着性向上の
ために層間絶縁樹脂表面の粗化処理を強アルカリ水溶液
組成物及び過マンガン酸ナトリウム水溶液で施すことを
特徴とする請求項1又は2記載の多層回路基板の製造方
法。
3. A method of roughening the surface of an interlayer insulating resin with a strong alkaline aqueous solution composition and a sodium permanganate aqueous solution for improving the adhesion between the interlayer insulating layer and the conductor circuit. 2. The method for manufacturing a multilayer circuit board according to item 2.
【請求項4】 強アルカリ水溶液組成物が無機アルカ
リ、水溶性アミン及び有機溶剤の3成分を含む混合水溶
液である請求項3記載の多層回路基板の製造方法。
4. The method for producing a multilayer circuit board according to claim 3, wherein the strong alkaline aqueous solution composition is a mixed aqueous solution containing three components of an inorganic alkali, a water-soluble amine and an organic solvent.
【請求項5】 層間絶縁層と導体回路との密着性を向上
させるために層間絶縁樹脂表面にパネル銅めっきした後
に、加熱処理を施すことを特徴とする請求項1〜4の何
れか1項に記載の多層回路基板の製造方法。
5. The heat treatment is applied to the surface of the interlayer insulating resin after panel copper plating in order to improve the adhesion between the interlayer insulating layer and the conductor circuit. A method for manufacturing the multilayer circuit board according to.
JP8036895A 1995-04-05 1995-04-05 Manufacture of multilayered circuit board Pending JPH08279682A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8036895A JPH08279682A (en) 1995-04-05 1995-04-05 Manufacture of multilayered circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8036895A JPH08279682A (en) 1995-04-05 1995-04-05 Manufacture of multilayered circuit board

Publications (1)

Publication Number Publication Date
JPH08279682A true JPH08279682A (en) 1996-10-22

Family

ID=13716335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8036895A Pending JPH08279682A (en) 1995-04-05 1995-04-05 Manufacture of multilayered circuit board

Country Status (1)

Country Link
JP (1) JPH08279682A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0952762A1 (en) * 1996-12-19 1999-10-27 Ibiden Co, Ltd. Printed wiring board and method for manufacturing the same
KR100487812B1 (en) * 2002-06-26 2005-05-06 엘지전자 주식회사 PCB having a fine pitch circuit pattern making method

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0952762A1 (en) * 1996-12-19 1999-10-27 Ibiden Co, Ltd. Printed wiring board and method for manufacturing the same
EP0952762A4 (en) * 1996-12-19 2005-08-31 Ibiden Co Ltd Printed wiring board and method for manufacturing the same
US7361849B2 (en) 1996-12-19 2008-04-22 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
US7371976B2 (en) 1996-12-19 2008-05-13 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
US7385146B2 (en) 1996-12-19 2008-06-10 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
US7388159B2 (en) 1996-12-19 2008-06-17 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
US7449791B2 (en) 1996-12-19 2008-11-11 Ibiden Co., Ltd. Printed circuit boards and method of producing the same
US7585541B2 (en) 1996-12-19 2009-09-08 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
US7615162B2 (en) 1996-12-19 2009-11-10 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
US7712212B2 (en) 1996-12-19 2010-05-11 Ibiden Co., Ltd. Method for manufacturing printed wiring board
USRE43509E1 (en) 1996-12-19 2012-07-17 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
KR100487812B1 (en) * 2002-06-26 2005-05-06 엘지전자 주식회사 PCB having a fine pitch circuit pattern making method

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