JPH08272638A - Image processor - Google Patents

Abstract

PURPOSE: To smoothly carry on the image processing and also to improve the overall fault resistance of an image processor by preparing plural image processing means and securing the supplementary operations among these processing means based on their loading and fault states. CONSTITUTION: A CPU 906 sends a signal to a connector 910 and checks the connection state of a device. If the device is not connected to a connector 910, the CPU 906 processes the image information stored in a memory 904 and writes this processing result in the memory 904. If the device is connected to the connector 910, the type of the device is decided. In this instance, the CPU 906 asks an option CPU 911 to perform the image processing if the device is identical with a CPU that has a higher rank than the CPU 906. The CPU 911 processes the image information stored in the memory 904 and writes this processing result in the memory 904. In such a way, the device is virtually separated from the connector 910 when the device is not normal. Then another device is used so that the fault resistance is improved for 811 image processor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for generating an image using a plurality of image processing functions.

[0002]

2. Description of the Related Art Conventionally, in order to meet a wide range of user demands, in order to realize high functionality and high performance as options,
There is an image processing apparatus that provides both an inexpensive basic device that is inferior in terms of performance and function and a high-performance and highly functional device that is costly but inexpensive.

[0003]

However, in the above-mentioned conventional image processing apparatus, when the above-mentioned option is added to the apparatus, there is a function that can be originally processed when a failure occurs in this option part. There is a problem that all processing becomes impossible.

The present invention has been made in view of the above problems, and an object of the present invention is to prepare a plurality of image processing functions and to provide MTBF (Mean Time Between Failu) of the apparatus.
It is to provide an image processing device that improves res).

[0005]

[Means for Solving the Problems] and

To achieve the above object, the present invention provides a first image processing means, a detachable second image processing means, and whether or not the second image processing means is attached to the image processing apparatus. And a means for detecting the presence / absence of a failure in the second image processing means, wherein the second image processing means is attached to the image processing apparatus, and the second image processing means is provided. If no failure is detected, the second image processing means performs image processing, and if the second image processing means is not attached, the first image processing means performs image processing. If the second image processing means is attached to the image processing apparatus and a failure of the second image processing means is detected, the first image processing means performs image processing.

In the above structure, the function of improving the fault tolerance of the entire device is improved.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 is a block diagram showing a configuration of an image processing system (hereinafter referred to as a system) according to an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an image input device (hereinafter, referred to as a reader unit) for converting a document image into image data, and 2 has plural kinds of recording paper cassettes, and image data is recorded on recording paper by a print command. An image output device that outputs a visible image (hereinafter referred to as a printer unit), 3
Is an external device electrically connected to the reader unit 1,
It has various functions described later.

The external device 3 stores information from the file unit 5, the external storage device 6 connected to the file unit 5, the computer interface unit 7 for connecting to the computer terminal device 8, and the reader unit 1. In addition, an image memory unit 9 for temporarily storing the information sent from the computer terminal device 8, and a core unit 10 for controlling the above-mentioned functions are provided.

The functions of the above-mentioned units will be described in detail below. <Description of Reader Unit 1> FIG. 2 shows the reader unit 1 according to the present embodiment.
3 is a cross-sectional view showing the configuration of the printer unit 2. FIG. The configuration and operation will be described below.

Documents (not shown) stacked on the document feeder 101 shown in FIG. 2 are sequentially transferred one by one to the platen glass surface 10.
2 is transported to above. When the document is conveyed, the lamp 103 of the scanner unit is turned on and the scanner unit 10
4 moves to illuminate the document. Then, the reflected light from the document passes through the lens 108 through the mirrors 105, 106 and 107 in order, and then the CCD image sensor unit 1
09 (hereinafter referred to as CCD) 9 is input.

FIG. 3 is a block diagram for explaining signal processing in the reader unit 1. In the figure, the CCD 10
The image information input to 9 is photoelectrically converted here and converted into a predetermined electric signal. The color information from the CCD 109 is transmitted to the next amplifier 110R, 110G, 110B.
Then, the signal is amplified according to the input signal level of the A / D converter 111 in the next stage. Then, the output signal from the A / D converter 111 is input to the shading circuit 112, where the light distribution unevenness of the lamp 103 and the sensitivity unevenness of the CCD 109 are corrected. The signal from the shading circuit 112 is input to the Y signal / color detection circuit 113 and the external I / F switching circuit 119.

The Y signal generation / color detection circuit 113 performs a calculation on the signal from the shading circuit 112 according to the following equation (1) to obtain a Y signal.

Y = 0.3R + 0.6G + 0.1B (1) The Y signal generation / color detection circuit 113 further includes R, G, B
It has a color detection circuit that separates the signal of 7 colors into 7 colors and outputs the signal for each color. The output signal from the Y signal generation / color detection circuit 113 is input to the scaling / repeat circuit 114 to perform scaling in the sub-scanning direction based on the scanning speed of the scanner unit 104, and the scaling / repeat circuit 1.
Magnification change in the main scanning direction is performed by 14. Further, the scaling / repeat circuit 114 can output a plurality of identical images.

In the contour / edge emphasis circuit 115, scaling /
By emphasizing the high frequency component of the signal from the repeat circuit 114, edge enhancement and contour information are obtained. The signal from the contour / edge enhancement circuit 115 is input to the marker area determination / contour generation circuit 116 and the patterning / thickening / masking / trimming circuit 117.

Marker area determination / contour generation circuit 116
Reads a portion of a document written with a marker pen of a designated color, generates contour information of the marker, and then performs the next patterning / thickening / masking / trimming circuit 1.
At 17, the thickening, masking, and trimming are performed based on this contour information. In addition, the Y signal generation / color detection circuit 113
Patterning is performed by the color detection signal from.

An output signal from the patterning / thickening / masking / trimming circuit 117 is input to a laser driver circuit 118 and variously processed signals are converted into signals for driving a laser. The output signal of the laser driver 118 is input to the printer 2 and image formation is performed as a visible image.

Next, the external I / F switching circuit 119 for interfacing (I / F) with the external device 3 will be described.

When outputting the image information from the reader unit 1 to the external device 3, the external I / F switching circuit 119 outputs the image information from the patterning / thickening / masking / trimming circuit 117 to the connector 120. When the image information from the external device 3 is input to the reader unit 1, the external switching circuit 119 inputs the image information from the connector 120 to the Y signal generation / color detection circuit 113.

The above-mentioned image processing is performed in accordance with an instruction from the CPU 122, and the area signal generating circuit 121 generates various timing signals necessary for the image processing according to the value set by the CPU 122. further,
Communication with the external device 3 is performed using the communication function built in the CPU 122. In addition, SUB / CPU123
Controls the operation unit 124, and
Communication with the external device 3 is performed using the communication function built in the PU 123. <Description of Printer Unit 2> Referring to FIG. 2, the printer unit 2
The configuration and operation of will be described.

The signal input to the printer unit 2 is converted into an optical signal by the exposure control unit 201, and the photoconductor 202 is illuminated according to the image signal. With this irradiation light, the photoconductor 20
The latent image formed on 2 is developed by the developing device 203. The transfer paper is conveyed from the transfer paper stacking section 204 or the transfer paper stacking section 205 at the same timing as the above development, and the developed image is transferred at the transfer section 206. The transferred image is fixed on the transfer paper by the fixing unit 207, and then discharged from the paper output unit 208 to the outside of the apparatus. The transfer paper output from the paper output unit 208 is
When the sort function is working in the sorter 220, it is discharged to each bin, and when the sort function is not working, it is discharged to the highest bin of the sorter 220.

Next, a method for outputting sequentially read images on both sides of one output sheet will be described.

When the images to be sequentially read are output on both sides of one output sheet, the output sheet fixed by the fixing section 207 is once conveyed to the sheet discharge section 208, and then the conveyance direction of the sheet is reversed and the conveyance direction is changed. The sheet is conveyed to the re-transferred transfer sheet stacking section 210 via the switching member 209. Then, when the next original is prepared, the original image is read in the same manner as in the above process, but since the transfer paper is fed from the re-transferred transfer paper stacking section 210, the same result is obtained. It is possible to output two document images on the front surface and the back surface of the output paper. <Description of External Device 3> The external device 3 is connected to the reader unit 1 by the cable 12, and the core unit 10 in the external device 3
Controls signals and functions. This external device 3
Converts various document information into electric signals as described above,
The information from the file unit 5 stored on the magneto-optical disk, the computer interface unit 7 for interfacing with the computer terminal device 8, the reader unit 1, and the information sent from the computer terminal device 8 are temporarily stored. An image memory unit 9 for storing,
It is composed of a core unit 10 that controls each of the above functions. <Description of Core Unit 10> FIG. 4 is a block diagram showing a detailed configuration of the core unit 10.

Connector 1001 of core portion 10 shown in FIG.
Is connected to the connector 120 of the reader unit 1 by a cable. The connector 1001 contains four types of signals,
The signal 1057 is an 8-bit multilevel video signal, and the signal 10
Reference numeral 55 denotes a control signal for controlling the video signal, which is a signal 1051.
Is a signal for communicating with the CPU 122 in the reader unit 1, and a signal 1052 is a SUB signal in the reader unit 1.
A signal for communicating with the CPU 123. Of these signals, the signal 1051 and the signal 1052 are subjected to communication protocol processing by the communication IC 1002, which is the CPU.
Communication information is transmitted to the CPU 1003 via the bus 1053.

The transmission path of the signal 1057 is a bidirectional video signal line, and the core unit 10 receives information from the reader unit 1 and outputs the information from the core unit 10 to the reader unit 1. Is possible.

The transmission path for the signal 1057 is the buffer 1
010, where the bidirectional signals are separated into unidirectional signals 1058, 1070. Of these, the signal 1058 is an 8-bit multi-valued video signal input from the reader unit 1, and is input to the LUT 1011 in the next stage. The LUT 1011 converts the image information from the reader unit 1 into a desired value by referring to a built-in lookup table.

Output signal 1059 from LUT 1011
Is input to the binarization circuit 1012 or the selector 1013. The binarization circuit 1012 has a multilevel signal 10
A simple binarization function of binarizing 59 with a fixed slice level, a binarization function of a variable slice level in which the slice level fluctuates from the values of pixels around the pixel of interest, and a binarization function of an error diffusion method. Have. The binarized information is converted into a multilevel signal of 00H when the value is “0” and FFH when the value is “1”, and these are input to the selector 1013 at the next stage.

The selector 1013 selects either the signal from the LUT 1011 or the output signal of the binarization circuit 1012, and the output signal 106 from the selector 1013 is selected.
0 is input to the selector 1014. Selector 101
Reference numeral 4 denotes output video signals from the file unit 5, computer interface unit 7 and image memory unit 9 via connectors 1006, 1007 and 1009, respectively.
The signal 1064 input to the core unit 10 and the selector 101
The output signal 1060 from the CPU 3 is selected by the instruction of the CPU 1003.

Output signal 1061 from selector 1014
Is input to the rotation circuit 1015 or the selector 1016. The rotation circuit 1015 has a function of rotating the input image signal by +90 degrees, -90 degrees, and +180 degrees. The rotation circuit 1015 stores the information after the information output from the reader unit 1 is converted into a binary signal by the binarization circuit 1012 as information from the reader unit 1.

Next, according to an instruction from the CPU 1003,
The rotation circuit 1015 rotates and reads the stored information. The selector 1016 outputs the output signal 1062 from the rotation circuit 1015 and the input signal 106 to the rotation circuit 1015.
1 is selected and output as a signal 1063 to the connector 1006 with the file unit 5, the connector 1007 with the computer interface unit 7, the connector 1009 with the image memory unit 9 and the selector 1017.

The path of the signal 1063 is a synchronous 8-bit unidirectional video bus for transferring image information from the core unit 10 to the file unit 5, computer interface unit 7 and image memory unit 9. The path of the signal 1064 is a synchronous 8-bit unidirectional video bus for transferring image information from the file unit 5, computer interface unit 7, and image memory unit 9. The video control circuit 1004 controls the synchronous bus of the signals 1063 and 1064, and this control is performed by the output signal 1056 from the video control circuit 1004.

In addition to the above signals, a signal 1054 is connected to the connectors 1006, 1007, 1009, respectively. The path of this signal 1054 is bidirectional 16-bit C.
It is a PU bus and exchanges data commands asynchronously. Further, the file unit 5, the computer interface unit 7, the image memory unit 9 and the core unit 10
The transfer of information to and from the two video buses 106 above.
3, 1064 and CPU bus 1054 enable this.

The signal 1064 from the file unit 5, computer interface unit 7, and image memory unit 9 is
It is input to the selector 1014 and the selector 1017. Further, the selector 1014 inputs the signal 1064 to the rotation circuit 1015 of the next stage according to the instruction of the CPU 1003.

The selector 1017 selects either the signal 1063 or the signal 1064 according to an instruction from the CPU 1003. Output signal 1065 from this selector 1017
Is input to the pattern matching 1018 and the selector 1019. The pattern matching 1018 performs pattern matching with a predetermined pattern on the input signal 1065, and when the patterns match, outputs a predetermined multi-valued signal to the signal line 1066. However, if no match is found in this pattern matching, the input signal 1065
Is output as the signal 1066 as it is.

The selector 1019 selects either the signal 1065 or the signal 1066 according to an instruction from the CPU 1003, and the output signal 1067 is input to the LUT 1020 of the next stage. The LUT 1020, when outputting the image information to the printer unit 2, receives the input signal 10 according to the printer characteristics.
67 is converted and output as a signal 1068.

The selector 1021 outputs the output signal 1068 from the LUT 1020 and the above-mentioned signal 1065 to the CPU.
The output signal from the selector 1021 selected by the instruction of 1003 is input to the enlargement circuit 1022 at the next stage. The enlarging circuit 1022 can set the enlarging / reducing magnification independently in the X and Y directions according to an instruction from the CPU 1003, and the enlarging / reducing method here is a linear interpolation method of the first order. Then, the output signal 1070 from the expansion circuit 1022 is input to the buffer 1010.

The signal 107 input to the buffer 1010
0 indicates a bidirectional signal 1057 according to an instruction from the CPU 1003.
And the printer unit 2 via the connector 1001.
Printed out by being sent to.

Next, the signal flow between the core section 10 and each section will be described. <Operation of Core Unit 10 Based on Information of File Unit 5> (1) When Information from the Reader Unit 1 is Output to the File Unit 5 When image information from the scanner unit 1 is output to the file unit 5, the CPU 1003 performs communication. It communicates with the CPU 122 of the reader unit 1 via the IC 1002 for use to issue a document scan command. In the reader unit 1, this command causes
Image information is output to the connector 120 as the scanner unit 104 scans the document.

As described above, the reader unit 1 and the external device 3 are connected by the cable 12, and the information from the reader unit 1 is input to the connector 1001 of the core unit 10. Further, the image information input to the connector 1001 is further input to the buffer 1010, which becomes a signal 1058 which is a unidirectional multi-valued 8-bit signal. The signal 1058 is converted into a desired signal by the LUT 1011.

Output signal 1059 from LUT 1011
Is input to the connector 1006 via the selector 1013, the selector 1014, and the selector 1016. That is, the binarization circuit 1012 and the rotation circuit 101
The signal is transferred to the file unit 5 in the 8-bit multi-valued state without using the function of 5.

However, the CPU bus 10 of the CPU 1003
When filing the binarized signal by communicating with the file unit 5 via 54, the output signal 1059 from the LUT 1011 is input to the binarization circuit 1012 at the next stage, and the binarization circuit 1012 , 8-bit multilevel signal 10
59 is converted into a binary signal. This binarization circuit 1012
Converts the input signal into two multi-level signals, such as outputting 00H when the binarized signal is "0" and FFH when it is "1". Then, the binarization circuit 10
The output signals from 12 are the selector 1013 and the selector 1.
014 through the rotation circuit 1015 or the selector 1
It is input to 016.

Output signal 1062 from rotating circuit 1015
Is also input to the selector 1016, and the selector 101
6 selects either the signal 1061 or the signal 1062. This signal is selected by the CPU bus 1 of the CPU 1003.
It is determined by communicating with the file unit 5 via 054. Then, the output signal 1 from the selector 1016
063 is sent to the file unit 5 via the connector 1006. (2) When receiving and outputting information from the file unit 5 The image information from the file unit 5 is transmitted to the signal line 1064 via the connector 1006. The signal 1064 on this signal line corresponds to the selector 1014 and the selector 10
In the case of 8-bit multi-value filing, it can be input to the selector 1017, and in the case of binary filing, it can be input to the selector 1014 or the selector 1017.

In the binary filing, when the image of the file is rotated and output to the printer unit 2 according to the instruction of the CPU 1003, the image is input to the selector 1014 and the selected signal 1064 is rotated by the rotation circuit 1015. To process. Then, the output signal 10 from the rotating circuit 1015
62 is input to the pattern matching 1018 via the selector 1016 and the selector 1017.

When the image of the file is directly output to the printer unit 2 according to the instruction of the CPU 1003, the signal 10164 input to the selector 1017 is input to the pattern matching 1018. The pattern matching 1018 has a function of smoothing the rattling of the file image. Then, the pattern-matched signal is input to the LUT 1020 via the selector 1029.

On the other hand, in the case of multi-value filing, the output signal 1065 from the selector 1017 is sent to the selector 101.
9 into the LUT 1020. This LUT10
20, the CPU 10 is adjusted according to the desired print density.
A lookup table is created according to the instruction of 03. L
The output signal 1067 from the UT 1020 is the selector 10
It is input to the enlargement circuit 1022 via 21.

The 8-bit multi-level signal 1070 expanded to a desired expansion ratio by the expansion circuit 1022 is stored in the buffer 101.
0, it is sent to the reader unit 1 via the connector 1001. The reader unit 1 inputs this signal to the external I / F switching circuit 119 via the connector 120. And
The external I / F switching circuit 119 inputs the signal from the file unit 5 to the Y signal generation / color detection circuit 113. The output signal from the Y signal generation / color detection circuit 113 is subjected to the above-described processing and then output to the printer unit 2 to form an image on an output sheet. <Operation of Core Unit 10 Based on Information of Computer Interface Unit 7> Computer interface unit 7
Interface with the computer terminal device 8 connected to the external device 3. The computer interface section 7 includes a plurality of interfaces for communicating with SCSI, RS-232C, and Centronics. Information from the above interfaces is sent to the CPU 10 via the connector 1007 and the data bus 1054.
Sent to 03. Then, the CPU 1003 performs various controls described below based on the content of the sent information. <Operation of Core Unit 10 Based on Information of Image Memory Unit 9> (1) When Outputting Image Information Read from Reader Unit 1 to Image Memory Unit 9 The CPU 1003 reads the reader unit 1 via the communication IC 1002. The CPU 122 communicates with the CPU 122 to issue a document scan command. In the reader unit 1, the scanner unit 104 scans the document according to this command, and outputs image information to the connector 120. Since the reader unit 1 and the external device 3 are connected by the cable 12, the reader unit 1
The image information from is input to the connector 1001 of the core unit 10.

The image information input to the connector 1001 is the multi-valued 8-bit signal line 1057 and the buffer 10.
Sent to LUT 1011 via 10. And LU
The output signal 1059 from T1011 is the selector 101
It is transferred to the image memory section 9 as multi-valued image information via 3, 10, 14 and 1016 and the connector 1009.

The image information stored in the image memory unit 9 is sent to the CPU 1003 via the CPU bus 1054 of the connector 1009 when being transferred to the computer interface unit 7. The CPU 1003 transfers the data sent from the image memory unit 9 to the computer interface unit 7 described above. The computer interface unit 7 transfers to the computer by a desired interface among the above three types of interfaces (SCSI, RS-232C, Centronics). (2) When receiving image information from the image memory unit 9 First, the image information is sent from the computer terminal 8 to the core unit 10 via the computer interface unit 7. When the CPU 1003 of the core unit 10 determines that the data sent from the computer interface unit 7 via the CPU bus 1054 is data relating to the image memory unit 9, it transfers it to the image memory unit 9 via the connector 1009. To do.

The image memory unit 9 has a connector 1009.
8 bit multi-level signal 1064 via selector 101
4, transmitted to the selector 1017. And selector 1
014, or the output signal from the selector 1017 is C
In accordance with an instruction from the PU 1003, the file is output to the printer unit 2 as in the case of the above file, and the image is formed on the output paper there. <Description of File Unit 5> FIG. 5 is a block diagram showing a detailed configuration of the file unit 5.

The file unit 5 is connected to the core unit 10 via the connector 500 and exchanges various signals.
The input signal 551, which is a multivalued image signal, is input to the compression circuit 50.
3 is input, where multi-valued image information is converted into compressed information and output to the memory controller 510.

The output signal 552 from the compression circuit 503 is
Under the control of the memory controller 510, the memory A50
6, memory B507, memory C508, memory D509
Or one of these memories in which two sets of memories are cascade-connected.

The memory controller 510 is the CPU 51.
6, a mode for exchanging data between the memory A 506, the memory B 507, the memory C 508, the memory D 509 and the CPU bus 560, and a mode for exchanging data with the CODEC bus 570 of the CODEC 517 for encoding / decoding, The contents of memory A506, memory B507, memory C508, and memory D509 are
The scaling circuit 5 is controlled by the DMA controller 518.
Under the control of the timing generation circuit 514, a mode for exchanging data with the bus 562 from
Is stored in any of the memories A506 to D509, and a mode in which the memory contents are read out from any of the memories A506 to D509 and output to the signal line 558.

The memory A 506, the memory B 507,
Memory C508 and memory D509 are 2 Mby each
It has a capacity of tes and stores an image corresponding to A4 size at a resolution of 400 dpi.

The timing generation circuit 514 is connected to the connector 5
00 and the signal line 553, and the core unit 10
Control signals from (HSYNC, HEN, VSYNC, V
EN) to generate signals for performing the following two functions. One of them is a function of storing the information from the core unit 10 in any one of the memories A506 to D509 or two of them, and the second function is to store the information in the memories A506 to D509. D5
09 is a function of reading out image information from any one of them and transmitting it to the signal line 556.

The dual port memory 515 is a CPU of the core unit 10 via the signal line 554 and the connector 500.
1003, and is also connected to the CPU 516 of the file unit 5 via a signal line 560. Each CP
The U exchanges commands via the dual port memory 515. Also, the SCSI controller 5
Reference numeral 19 interfaces with the external storage device 6 connected to the file unit 5 shown in FIG.

The external storage device 6 is specifically composed of a magneto-optical disk and stores data such as image information.

The CODEC 517 reads out the image information stored in any of the memories A506 to D509, encodes it according to a desired method among MH, MR, and MMR, and then performs any one of the memories A506 to D509. The crab is stored as encoded information. Also, CODE
The C517 reads the encoded information stored in the memory A506 to the memory D509, decodes the encoded information by a desired one of the MH, MR, and MMR methods, and then, the memory A5.
06-stored in any of the memories D509 as decryption information, that is, image information. (1) Description of storing file information in the external storage device 6 The 8-bit multi-valued image signal from the reader unit 1 is the connector 50.
It is input from 0, and is input to the compression circuit 503 through the signal line 551. Then, the multi-valued image signal input to the compression circuit 503 is converted into compression information 552,
It is input to the memory controller 510. The memory controller 510 stores the compressed signal 552 in the memory A 506 according to the timing signal 559 generated by the timing generation circuit 559 by the signal 553 from the core unit 10.

The CPU 516 is the memory controller 51.
0 memory A506 and memory B507 to CODEC5
17 bus lines 570. CODEC 517
Reads the compressed information from the memory A 506,
Encoding is performed by the R method, and the obtained encoded information is written in the memory B507. When the CODEC 517 finishes the encoding, the CPU 516 controls the memory controller 510.
Memory B 507 of the above is connected to the CPU bus 560. Then, the CPU 516 stores the encoded information in the memory B50.
Sequentially read from 7, SCSI controller 51
Transfer to 9. The SCSI controller 519 stores the encoded information 572 in the external storage device 6. (2) Explanation when information is fetched from the external storage device 6 and output to the printer unit 2. When the information retrieval / print command is received, the CPU
516 receives the encoded information from the external storage device 6 via the SCSI controller 519 and transfers the encoded information to the memory C508. At this time, the memory controller 510 receives a C instruction from the CPU 516.
PU bus 560 is connected to bus 566 of memory C508. When the transfer of the encoded information to the memory C508 is completed, the CPU 516 causes the memory controller 510 to
By controlling the memory C508 and the memory D50.
9 to bus 570 of CODEC 517. COD
The EC 517 reads the encoded information from the memory C 508, sequentially decodes it, and then transfers it to the memory D 509.

When it is necessary to change the magnification such as enlargement / reduction when outputting to the printer unit 2 and the image memory unit 9, the memory D
509 is connected to the bus 562 of the scaling circuit 511, and DMA
Under the control of the controller 518, the contents of the memory D509 are scaled.

The CPU 516 is the dual port memory 5
Communication with the CPU 1003 of the core unit 10 is performed via 15, and settings for printing out an image from the memory D509 through the core unit 10 to the printer unit 2 are performed. When this setting is completed, the CPU 516 activates the timing generation circuit 514 and outputs a predetermined timing signal from the signal line 559 to the memory controller 510.

The memory controller 510 reads the decoded information from the memory D509 in synchronization with the signal from the timing generation circuit 514 and transmits it to the signal line 556. The signal on the signal line 556 is input to the decompression circuit 504, where the information is decompressed. Expansion circuit 50
An output signal 555 from the connector 4 is output to the core unit 10 via the connector 500, and the connector 500 outputs the output signal 555 to the printer unit 2.
Is output to the core unit 10
Since it is the same as the case in 1, the description thereof will be omitted. <Description of the computer interface section 7> FIG.
FIG. 3 is a block diagram showing the configuration of the computer interface unit 7.

In FIG. 6, a connector A700 and a connector B701 are SCSI interface connectors, a connector C702 is a Centronics interface connector, and a connector D703 is RS-232S.
Interface connector and connector E70
Reference numeral 7 is a connector for connecting to the core portion 10.

The SCSI interface has two connectors (connector A700, connector B701),
When connecting a device having a plurality of SCSI interfaces, a connector A700 and a connector B701 are used for cascade connection. When the external device 3 and the computer are connected one-to-one, the connector A700 is connected to the computer with a cable, and the connector B701 is connected to a terminator (terminator) or the connector B7.
01 and the computer with a cable, connector A7
Connect a terminator to 00.

Information input from the connector A 700 or the connector B 701 is sent to the SCSI I / F-A 704 or the SCSI I / F-A 704 via the signal line 751.
-Input to I / F-B708. SCSI I / F-
A704 or SCSI I / F-B708 is S
After performing the procedure according to the CSI protocol, the data is output to the connector 707E via the signal line 754. The connector E707 is the CPU bus 1 of the core unit 10.
054 and is connected to the CPU 1003 of the core unit 10.
Receives from the CPU bus 1054 the information input to the SCSI / I / F connector (connector A700, connector B701).

When outputting the data from the CPU 1003 of the core unit 10 to the SCSI connector (connector A700, connector B701), the procedure is reversed.

The Centronics interface is connected to the connector C702 and input to the Centronics I / F 705 via the signal line 752. The Centronics I / F 705 receives data according to a predetermined protocol and outputs it to the connector E707 via the signal line 754. The connector E707 is connected to the CPU bus 1054 of the core unit 10, and the CPU 1003 of the core unit 10 receives the information input to the Centronics I / F connector (connector C702) from the CPU bus 1054.

The RS-232C interface is connected to the connector D703 and connected to the R line via the signal line 753.
It is input to the S-232C I / F 706. This RS-
The 232C I / F 706 also receives data according to a predetermined protocol and sends the signal to the signal line 754.
To the connector E707. Connector E70
7 is connected to the CPU bus 1054 of the core unit 10, and the CPU 1003 of the core unit 10 is connected to the CPU bus 1054.
4 receives the information input to the RS-232C I / F connector (connector D703).

When outputting data from the CPU 1003 of the core unit 10 to the RS-232C I / F connector (connector D703), the procedure is reversed. <Description of Image Memory Unit 9> FIG. 7 is a block diagram showing the configuration of the image memory unit 9.

The image memory unit 9 is connected to the core unit 10 via the connector 900 and exchanges various signals. The input signal 954 is stored in the memory 904 under the control of the memory controller 905. The memory controller 905 is instructed by the CPU 906 to operate the memory 9
04 and the CPU bus 957 in a mode for exchanging data, under the control of the timing generation circuit 902, the signal 9
It has three functions: a mode for storing 54 in the memory 904 and a mode for reading the memory contents from the memory 904 and outputting it to the signal line 955.

The memory 904 has a memory capacity of 32 Mbytes capable of storing an image corresponding to A3 size with 400 dpi resolution and 256 gradations.

The timing generation circuit 902 is connected to the connector 9
00 and the signal line 952, and the core unit 10
Control signals from (HSYNC, HEN, VSYNC, V
EN) to generate signals for accomplishing the following two functions. One is the function of storing information from the core unit 10 in the memory 904, and the second is the memory 9
04 is a function of reading information from the communication terminal 04 and transmitting it to the signal line 955.

In the dual port memory 903, the CPU 1003 of the core unit 10 via the signal line 953 and the C of the image memory unit 9 via the signal line 957.
The PU 906 is connected. Each CPU exchanges commands via the dual port memory 903. Then, the connector 91 on the signal line 957
A CPU 911 is connected to 0 in an optional format. (1) Description of accumulation of image information in the image memory unit 9 and transfer of that information to a computer The 8-bit multi-valued image signal from the reader unit 1 is output by the connector 90.
0, and is input to the memory controller 905 via the signal line 954. Memory controller 90
5 stores the above signal 954 in the memory 904 according to the timing signal 956 generated by the timing generation circuit 902 by the signal 952 from the core unit 10.

The CPU 906 is the memory controller 90.
No. 5 memory 904 is connected to the CPU bus 957. CP
The U906 sequentially reads the image information from the memory 904 and transfers it to the dual port memory 903. The CPU 1003 of the core unit 10 reads the image information of the dual port memory 903 of the image memory unit 9 via the signal line 953 and the connector 900, and transfers this information to the computer interface unit 7.

The computer interface section 7
Since the transfer of information from the computer to the computer has been described above, its description is omitted here. (2) Description of outputting image information from the computer terminal 8 to the printer unit 2 The image information from the computer terminal 8 is sent to the core unit 10 via the computer interface unit 7, and the CPU 1003 of the core unit 10 , CPU bus 105
Image memory unit 9 via the connector 4 and the connector 1009.
The image information is transferred to the dual port memory 903. At this time, the CPU 906 determines that the memory controller 90
5, and connects the CPU bus 957 to the bus of the memory 904. The CPU 906 is a dual port memory 90.
3 to transfer the image information to the memory 904 via the memory controller 905.

When the CPU 906 finishes transferring the image information to the memory 904, it controls the memory controller 905 to change the data line of the memory 904 to the signal line 95.
Connect to 5. The CPU 906 communicates with the CPU 1003 of the core unit 10 via the dual port memory 903, and makes settings to print out image information from the memory 904 to the printer unit 2 through the core unit 10.

When the above setting is completed, the CPU 906
Activates the timing generation circuit 902 and inputs a predetermined timing signal to the memory controller 905 from the signal line 956. The memory controller 905 is
The image information is read from the memory 904 in synchronization with the signal from the timing generation circuit 902, transmitted to the signal line 955, and output to the connector 900.

Since the route from the connector 900 to the output to the printer unit 2 is the same as that in the core unit 10 described above, its explanation is omitted. (3) Image Processing for Image Information Accumulated in Memory 904 Image processing for image information accumulated in the memory 904 will be described with reference to the flowchart shown in FIG.

The CPU 906 sends a signal to the connector 910 to check whether any device is connected thereto (step S81 in FIG. 8). If it is determined that nothing is connected to the connector 910 (step S81)
Then, the CPU 906 performs image processing on the image information stored in the memory 904 (step S85), and writes the result in the memory 904 (step S86). However, if any device is connected to the connector 910, the type of the device is determined in step S82.

In the above determination, if the connected device is the upper CPU of the CPU 906 (YES in step S83), the CPU 906 requests the option CPU 911 for image processing. Therefore, the option CPU 911 performs image processing on the image information stored in the memory 904 (step S84),
The result is written in the memory 904 (step S86).

As described above, according to this embodiment,
The device that performs image processing is regularly inspected, and whether or not the device is normal is monitored. If it is determined that the device is not normal, the device is virtually disconnected and processing is continued on other devices. Therefore, the fault tolerance of the entire device can be improved.

As shown in FIG. 7, as an option, an image rotation board 912 for realizing image rotation processing by hardware is connected to the connector 910 on the signal line so that the image information stored in the memory 904 can be displayed. Also in the case of performing the image rotation process for the same, as in the above embodiment, for example, as shown in the flowchart of FIG.
The CPU 906 periodically inspects the device and constantly monitors whether it is operating normally (step S92). If the device is normal, in step S93, the normal device is rotated.

However, when it is determined that the image rotation board 912 is not normal, the device is virtually disconnected (step S94), and the subsequent image rotation processing is performed by CP.
U906 continues (step S95). Regarding the image rotation processing after disconnecting the device, the CPU 90
However, the CPU 906 may be replaced by another board having an image rotation processing function. <Modification> FIG. 10 is a diagram showing a device configuration according to a modification of the above embodiment. In the figure, the personal computer 9001 is connected via a SCSI cable 9003.
It is connected to a CR (character recognition) device 9002. When performing character recognition with this device, the personal computer 9
The character recognition application installed in 001 cuts out a character from the image information and sends it to the OCR device 9002. The OCR device 9002 performs pattern matching in parallel by hardware (not shown) from the transmitted image information. Then, the character closest to the image information is determined, and the ASCII code corresponding to the character is sent back to the application.

The above processing is performed for each of the cut characters to obtain the character recognition result of the entire image. Here, when the application performs a series of character recognition,
First, the OCR device 9002 is inspected. Then, when a check command is sent and the OCR device 9002 returns a normal response, the above character recognition processing is performed.

However, if a normal response is not returned, a message to that effect is displayed on the personal computer 9001 and the user is asked whether to continue the process. When the user selects to continue, the OCR device 9002 is logically disconnected, the OCR device is virtually constructed in the personal computer 9001, and all the processing is performed by the personal computer 900.
Realized by software within 1.

The OCR device may not be dedicated hardware, but a high-speed processor such as RISC may be prepared to perform character recognition processing by software.

The present invention may be applied to a system composed of a plurality of devices or an apparatus composed of a single device. Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus.

[0087]

As described above, according to the present invention,
By preparing a plurality of image processing means and complementarily operating them based on their mounting states and failure states, it is possible to smoothly perform image processing and improve the fault tolerance of the entire apparatus. .

[0088]

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of an image processing system according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing configurations of a reader unit 1 and a printer unit 2.

FIG. 3 is a block diagram showing a configuration of an image processing unit in the reader unit 1.

FIG. 4 is a block diagram showing a configuration of a core unit 10.

5 is a block diagram showing a configuration of a file unit 5. FIG.

FIG. 6 is a block diagram showing a configuration of a computer interface unit 7.

FIG. 7 is a block diagram showing a configuration of an image memory unit 9.

FIG. 8 is a flowchart showing a procedure of image processing on image information stored in a memory 904.

FIG. 9 is a flowchart illustrating a procedure of image rotation processing.

FIG. 10 is a diagram showing a device configuration according to a modification.

[Explanation of symbols]

 1 image input device (reader unit) 2 image output device (printer unit) 3 external device 5 file unit 6 external storage device 7 computer interface unit 8 computer terminal unit 9 image memory unit 10 core unit

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Michiko Hirayu 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Eiji Ohara 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Within the corporation

Claims (5)

[Claims] 1. A first image processing unit, a detachable second image processing unit, a unit for determining whether or not the second image processing unit is attached to the image processing apparatus, and the second image processing unit. Means for detecting the presence / absence of a failure in the image processing means, wherein if the second image processing means is attached to the image processing apparatus and no failure of the second image processing means is detected, the second image processing means is detected. Image processing is performed by the second image processing means, and if the second image processing means is not attached, the first image processing means performs the image processing, and the image processing device is configured to perform the second processing. An image processing apparatus, wherein image processing means is attached, and when a failure of the second image processing means is detected, image processing is performed by the first image processing means. 2. The image processing apparatus according to claim 1, wherein the first image processing means performs image processing by software, and the second image processing means performs image processing by hardware. . 3. The first image processing means performs image processing by a general-purpose processor, and the second image processing means performs image processing by a processor having peculiar performance. The image processing device described. 4. The image processing by the first image processing means and the second image processing means includes image enlargement / reduction processing, image rotation processing, and character recognition processing from image information. The image processing apparatus according to any one of claims 1 to 3, which is characterized. 5. The first image processing means performs basic image processing, and the second image processing means performs applied image processing, and the second image processing means is applied to the image processing apparatus. If the second image processing means is not attached to the image processing apparatus, the basic image processing and the applied image processing are both performed, or the image processing apparatus is attached. The second image processing means is attached to the second image processing means, and when a failure of the second image processing means is detected, only the basic image processing is performed. The image processing device according to item 1.