JPH08256061A - D/a converter - Google Patents

Abstract

PURPOSE: To remove the generation of periodical noise caused by the relative error of one-bit D/A converters at the D/A converter using plural one-bit D/A converters. CONSTITUTION: An inputted digital signal is compressed to a prescribed (p) gradation by a noise shaper 11, the output of the noise shaper 11 is converted to (m) pieces of one-bit signal sequences by a decoder 12 and converted to analog signals by respectively connected one-bit D/A converters 131, 132, 133...134 and these analog signals are totalized by an adder 14 and defined as the analog output of this D/A converter. Thus, since the (m) is defined as a prime number or an odd number and D/A conversion is performed by (m) pieces of one-bit D/A converters 131, 132, 133...134, the generation of periodical noise caused by the relative error of one-bit D/A converters 131, 132, 133...134 when inputting the fine digital signal is removed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a D / A (digital / analog) converter for converting a digital signal into an analog signal.

[0002]

2. Description of the Related Art Using a plurality of 1-bit D / A converters,
D / s arranged to circulate through the 1-bit D / A converter train
The A conversion method (hereinafter referred to as a cyclic 1-bit D / A converter) will be described with reference to FIG. Regarding this technology, see `` Technical Report of IEICE Vol.94 No.
116 pp.63-70 (CAS94-9) June 1994 ”.

FIG. 4 is a block diagram showing the configuration of a conventional D / A converter using a cyclic 1-bit D / A converter. The digital filter 10 multiplies the sampling frequency fs of the input digital signal by 64 times. The noise shaper 11 imparts a differential characteristic to the frequency characteristic of the quantization noise of the digital signal output from the digital filter 10. Here, it is assumed that the noise shaper has a cubic characteristic, and the output Y with respect to the input X is represented by (Equation 1).

[0004]

[Equation 1]

The output Y has an output of 11 (= p) gradations. The decoder 120 corresponds to the digital signal output from the noise shaper 11 by 10 (= m = p−1).
One 1-bit signal string is output. 1 bit D
The A / A converter array 130 includes ten 1-bit D / A converters 131 to 135 (DAC 131 to DAC) having no relative error.
135). The adder 140 is a 1-bit D /
The 10 analog signals output from the A converter row 130 are combined and output as an analog signal. 1 bit D /
The D / A conversion circuit 150 is configured by using the A converter row 130 and the adder 140. In the D / A converter of FIG. 4, the digital filter 10 and the noise shaper 11 set the digital input signal to a sampling frequency of 64 fs and 11 gradations, and then the decoder 120 converts the signal into ten 1-bit signal strings. An example of the decoder 120 of FIG. 4 is shown in FIG. In FIG. 5, the pointer 300 outputs the remainder of the accumulated value of the input signal. A ROM (read-only memory) 310 outputs 10-bit data corresponding to an address whose input signal is lower and output of the pointer 300 is upper. The operation of FIG. 5 will be described. First, the pointer 300 accumulates the signals (0 to 10) of 11 gradations output from the noise shaper 11 of FIG. 4 and calculates and outputs the remainder of 10. Therefore, there are 10 kinds of outputs, 0 to 9. Next, an address having the lower input signal and the upper output signal of the pointer 300 is input to the ROM 310 to obtain 10-bit data. This 10-bit data represents ten 1-bit signals. Address at this time (1
Table 1 shows the relationship between 0-ary numbers and data (binary numbers).

[0006]

[Table 1]

Explaining (Table 1), the data of 10 bits is "1" by the same number as the lower address, that is, the numerical value of the input signal, and the sum of each bit is equal to the input signal. . Further, the upper part of the address, that is, the left side is shifted as indicated by the numerical value of the output signal of the pointer 300, and the overflowing digits are circulated so as to appear from the right side, and the DACs 131 to 135 used for output are allocated.
By defining the ROM 310 as shown in (Table 1),
For example, data is output as shown in (Table 2).

[0008]

[Table 2]

As can be seen from Table 2, as many "1" as the numerical value of the input signal are output so as to circulate 10-bit data. The signal thus decoded is converted into an analog signal by the D / A conversion circuit 150, and an oversampling type D / A for converting a digital signal into an analog signal at a higher sampling frequency.
It is a conversion device.

[0010]

However, in the above circuit configuration, since the number of 1-bit signal trains of the decoder and the number of 1-bit D / A converters are 10, a minute digital signal or a specific offset is applied. When a special signal called a small digital signal is input, the assigned 1-bit D / A converter array circulates with a specific cycle. For example, when a minute digital signal is input, the assigned 1-bit D / A converter is (Table 3).
1 bit D /
If the outputs between the A converters have variations, there is a problem that periodic noise occurs.

[0011]

[Table 3]

The present invention solves the above-mentioned conventional problems. When a minute digital signal having an offset is input, even if there is a relative error between the 1-bit D / A converters, a periodic noise is generated. An object of the present invention is to provide a D / A conversion device that does not generate noise.

[0013]

According to the present invention, there is provided a noise shaper for compressing an input digital signal into a predetermined p gradation and a decoder for converting an output of the noise shaper into a corresponding m number of 1-bit signal strings. A 1-bit D / A converter provided with m 1-bit D / A converters for converting the output of the decoder into analog signals and an adder for integrating the m-number of outputs of the 1-bit D / A converter Is a prime number of p gradations or more or an odd number.

[0014]

In the above circuit structure, when a minute digital signal is input, the 1-bit D / A converter assigned by the decoder gradually uses the 1-bit D / A for output.
There is no need to change the converter and cycle the 1-bit D / A converter train at a particular cycle. As a result, even when a minute digital signal is input, periodic noise due to the relative error between the 1-bit D / A converters does not occur.

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a D / A converter according to the present invention. In FIG. 1, 10 is a digital filter, 11 is a noise shaper, 12 is a decoder,
Reference numeral 13 is a 1-bit D / A converter array, 131 to 135 are 1-bit D / A converters, 14 is an adder, 15 is a D / A conversion circuit, and both the digital filter 10 and the noise shaper 11 are shown in FIG. It has the same configuration and functions as those shown. The D / A conversion device shown in FIG.
0 and the noise shaper 11 set the digital input signal to a sampling frequency of 64 fs and 11 (= p) gradations, then the decoder 12 forms 11 (= m) 1-bit signals, and further the D / A conversion circuit 15 analog This is a so-called oversampling type D / A conversion device for converting a digital signal into an analog signal at a higher sampling frequency.

An example of the D / A conversion circuit 15 of FIG. 1 is shown in FIG. In FIG. 2, 13 is a 1-bit D / A converter string, 131
~ 134 is a 1-bit D / A converter, 14 is an adder, 15
Is a D / A conversion circuit, which corresponds to FIG. Reference numeral 20 denotes an inverter, which buffers and inverts a 1-bit input signal and outputs it. Reference numerals 21 and 22 are resistors, and 23 is an operational amplifier. The operation of FIG. 2 will be described. First, the + input terminal of the operational amplifier 23 is grounded, and the − input terminal is a virtual ground point. In addition, the 1-bit input signal is passed through the inverter 20 and the resistor 21 to the operational amplifier 23
It is connected to the input terminal and further connected to the output terminal of the operational amplifier 23 via the resistor 22, and constitutes a current adding circuit by the resistors 21 and 22. Now, the resistance value of the resistor 21 of the DAC 131 is R1, and the resistance value of the resistor 21 of the DAC 132 is R1.
, R1, the resistance value of the resistor 21 of the DAC 134 is R4, and the resistance value of the resistor 22 is Rf, the analog output voltage Eo is calculated by the following equation (2).

[0018]

[Equation 2]

Here, in the 1-bit D / A converter row 13, if there is no relative error, the resistance value of the resistor 21 is also R1 = R2 = ...
= R4, and the output of the operational amplifier 23 outputs a voltage value proportional to the number of 1-bit input signals which are "0" (that is, the output of the inverter 20 is "1"). However, in the actual circuit, 1-bit D / A converter array 1
It is impossible to manufacture the resistors 21 to 24 of No. 3 to have exactly the same resistance value, and there is some relative error. In this case, as is apparent from (Equation 2), a voltage value that depends not only on the number of 1-bit input signals that are "0" but also on the position is output.

Next, an example of the decoder 12 of FIG. 1 is shown in FIG. In FIG. 3, 30 is a pointer and 31 is a ROM
(Read-only memory). The ROM 31 outputs 11 (= m) -bit data corresponding to an address whose input signal is lower and output of the pointer 30 is upper. The operation of FIG. 3 will be described. First, the pointer 30 is shown in FIG.
The signal (0 to 10) of 11 gradations output from the noise shaper 11 is accumulated, and the remainder of 11 is obtained and output. Therefore, there are 11 kinds of outputs, 0 to 10. Next, an address having the lower input signal and the upper output signal of the pointer 30 is input to the ROM 31 to obtain 11-bit data. This 11-bit data represents 11 1-bit signals. Address (11 decimal number) and data (2
The relation of the base numbers is shown in (Table 4).

[0021]

[Table 4]

Explaining (Table 4), 11-bit data is "1" by the same number as the lower address, that is, the value of the input signal.
And the sum of each bit is equal to the input signal. In addition, the upper address, that is, the pointer 3
D is shifted to the left by the same number as the value of the output signal of 0, and overflow digits are circulated so that they appear from the right, and are used for output.
AC131 to DAC134 are assigned. By defining the ROM 31 as shown in (Table 4), for example, (Table 5)
The data is output as follows.

[0023]

[Table 5]

As can be seen from Table 5, as many "1" as the numerical value of the input signal are output so as to circulate the 11-bit data. Note that the relationship between the address (11-ary number) and the data (binary number) is as shown in (Table 6)
By defining, the data is output as shown in (Table 7).

[0025]

[Table 6]

[0026]

[Table 7]

At this time, when a minute digital signal having an offset or a minute digital signal is input, data is output as shown in (Table 8) and (Table 9).

[0028]

[Table 8]

[0029]

[Table 9]

As described above (Table 8) and (Table 9), by configuring the 1-bit D / A converter with 11 prime numbers, 1-bit D to which 11-bit data is connected respectively. Even if there is a relative error between the outputs of the A / A converters DAC131 to DAC134, a small digital signal with any offset or any DC signal is input, and the output value of the noise shaper 11 is set to a value near a certain value. Even if it outputs, the assigned 1-bit D / A converters DAC131 to DAC134 circulate with a specific cycle. Therefore, when a minute digital signal with any offset or any DC signal is input, periodic noise does not occur even if there is a relative error in the outputs of the 1-bit D / A converters DAC131 to DAC134. The description has been made assuming that the number of output bits of the decoder 12 is 11 bits (that is, the number of 1-bit D / A converters DAC131 to DAC134 is 11) with respect to the output of 11 gradations of the noise shaper 11. The output bits of the decoder 12 may be prime numbers larger than this.

Next, another embodiment of the present invention will be described. Generally, a minute signal of a voice signal vibrates near 0 volt. That is, the minute digital input signal of the audio signal has an offset value of the value 5 in the output 11 gradations of the noise shaper 11, which is a value near the center. Such a case will be described. Applying to the D / A converter of FIG. 1, the D / A converter is configured as follows. The digital filter 10, noise shaper 11, decoder 12, 1-bit D / A converter array 13, adder 14, D / A conversion circuit 15
Both have the same configurations and functions as those shown in FIG.

The case of a minute digital input signal of an audio signal having only a constant offset value near the center of the 11 gray scales of the output of the noise shaper 11 will be described. R
The OM 31 outputs 11 (= k) -bit data corresponding to an address whose input signal is lower and output of the pointer 30 is upper. If the ROM 31 is defined as shown in (Table 4) or (Table 6), the data of (Table 5) (Table 7) is output. For a case where a small digital signal having a constant offset value near the center of the output 11 gradations of the noise shaper 11 is input, for example (Table 8),
Data is output as shown in (Table 9).

As described above, as shown in (Table 8) and (Table 9), by constructing 11 1-bit D / A converters with an odd number, 1-bit D to which 11-bit data is respectively connected. Even if there is a relative error between the outputs of the A / A converters DAC131 to DAC134, if a minute digital signal having only a constant offset near the center of the 11 gradations of the output of the noise shaper 11 is input, 1 bit allocated D / A converters DAC131 to DAC134
Yes, it circulates with a certain cycle Yes. Therefore,
When a minute digital signal having only a constant offset near the center of the 11 gradations of the output of the noise shaper 11 is input, the 1-bit D / A converters DAC131 to DAC
Even if there is a relative error in the output of 134, periodic noise does not occur. It should be noted that 11 bits (that is, 1-bit D / A converter DAC), which is the case where the number of output bits of the decoder 12 is the minimum with respect to the 11-gradation output of the noise shaper 11,
Although the number of 131 to DAC 134 has been described as 11), the output bits of the decoder 12 may be odd numbers higher than this.

The D / A converter is constructed as described above. Here, the noise shaper 11 represented by (Equation 1) is used, but it goes without saying that different orders and characteristics may be used as long as they function as a noise shaper. Further, the configuration of the decoder 12 shown in FIG. 3, the ROM data of (Table 4) or (Table 6) and the like are examples for description, and of course the present invention is not limited thereto.

[0035]

As described above, the D / A converter according to the present invention receives an odd number when a digital signal having only a constant offset near the center of the output tone of a noise shaper, such as a voice signal, is input. By using a 1-bit D / A converter string composed of individual pieces, the generation of periodic noise due to the relative error of the 1-bit D / A converter is eliminated. Further, by using a prime number 1-bit D / A converter, even if a minute digital signal with any offset or any DC signal is input,
Eliminate the occurrence of periodic noise due to the relative error of the bit D / A converter.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a D / A conversion device according to the present invention.

FIG. 2 is a circuit diagram showing an example of a D / A conversion circuit 15 of FIG.

3 is a block diagram showing an example of a decoder 12 in FIG.

FIG. 4 is a block diagram showing an example of a conventional D / A converter using a cyclic 1-bit D / A converter array.

5 is a block diagram showing an example of a decoder 120 of FIG.

[Explanation of symbols]

 10 Digital Filter 11 Noise Shaper 12 Decoder 13 1-bit D / A Converter Sequence 14 Adder 15 D / A Conversion Circuit 20 Inverter 21, 22 Resistor 23 Operational Amplifier 30 Pointer 31 ROM (Read Only Memory) 131-135 1-bit D / A converter

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akira Nakajima 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (2)

[Claims] 1. A noise shaper for compressing an input digital signal into a predetermined p gradation, a decoder for converting the output of the noise shaper into a corresponding m 1-bit signal string, and an output of the decoder for analog. M to convert to a signal
D / A converters, each including one 1-bit D / A converter and an adder that integrates m outputs of the 1-bit D / A converter, wherein m is a prime number greater than or equal to p A converter. 2. A noise shaper for compressing an input digital signal into a predetermined p gradation, a decoder for converting the output of the noise shaper into a corresponding m 1-bit signal string, and an output of the decoder for analog. M to convert to a signal
D / A converters, and an adder that integrates m outputs of the 1-bit D / A converters, wherein m is an odd number of p or more. A converter.