JPH08255864A - Semiconductor device and lead frame member therefor - Google Patents

Abstract

PURPOSE: To increase the number of terminals without complicating the mounting process or increasing the size of semiconductor device by arranging the inner lead of a single layer lead frame on the outside of the forward end part of a lead on the die pad side and opening an insulating layer at a region spaced apart from the part corresponding to the forward end part of the inner lead. CONSTITUTION: A wiring part 120 is provided with a die pad 121 for mounting a semiconductor element but a single layer lead frame 110 is not provided with a die pad. The opening 131 of an insulation layer 130 is insulated to prevent electrical conduction of the single layer lead frame 110 and the wiring part 120. The inner lead 121 of the single layer lead frame 110 is arranged on the outside of the forward end part of lead on the die pad 121 side. The opening 131 of the insulation layer 130 includes the parts corresponding to the die pad 121 at the wiring part 120 and the forward end part of a lead 122 on the die pad 321 side and opened in the square region spaced apart from the part corresponding to the forward end part of inner lead of the single layer lead frame 110.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame member for a resin-sealed semiconductor device and a semiconductor device using the same, which is compatible with the increase in the number of terminals of the semiconductor device.

[0002]

2. Description of the Related Art Conventionally, a resin-encapsulated semiconductor device (plastic package semiconductor device) is generally shown in FIG.
The semiconductor device 510 has a structure as shown in FIG.
Mounts the semiconductor element 511 on the lead frame, and connects the electrode pad 516 of the semiconductor element 511 and the tip of the inner lead 513 of the lead frame to the wire (gold wire) 517.
And is sealed with resin 515. A lead frame (referred to as a single-layer lead frame) used as an assembly member of the resin-sealed semiconductor device generally has a die pad 522 for mounting a semiconductor element, as shown in FIG. 5B. An inner lead 523 provided around the die pad for connecting with the semiconductor element, an outer lead 524 for connecting with an external circuit integrated with the inner lead 523, and a resin. Dam bar 52 that becomes a dam when sealing
5, frame portion 5 supporting the lead frame 520
It was equipped with 26 mag. Such a single-layer lead frame is usually made of a metal such as Kovar, 42 alloy (52% nickel-iron alloy), copper alloy, etc., which is excellent in electrical conductivity and has high strength, and is subjected to an etching method using a photolithography technique. It was processed by the stamping processing method.

However, in recent years, semiconductor devices have become more highly integrated and more highly functional as represented by ASICs of LSIs due to the high performance of electronic equipment and the tendency of light, thin, short and small (current). Such large-scale integration (high integration) of the LSI is based on the advancement of the miniaturization processing technology in the wafer process, and it is possible to accommodate more gates in one chip and further reduce the chip size. Is becoming possible. However, higher integration and higher functionality of semiconductor chips lead to an increase in the operation speed of semiconductor devices, and due to the high-speed processing of signals, the delay of signals in the package wiring is more dominant than the delay of signals in the semiconductor chip. As a result, it has become necessary to improve the electrical characteristics in the semiconductor package including the problem of noise, and the inductance in the package has become a condition that cannot be ignored. To do this, increase the connection terminals for power and ground,
Although it has been dealt with by reducing the substantial inductance, the increase in the number of connection terminals for the power supply and the ground has increased the total number of pins of the semiconductor device, and the number of terminals has become more and more required. Therefore, in the lead frame, the number of inner leads and the number of outer leads must be increased.

The increase in the number of inner lead terminals of the lead frame requires that the inner lead portion be separated from the chip when the inner lead width and pitch are kept unchanged, and the area including the inner lead portion of the lead frame is large in size. Therefore, the size of the semiconductor device itself is increased. Therefore, as a method of increasing the number of terminals without increasing the size of the semiconductor device itself as the number of terminals increases, a method of narrowing the pitch of the inner leads and the outer leads of the lead frame with the increase in the number of terminals has been adopted. . In this method, the inner lead pitch is 0.18 mm when the lead frame thickness is 0.15 mm.
It can be achieved by etching up to about 0.17 mm pitch. The pitch of the outer leads also increases from 1.0 mm to 0.8 m as the number of terminals increases.
m, 0.6 mm, 0.5 mm, gradually narrowing to 0.4
mm to 0.3 mm.

[0005]

As described above, the inner lead pitch and the outer lead pitch have been narrowed to prevent the semiconductor device itself from increasing in size as the number of terminals increases. There is a processing limit to narrowing the pitch of the outer leads, and narrowing the pitch of the outer leads also requires narrowing the width of the outer leads themselves, which reduces the strength of the outer leads themselves. There is a problem in the positional accuracy of the outer leads when performing Especially in QFP semiconductor devices, etc., the outer lead pitch is 0.4.
If it is less than 0.3 mm, it cannot be mounted.
As described above, with respect to the increase in the number of terminals of the semiconductor device, it has become apparent that there is a limit to the method of dealing with the inner lead pitch and the outer lead pitch of the lead frame being narrowed without increasing the size of the semiconductor device itself. Therefore, there is a demand for a method of coping with the increase in the number of terminals of the semiconductor device, which is different from this method. Under such circumstances, the present invention is for a semiconductor device capable of dramatically increasing the number of terminals as compared with the conventional one, without complicating the mounting process of the semiconductor device and without increasing the size of the semiconductor device. The present invention is intended to provide a new lead frame member.

[0006]

SUMMARY OF THE INVENTION A lead frame member for a semiconductor device according to the present invention includes at least an inner lead for electrically connecting to a terminal portion of a semiconductor element and an inner circuit integrally connected to the inner lead. A single-layer lead frame having an outer lead for electrical connection with and having no die pad for mounting a semiconductor element, a die pad for mounting the semiconductor element, and a semiconductor element around the die pad. A lead for electrically connecting with the terminal portion, and an external terminal for integrally connecting with the lead and for electrically connecting with an external circuit arranged two-dimensionally along the lead formation surface. For the resin-sealed semiconductor device, in which the wiring portion having the A frame member, a single-layer inner lead of the lead frame is provided outside the lead tip portions of the die pad of the wiring portion, and the insulating layer,
It is characterized in that it includes at least a portion corresponding to the die pad portion of the wiring portion and the lead tip portion on the die pad portion side, and is opened in a region that does not cover the portion corresponding to the inner lead tip portion of the single-layer lead frame. .
The above-mentioned wiring part is integrally processed by processing a metal plate. Further, the wiring portion is characterized in that only the external terminal is covered with the second insulating layer in a state of being exposed on the side opposite to the single layer lead frame. The wiring portion is formed on a film such as a film carrier, and the film such as the film carrier is provided with an opening portion in a fill so that external terminals are exposed. . Further, in the above, the position of the inner lead tip of the single-layer lead frame and the position of the lead tip of the wiring portion on the semiconductor element side are arranged in a staggered manner.

[0007]

The lead frame member for a semiconductor device of the present invention is
With the above-described structure, a semiconductor device for which the number of terminals can be dramatically increased as compared with the conventional one without complicating the step of mounting the semiconductor device and without increasing the size of the semiconductor device. It is possible to provide a lead frame member. Specifically, the die pad part for mounting the semiconductor element is provided only on the wiring part, and the die pad part is not provided on the single-layer lead frame.The inner lead of the single-layer lead frame is the lead tip part on the die pad side of the wiring part. The insulating layer is provided outside and includes at least a portion corresponding to the die pad portion of the wiring portion and the lead tip portion on the die pad portion side, and does not extend to a portion corresponding to the inner lead tip portion of the single-layer lead frame. Due to the opening in the region, when the semiconductor element is mounted on the die pad section of the wiring section, the terminal section (electrode pad) of the semiconductor element and the inner lead of the single-layer lead frame and the lead of the wiring section are electrically connected. Wire (gold wire)
It is possible to connect, and it is possible to electrically connect the semiconductor element to an external circuit via the outer lead corresponding to the connected inner lead and the external terminal integrally connected to the lead of the connected wiring portion. In addition to the outer leads of the single-layer lead frame, the external terminals of the wiring section can be secured as input / output terminals. Therefore, unlike the conventional resin-encapsulated semiconductor device that uses only a single-layer lead frame, it is not necessary to extremely narrow the inner lead pitch and the outer lead pitch of the single-layer lead frame to increase the number of terminals. The tolerance in the bonding work process and the mounting process can be increased. Furthermore, by arranging the inner lead tip position of the single-layer lead frame and the lead tip position of the wiring part on the semiconductor element side in a zigzag manner, the occurrence of short circuits between wires during wire bonding is extremely small. I am trying. Since the wiring portion is integrally processed by processing the metal plate, mass production processing by a conventional photolithography technique or the like is possible. Since the wiring part is covered with the second insulating layer in a state where only the external terminals are exposed on the side opposite to the single-layer lead frame, it is not always on the outside of the second insulating layer during resin sealing. Since no resin is required, the resin sealing itself can be simple. Then, the wiring portion is formed on a film such as a film carrier, the film such as the film carrier, by providing an opening in the film so that the external terminals are exposed,
In addition to simplifying the manufacturing, it is possible to reduce the thickness of the semiconductor device when the semiconductor element is mounted and the resin is encapsulated. In addition, the semiconductor device of the present invention can be adapted to multiple terminals by using the lead frame member for a semiconductor device of the present invention without increasing the size of the semiconductor device itself. It is also possible to mount a part of the external terminal part of the wiring part on the board as a terminal for heat dissipation,
The thermal resistance of the semiconductor device can be reduced.

[0008]

EXAMPLE An example of a lead frame member for a semiconductor device of the present invention will be described with reference to the drawings. First, the lead frame member for a semiconductor device of Example 1 will be described. FIG. 1 shows the first embodiment.
FIG. 3 is a development view of the semiconductor device lead frame member. In FIG. 1, 100 is a lead frame member, 110 is a single layer lead frame, 111 is an inner lead, 112 is an outer lead, 113 is a dam bar, and 114 is a frame.
, 120 is a wiring part, 121 is a die pad, 122 is a lead, 123 is an external terminal, 123A is a protrusion, 130 is an insulating layer, 131 is an opening, 140 is a second insulating layer, and 141 is an opening. As shown in FIG. 1, the lead frame member 100 for a semiconductor device of the present embodiment is formed by laminating a single-layer lead frame 110 and a wiring portion 120 with an insulating layer 130 interposed therebetween, and the wiring portion 120 has a semiconductor element. A die pad 121 for mounting a semiconductor chip, a lead 122 for connecting a terminal portion (electrode pad) of a semiconductor element, and an external terminal 123 for electrically connecting to an external circuit integrally connected to the lead 122. And single layer lead frame 110
Has no die pad. The opening 131 of the insulating layer 130 is slightly larger than the area of the die pad 121 of the wiring part 120, and the inner lead 11 of the single-layer lead frame 110 is formed.
The single-layer lead frame 110 and the wiring portion 120 are insulated so as not to be electrically connected to each other. The inner lead 121 of the single-layer lead 110 is the die pad 1 of the wiring part 120.
21 is located outside the tip end of the lead 122, and the opening 131 of the insulating layer 130 is formed in the wiring part 120.
Of the die pad 121 and the lead 122 on the side of the die pad 121, and is opened in a square region that does not extend to the portion corresponding to the tip of the inner lead 111 of the single-layer lead frame 110. When the semiconductor element is mounted on the die pad 121, the semiconductor element 1
Wires (gold wires) can be easily connected between the terminal portion 151 of the connector 50, the inner lead tip portion of the single-layer lead frame 110, and the semiconductor element side of the lead 121 of the wiring portion 120. The positions of the inner lead end portions of the single-layer lead frame 110 and the lead portion positions of the leads 121 of the wiring portion 120 on the semiconductor element side are mutually zigzag so that the wires do not easily short-circuit during wire (gold wire) connection. It is arranged so that it has a shape.

In this embodiment, both the single-layer lead frame 110 and the wiring portion 120 are made of 42 alloy (42% nickel-iron alloy). And wiring part 1
As shown in FIG. 3 (a), 20 is integrally formed including the protruding portion 123 A of the external terminal 123. Since the single-layer lead frame 110 is processed by ordinary etching, the description thereof will be omitted. However, a method of manufacturing the wiring part 120 integrally formed with the protrusion 123A will be briefly described with reference to FIG. deep. For simplification, FIG. 4 shows only the cross section of the main part. First, the lead frame material 400 is subjected to a cleaning treatment (FIG. 4A), a photosensitive resist such as casein resist is applied to both surfaces, and a drying treatment is performed (FIG. 4B). A resist pattern 401A having a predetermined shape is formed using the pattern plate. (FIG. 4C) Next, using the resist pattern 401A as a protective film, both surfaces of the lead frame material 400 are corroded by a corrosive liquid such as an aqueous solution of ferric chloride (FIG. 4D).
At the stage of (d), the corroded portions 402A and 402B are still shallow and not penetrated. By further advancing the corrosion, the lead frame material 400 is partially penetrated by the corroded portions 402A and 402B to form a predetermined shape. (FIG. 4E) After that, the resist film (resist pattern) 401A is removed, and the lead frame member 420 including the external terminal 423 having the protruding portion 423A, the wiring portion 422, and the die pad portion 421 is obtained. . (FIG. 4 (f)) Incidentally, in order to smooth the tip of the protrusion into a round shape as shown in FIG. 3 (a), the resist pattern 40 shown in FIG. 4 (c) is used.
1A can be formed by reducing the width to a predetermined width or less.
Incidentally, in the production of the above-mentioned wiring portion, usually, a portion corresponding to the frame portion of the single-layer lead frame is provided, and after the whole is hung, the portion is partially or entirely formed into a film. Or fix with tape.

The insulating layer 130 was made of polyimide resin (model number UX-1W) manufactured by Tomoegawa Paper Co., Ltd., and was processed by a mold. The second insulating layer 140 is made of a polyimide resin (model number UX-1S) manufactured by Tomagawa Paper Manufacturing Co., Ltd.
The opening 141 is provided, and the external terminal 1 of the wiring part 120 is provided.
Only the protruding portion 123A of 23 is exposed to the outside through the opening 141 to cover the entire wiring portion 120.

The lead frame member for a semiconductor device of the above embodiment is manufactured, for example, as follows. First, a single-layer lead frame 1 produced by etching or the like
10 and the wiring part 120 are stacked at a predetermined position such that the external terminal 123 of the wiring part 120 has the protrusion 123A side facing outward through the insulating layer 130.
Thermocompression bonding is performed under a pressurizing condition of 50 Kgf for 3 seconds, and the single-layer lead frame 110 and the wiring portion 120 are laminated via the insulating layer 130. The wiring part 120 is the die pad part 12.
1. Since the lead portion 122 and the external terminal portion 123 are unstable as they are, there is a method of thermocompression bonding a part or all of them along a film or tape and removing the film or tape after the pressure bonding. To be taken. In some cases, it is produced with the film or tape attached. Also,
The wiring part 120 is hung from a frame (frame) (not shown), processed by etching or the like, and then thermocompression-bonded to the insulating layer 130 to cut and remove unnecessary parts such as the frame. Then, this and the single-layer lead frame 110 may be thermocompression bonded via the insulating layer 130.

Next, the second insulating layer 1 having the opening 141 is provided.
40 on the wiring part 120 side and while aligning with the opening 141 so that the projection 123A of the external terminal 123 is exposed to the outside, thermocompression bonding is performed at 120 ° C. for 0.3 seconds under a pressure condition of 50 kgf. And then integrally formed. Here, the opening 141 provided at a position corresponding to the protruding portion 123A of the second insulating layer 140 was provided before thermocompression bonding, but when a wiring portion having no protruding portion is used, thermocompression bonding is performed. After that, the external terminals 123 may be exposed by processing with an excimer, a carbon dioxide gas laser, or the like. In this case, as shown in FIG. 3B, it is common to form a protrusion 228 made of a solder portion on the exposed external terminal 123 and electrically connect it to an external circuit.

An example of a resin-sealed semiconductor device using the lead frame member of the present embodiment will be briefly described. The resin-encapsulated semiconductor device shown in FIG. 3A is an example of a semiconductor device using the lead frame member for a semiconductor device of the first embodiment, and FIG. 3A shows A1 in FIG.
It is a sectional view in a position corresponding to a position in -A2.
In FIG. 3A, 150 is a semiconductor element, 151 is a terminal portion (electrode pad), and 152 is a wire (gold wire). This semiconductor device is different from the conventional semiconductor device using only the single-layer lead frame shown in FIG. 5A, in addition to the outer lead 112 of the single-layer lead frame 110, the wiring portion 1
It is possible to connect to an external circuit by means of 20 external terminals 123, and it is possible to dramatically increase the number of connection terminals to the external circuit as compared with the conventional semiconductor device using only the single-layer lead frame. is there. The semiconductor device may have a structure in which a lead frame member not using the second insulating layer 140 shown in FIG. 1 is used and the position corresponding to this is sealed with a sealing resin.

Next, the semiconductor device lead frame of the second embodiment will be described. FIG. 2 is a development view of the semiconductor device lead frame member of the second embodiment. In FIG. 2, 200 is a lead frame member, 210 is a single layer lead frame, 211 is an inner lead, 212 is an outer lead, 213 is a dam bar, 214 is a frame (frame) part, 220 is a wiring part,
221 is a die pad, 222 is a lead, 223 is an external terminal portion, 224 is a film, 225 is an opening, 230 is an insulating layer, and 231 is an opening. As shown in FIG. 2, the semiconductor device lead frame member 200 of the present embodiment is the same as that of the first embodiment.
The wiring part 220 corresponding to the wiring part 120 in FIG. 2 is formed on the film 224, and the single-layer lead frame 2 is formed with the film 224 facing outward through the insulating layer 230.
10 and the wiring part 220 are laminated, and the wiring part 220
A die pad 221 for mounting a semiconductor element,
The single-layer lead frame 210 has a die pad and a lead 222 for connecting to a terminal portion of a semiconductor element and an external terminal portion 223 for electrically connecting to an external circuit integrally connected to the lead 222. Absent. Also in this embodiment, as in the case of the lead frame member for a semiconductor device of the first embodiment,
The inner lead 221 of the single-layer lead 210 is the wiring part 2
Lead 22 on the die pad (semiconductor element) 221 side of 20
The opening 231 is located outside the front end
Is opened in a square area including a portion corresponding to the tip of the die pad 221 of the wiring portion 220 and the lead 222 on the die pad side and not including a portion corresponding to the tip of the inner lead 211 of the single-layer lead frame 210. Therefore, when a semiconductor element is mounted on the die pad 221 of the wiring section 220, the terminal section of the semiconductor element and the single-layer lead frame 21 are
The wire (gold wire) is easily connected to the tip of the inner lead 211 of 0 and the tip of the lead 221 of the wiring part 220 on the semiconductor element side. In this embodiment, the film 224 corresponds to the second insulating layer 140 of the first embodiment, but the wiring part 220 and the film 224 are integrally formed in a laminated state.
24, an opening 225 (not shown) is provided so that the external terminal 223 of the wiring part 220 is exposed. Opening 2
25 is formed by irradiation with excimer, carbon dioxide laser light, or the like,
Or by corrosion.

The film 224 is a polyimide-based base material, and the wiring portion 220 is a copper foil having a thickness of 0.018 mm laminated on the film 224, and a corrosion-resistant film is patterned by an ordinary plate making technique. It is formed by etching only the exposed copper foil portion, and the film 224 supports the wiring portion 220. As described above, in the case of the present embodiment, the wiring portion is not formed separately from the second insulating layer due to metal corrosion or the like as in the first embodiment, but the copper foil formed on the film 224 is etched. Since the film 224 is used as it is as an insulating layer, the whole assembling work is simplified.

Next, an example of a resin-sealed semiconductor device using the semiconductor device lead frame of this embodiment is shown in FIG.
A brief description will be given with reference to (b). FIG. 3B is a sectional view at a position corresponding to the position of B1-B2 in FIG. In FIG. 3B, 250 is a semiconductor element, 251
Is a terminal portion (electrode pad), and 252 is a wire (gold wire). In the case of this semiconductor device, the film 224 corresponds to the second insulating layer 140 of the first embodiment.
4 is provided with an opening at a position corresponding to the external terminal portion 223 by irradiation with excimer, carbon dioxide laser light, or the like, and the film 2
A semiconductor element is mounted on a lead frame member for a semiconductor device having an opening at 24, is connected, is resin-sealed, and is connected to an external terminal portion 223 from the opening and is made of solder, which is projected outside. The protrusion 228 is provided. As described above, in this semiconductor device, since the wiring part 220 is formed by etching a thin copper foil on the film 224, the wiring part can have a small thickness and can be formed thin as a whole.

[0017]

As described above, the lead frame member for a semiconductor device of the present invention makes a leap as compared with the conventional one without complicating the mounting process of the semiconductor device and without increasing the size of the semiconductor device. It is possible to provide a lead frame member for a semiconductor device that can increase the number of terminals, and specifically, it is possible to double the number of input / output terminals in the same package size as compared with a QFP semiconductor device. There is. More specifically, in the lead frame member for a semiconductor device of the present invention, since the single-layer lead frame and the wiring portion used can be mass-produced by the conventional etching process or stamping process, no special process is required, and low cost is achieved. Cost can be reduced. As the wiring portion, by using a conductor such as a film carrier on which a conductive circuit is formed, the thickness of the semiconductor device can be reduced. Further, in this case, since the conductor circuit is made of copper foil, fine wiring is possible and the number of external terminals can be increased. And, by providing the inner lead tip of the single-layer lead frame outside the tip of the lead on the die pad side for mounting the semiconductor element of the wiring section, the terminal section of the semiconductor element and the inner lead tip of the single-layer lead frame, Wires (gold wires) can be connected to the tip of the lead on the semiconductor element side of the wiring section. Furthermore, the position of the tip of the inner lead and the tip of the lead section on the semiconductor element side of the wiring section have been devised and arranged. By doing so, the occurrence of short circuit between the wires can be made extremely low. Further, for the semiconductor device of the present invention, by using the lead frame member of the present invention, it is possible to cope with the increase in the number of terminals without increasing the size of the semiconductor device itself, and also to cope with mass production. I am trying. Then, a part of the external terminals of the wiring part may be mounted on the substrate as a terminal for heat dissipation to reduce the thermal resistance of the semiconductor device. After all, the present invention enables the resin-encapsulated semiconductor device to have a large number of terminals, and can sufficiently cope with a further increase in the number of terminals of a semiconductor element and miniaturization.

[Brief description of drawings]

FIG. 1 is a development view of a lead frame member for a semiconductor device according to a first embodiment.

FIG. 2 is a development view of a lead frame member for a semiconductor device according to a second embodiment.

FIG. 3 is a sectional view of a semiconductor device using the lead frame member for a semiconductor device of the present invention.

FIG. 4 is a manufacturing process diagram of a wiring part

FIG. 5 is a sectional view of a resin-sealed semiconductor device and a plan view of a single-layer lead frame.

[Explanation of symbols]

 100, 200 Lead frame member 110, 210 Single layer lead frame 111, 211 Inner lead 112, 212 Outer lead 113, 213 Dam bar 114, 214 Frame (frame) part 120, 220 Wiring part 121, 221 Die pad 122, 222 Lead part 123 223 external terminal 123A protrusion 224 film 225 opening 228 solder protrusion 130, 230 insulating layer 131, 231 opening 140 second insulating layer 141 opening 150 semiconductor element 151 terminal portion (pad portion) 400 lead frame material 401 photosensitivity Resist 401A, 401B Resist pattern 402A, 402B Corrosion part 421 Die pad 422 Lead part 423 External terminal 423A Projection part 510 Semiconductor device 511 Semiconductor element 512 da Ipad part 513 Inner lead 514 Outer lead 515 Resin 520 Single layer lead frame 522 Die pad part 523 Inner lead 524 Outer lead 525 Dam bar 526 Frame (frame) part

Claims (6)

[Claims] 1. At least an inner lead for electrically connecting to a terminal portion of a semiconductor element, and an outer lead for integrally connecting to the inner lead and electrically connecting to an external circuit, A single-layer lead frame having no die pad for mounting a semiconductor element, a die pad for mounting a semiconductor element, leads for electrically connecting to a terminal portion of the semiconductor element around the die pad, A wiring layer having an external circuit that is integrally connected to the lead and that is two-dimensionally arranged along the lead formation surface and an external terminal for making an electrical connection is formed from above with a single-layer lead frame and insulation. A lead frame member for a resin-sealed semiconductor device, in which a layer and a wiring portion are laminated in this order by thermocompression bonding with an insulating layer interposed therebetween. The wiring layer is provided outside the lead end portion on the die pad side, and the insulating layer includes at least a portion corresponding to the die pad portion of the wiring portion and the lead tip portion on the die pad side. A lead frame member for a semiconductor device, characterized in that the lead frame member is opened in a region which does not cover a portion corresponding to a lead tip. 2. The lead frame member for a semiconductor device according to claim 1, wherein the wiring portion is integrally processed by processing a metal plate. 3. The semiconductor device according to claim 1, wherein the wiring portion is covered with a second insulating layer in a state where only the external terminal is exposed on the side opposite to the single layer lead frame. Lead frame member. 4. The wiring part is formed on a film such as a film carrier, and the film such as the film carrier is provided with an opening so that the external terminals are exposed. And a lead frame member for a semiconductor device. 5. The semiconductor device according to claim 1, wherein the position of the inner lead tip of the single-layer lead frame and the position of the lead tip of the wiring portion on the semiconductor element side are arranged in a zigzag pattern. Lead frame member. 6. A semiconductor device using the lead frame member for a semiconductor device according to claim 1.