JPH08250859A - Ceramic multilayer wiring board and manufacture thereof - Google Patents

Ceramic multilayer wiring board and manufacture thereof

Info

Publication number
JPH08250859A
JPH08250859A JP8857195A JP8857195A JPH08250859A JP H08250859 A JPH08250859 A JP H08250859A JP 8857195 A JP8857195 A JP 8857195A JP 8857195 A JP8857195 A JP 8857195A JP H08250859 A JPH08250859 A JP H08250859A
Authority
JP
Japan
Prior art keywords
conductor
paste
ceramic multilayer
conductor layer
main component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8857195A
Other languages
Japanese (ja)
Inventor
Kazunari Tanaka
一成 田中
Nozomi Tanifuji
望 谷藤
Yoshikazu Nakada
好和 中田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Metal SMI Electronics Device Inc
Nippon Steel Corp
Original Assignee
Sumitomo Metal SMI Electronics Device Inc
Sumitomo Metal Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal SMI Electronics Device Inc, Sumitomo Metal Industries Ltd filed Critical Sumitomo Metal SMI Electronics Device Inc
Priority to JP8857195A priority Critical patent/JPH08250859A/en
Publication of JPH08250859A publication Critical patent/JPH08250859A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE: To obtain a ceramic multilayer wiring board which is excellent in positioning accuracy, insures a pattern structure, conductivity and joint strength for permitting fine wiring and holes ability to be plated and solder-wettability by providing an intermediate conductor layer comprising alloy of a specific composition comprising W and/or Mo on a lower layer of a surface conductor layer part of metal mainly containing Cu. CONSTITUTION: An intermediate conductor layer 2 comprising 40 to 90wt.% of W and/or Mo and 10 to 60wt.% of one or more kinds among Ir, Pt, Ti and Cr is provided on a lower layer of a uniform surface conductor layer part 1 mainly containing Cu. Thus, the board material is formed into a multilayer 4 with a wiring conductor forming material 3 mainly containing W and/or Mo, wherein paste for the intermediate conductor comprising 40 to 90wt.% of W and/or Mo and 10 to 60wt.% of one or more kinds among Ir, Pt, Ti and Cr is printed on the conductor 1 appearing on the surface layer, the board 4 and the internal conductor 3 are baked at the same time, and paste for forming a thick conductor film mainly containing Cu is printed and baked on the intermediate conductor layer 2 on the surface.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子回路部品として使
用されるセラミック多層配線基板およびその製造方法に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic multilayer wiring board used as an electronic circuit component and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来のセラミック多層配線基板の導体パ
ターン形成法では、予め内蔵導体を含むセラミック素体
を焼成し、その後、表層導体パターンを形成し焼成する
後付け焼成の導体形成法が、該セラミック素体の焼成に
よる収縮の影響を受けないことから導体の位置精度を確
保する方法として用いられてきた。またこの際の後付け
導体材料としてはモリブデン(以降Moと記す)を主成
分とする金属を用いてきた。しかし、このような表層導
体では導体が細線化した際に導通抵抗が高くなり、また
基板との接合強度も弱くなる欠点があった。そこで、こ
のような細線化した際の導通抵抗が高くなるのに対処す
る方法として銅(以降Cuと記す)を主成分とする導体
ペーストの印刷によりなる表層導体が検討されてきた。
また基板との接合強度が弱くなるのを防ぐ方法として表
層導体中にガラス分を添加しパターンを形成する方法が
検討されてきた。
2. Description of the Related Art In a conventional conductor pattern forming method for a ceramic multilayer wiring board, a conductor forming method of post-attaching firing, in which a ceramic body containing a built-in conductor is fired in advance, and then a surface layer conductor pattern is formed and fired, Since it is not affected by shrinkage due to firing of the element body, it has been used as a method for ensuring the positional accuracy of the conductor. At this time, a metal containing molybdenum (hereinafter referred to as Mo) as a main component has been used as a post-installed conductor material. However, such a surface layer conductor has drawbacks that the conductor resistance becomes high when the conductor is thinned and the joint strength with the substrate becomes weak. Therefore, as a method of coping with the increase in conduction resistance when such a thin wire is used, a surface layer conductor formed by printing a conductor paste containing copper (hereinafter referred to as Cu) as a main component has been studied.
Further, as a method of preventing the bonding strength with the substrate from becoming weak, a method of adding a glass component to the surface layer conductor to form a pattern has been studied.

【発明が解決しようとする課題】[Problems to be Solved by the Invention]

【0003】しかし、前述した構造のセラミック多層配
線基板では、表層導体を細線化した際の導通抵抗の上昇
を抑えるためにCu導体を使用した場合、素体である下
地のセラミック多層基板との接合強度が得られない。ま
た接合強度を確保するため、表層導体中に接合強度を確
保するに必要な量のガラス分を添加した場合、メッキ付
性や半田濡れ性等に不具合が発生し、実装時の信頼性を
低下させるという問題があった。
However, in the ceramic multilayer wiring board having the above-mentioned structure, when the Cu conductor is used to suppress the increase of the conduction resistance when the surface layer conductor is thinned, it is joined to the underlying ceramic multilayer board which is the element body. No strength can be obtained. In addition, in order to secure the bonding strength, if the amount of glass required to secure the bonding strength is added to the surface layer conductor, problems such as plating properties and solder wettability will occur, reducing the reliability during mounting. There was a problem of letting it.

【0004】本発明は、上記した課題に対処して創案し
たものであって、セラミック多層配線基板用の後付け導
体の形成方法として、その位置精度に優れ、かつ細線化
可能なパターン構造および形成方法であり、さらにその
際の導電性ならびに接合強度を確保するとともに、メッ
キ付性や半田濡れ性等を損なわないセラミック多層配線
基板を提供するものである。
The present invention has been made in view of the above-mentioned problems, and as a method of forming a post-installed conductor for a ceramic multilayer wiring board, it has excellent positional accuracy and can be thinned into a pattern structure and a forming method. Further, the present invention provides a ceramic multilayer wiring board that secures the conductivity and the bonding strength at that time and does not impair the plating property and the solder wettability.

【0005】[0005]

【課題を解決するための手段】そして、上記課題を解決
するための手段として、本セラミック多層配線基板の構
造は、Wまたは/およびMoを主成分とする配線導体層
を内蔵したセラミック多層基板の表面に配した導体配線
として、Cuを主成分とする金属の表面導体層部の下層
に、Wまたは/およびMo40〜90wt%とIr、P
t、Ti、Crの1種または2種以上の10〜60wt
%の中間導体層を設けてなることを特徴とするセラミッ
ク多層配線基板である。
As a means for solving the above-mentioned problems, the structure of the present ceramic multilayer wiring board is the structure of a ceramic multilayer board containing a wiring conductor layer containing W or / and Mo as a main component. As a conductor wiring arranged on the surface, W or / and Mo of 40 to 90 wt% and Ir, P are provided under the surface conductor layer of a metal containing Cu as a main component.
10 to 60 wt% of 1 or 2 or more of t, Ti and Cr
% Intermediate conductor layer is provided.

【0006】また、本発明の他のセラミック多層配線基
板の構造は、中間導体層がさらに30wt%以下のセラ
ミック基板と同材質の共材を含有するセラミック多層配
線基板の構造としている。
Another structure of the ceramic multilayer wiring board according to the present invention is the structure of the ceramic multilayer wiring board in which the intermediate conductor layer further contains 30 wt% or less of the same material as the ceramic substrate.

【0007】この発明の第二は、Wまたは/およびMo
を主成分とする配線導体形成材料を内蔵させて基板材料
を多層に形成し、その表層に表れる導体に、Wまたは/
およびMo40〜90wt%とIr、Pt、Ti、Cr
の1種または2種以上の10〜60wt%を有機バイン
ダーとともに混合した中間導体層用ペーストを印刷し、
基板と内部導体を同時に焼成し、次いでその表層の中間
導体層上にCuを主成分とする導体厚膜形成用ペースト
を印刷して焼成し、導体配線を得ることを特徴とするセ
ラミック多層配線基板の製造方法である。
The second aspect of the present invention is W or / and Mo.
Incorporating a wiring conductor forming material containing as a main component, a substrate material is formed in multiple layers, and W or / or
And Mo 40 to 90 wt% and Ir, Pt, Ti, Cr
1 or 2 or more kinds of 10 to 60 wt% is mixed with an organic binder to print an intermediate conductor layer paste,
A ceramic multilayer wiring board characterized in that a board and an internal conductor are simultaneously fired, and then a conductor thick film forming paste containing Cu as a main component is printed on the surface of the intermediate conductor layer and fired to obtain a conductor wiring. Is a manufacturing method.

【0008】また、本発明の他のセラミック多層配線基
板の製造方法は、Wまたは/およびMo40〜90wt
%とIr、Pt、Ti、Crの1種または2種以上の1
0〜60wt%を有機バインダーとともに混合した中間
導体層用ペーストおよびCuを主成分とする導体形成用
ペーストの配線形成が、Wまたは/およびMoを主成分
とする配線導体層を内蔵したセラミック多層基板を焼成
した後、該セラミック多層基板の表層に表れる導体のパ
ターンを形成すべき部分以外に、ポジ型感光性樹脂をフ
ォトリソグラフィー法によりパターニングし、その後、
そのポジ型感光性樹脂パターンに紫外線を照射し現像液
に対して可溶な樹脂パターンの開口部を形成する第一工
程と、前記ポジ型感光性樹脂パターンにより開口部が形
成されたセラミック多層基板上に、中間導体層用ペース
トを充填し乾燥する第二工程と、前記ペーストが充填さ
れたポジ型感光性樹脂を所定のアルカリ現像液にて除去
する第三工程と、得られた前記中間導体層用ペーストを
配したパターンを焼成する第四工程と、次いでCuを主
成分とする導体形成用ペーストの配線形成を上記第一工
程から第四工程においてペーストをCuを主成分とする
導体形成用ペーストに代える以外は同様に行いCuを主
成分とする導体パターンを得る第五工程、を有すること
を特徴とするセラミック多層配線基板の製造方法であ
る。
Another method for manufacturing a ceramic multilayer wiring board according to the present invention is W or / and Mo 40 to 90 wt.
% And one of Ir, Pt, Ti, and Cr or one or more of 1
The wiring of the intermediate conductor layer paste in which 0 to 60 wt% is mixed with an organic binder and the conductor forming paste containing Cu as a main component is used for forming a wiring, and a ceramic multilayer substrate incorporating a wiring conductor layer containing W or / and Mo as a main component. After firing, a positive photosensitive resin is patterned by a photolithography method in a portion other than the portion where the pattern of the conductor appearing on the surface layer of the ceramic multilayer substrate is to be formed, and thereafter,
A first step of irradiating the positive photosensitive resin pattern with ultraviolet rays to form an opening of a resin pattern soluble in a developing solution, and a ceramic multilayer substrate having the opening formed of the positive photosensitive resin pattern. A second step of filling the intermediate conductor layer paste and drying the paste, a third step of removing the positive photosensitive resin filled with the paste with a predetermined alkaline developer, and the obtained intermediate conductor The fourth step of firing the pattern in which the layer paste is arranged, and then the wiring formation of the conductor forming paste containing Cu as the main component is performed in the first to fourth steps for forming the conductor containing Cu as the main component. A method of manufacturing a ceramic multilayer wiring board is characterized by including a fifth step of obtaining a conductor pattern containing Cu as a main component, except that the paste is used instead.

【0009】また、本発明の他のセラミック多層配線基
板の製造方法は、Wまたは/およびMo40〜90wt
%とIr、Pt、Ti、Crの1種または2種以上の1
0〜60wt%を有機バインダーとともに混合した中間
導体層用ペーストおよびCuを主成分とする導体形成用
ペーストの配線形成が、Wまたは/およびMoを主成分
とする配線導体層を内蔵したセラミック多層基板を焼成
した後、該セラミック多層基板の表層に表れる導体のパ
ターンを形成すべき部分以外に、ネガ型感光性樹脂また
はフィルムをフォトリソグラフィー法によりパターニン
グし、ネガ型感光性樹脂またはフィルムに開口部を形成
する第一工程と、前記ネガ型感光性樹脂またはフィルム
の開口部が形成されたセラミック多層基板上に、中間導
体層用ペーストを充填し乾燥する第二工程と、前記ペー
ストが充填されたネガ型感光性樹脂またはフィルムを所
定の剥離液により除去する第三工程と、得られた前記中
間導体層用ペーストを配したパターンを焼成する第四工
程と、次いでCuを主成分とする導体形成用ペーストの
配線形成を上記第一工程から第四工程においてペースト
をCuを主成分とする導体形成用ペーストに代える以外
は同様に行いCuを主成分とする導体パターンを得る第
五工程、を有することを特徴とするセラミック多層配線
基板の製造方法である。
Another method of manufacturing a ceramic multilayer wiring board according to the present invention is W or / and Mo 40 to 90 wt.
% And one of Ir, Pt, Ti, and Cr or one or more of 1
The wiring of the intermediate conductor layer paste in which 0 to 60 wt% is mixed with an organic binder and the conductor forming paste containing Cu as a main component is used for forming a wiring, and a ceramic multilayer substrate incorporating a wiring conductor layer containing W or / and Mo as a main component. After firing, the negative photosensitive resin or film is patterned by a photolithography method to form an opening in the negative photosensitive resin or film in addition to the portion where the conductor pattern appearing on the surface layer of the ceramic multilayer substrate is to be formed. A first step of forming, a second step of filling and drying an intermediate conductor layer paste on the ceramic multilayer substrate on which the opening of the negative photosensitive resin or film is formed, and the negative filled with the paste Third step of removing the mold type photosensitive resin or film with a predetermined stripping solution, and the obtained pace for the intermediate conductor layer The fourth step of firing the pattern in which is arranged and then the wiring formation of the conductor forming paste containing Cu as the main component is replaced with the conductor forming paste containing Cu as the main component in the first to fourth steps. The method for producing a ceramic multilayer wiring board is characterized by including the same steps as those described above except that a fifth step of obtaining a conductor pattern containing Cu as a main component is performed.

【0010】更に、本発明の他のセラミック多層配線基
板の製造方法は、Wまたは/およびMo40〜90wt
%とIr、Pt、Ti、Crの1種または2種以上の1
0〜60wt%にさらに30wt%以下のセラミックス
基板と同材質の共材粉末を添加して有機バインダーとと
もに混合した中間導体層用ペーストを用いるセラミック
多層配線基板の製造方法である。
Furthermore, another method for manufacturing a ceramic multilayer wiring board according to the present invention is W or / and Mo 40 to 90 wt.
% And one of Ir, Pt, Ti, and Cr or one or more of 1
This is a method for manufacturing a ceramic multilayer wiring board using an intermediate conductor layer paste prepared by adding 0% to 60% by weight of 30% by weight or less of a co-material powder of the same material as the ceramics substrate and mixing it with an organic binder.

【0011】[0011]

【作用】本発明の中間導体層におけるIr、Pt、T
i、Crは、Wまたは/およびMoの還元力を抑制する
金属で、Wまたは/およびMoとの代表的な組合せ例は
WとIrである。以下この組合せを主として説明する。
すなわち、焼結によりIrはWに固溶し合金化するた
め、W単体の成分量が減少し、表層導体焼結時にCuペ
ーストに働くWの還元力が抑制され、Cu導体の焼結反
応が安定し、緻密で高強度かつ高導電性の導体となる。
また、IrはCu導体の焼成工程で、少量Cu内に固溶
して、WとIrの中間導体層とCu導体との界面近傍に
強固な接合層を形成し、Cu導体の接合強度を向上させ
る。かかる中間導体層の働きにより、セラミック多層配
線基板におけるCu導体配線を細線化しても導電性を確
保し、導体接合強度を維持できるように作用する。ま
た、表層Cu導体中のガラス分を減少できることからメ
ッキ付性や半田濡れ性等の不良による実装時の信頼性を
低下させることもない。さらにWとIrの中間導体層に
セラミック基板と同材質の共材を添加する理由は、中間
導体層とセラミック素体との同時焼成の際に、焼成収縮
を一致または近づけるためのものであって、同時焼成後
の中間導体層の剥がれ、反り等による寸法バラツキを抑
制するように作用する。
Function: Ir, Pt, T in the intermediate conductor layer of the present invention
i and Cr are metals that suppress the reducing power of W or / and Mo, and a typical combination example with W or / and Mo is W and Ir. This combination will be mainly described below.
That is, since Ir forms a solid solution with W and is alloyed by sintering, the content of W alone is reduced, the reducing power of W acting on the Cu paste during sintering of the surface layer conductor is suppressed, and the sintering reaction of the Cu conductor is suppressed. It is a stable, dense, high-strength and highly conductive conductor.
Further, Ir is dissolved in a small amount in Cu in the step of firing the Cu conductor to form a strong joint layer near the interface between the intermediate conductor layer of W and Ir and the Cu conductor, thereby improving the joint strength of the Cu conductor. Let Due to the function of the intermediate conductor layer, even if the Cu conductor wiring in the ceramic multilayer wiring board is thinned, the conductivity is ensured and the conductor joining strength is maintained. Further, since the glass content in the surface Cu conductor can be reduced, the reliability at the time of mounting due to defects such as plating properties and solder wettability does not deteriorate. Further, the reason for adding the co-material of the same material as the ceramic substrate to the intermediate conductor layer of W and Ir is to make firing shrinkages coincide with or close to each other when the intermediate conductor layer and the ceramic body are simultaneously fired. , And acts to suppress dimensional variation due to peeling, warpage, etc. of the intermediate conductor layer after simultaneous firing.

【0012】本発明の製造方法は、通常の厚膜印刷工程
を適応できるため、コストの上昇を抑えることができ
る。また、特に微細配線や位置精度および寸法精度が要
求される導体形成では、フォトリソグラフィー法を用い
た請求項4および5の製造方法を用いることにより、微
細配線形成が可能となり、さらに寸法精度、位置精度に
優れた導体を得られるように作用する。
Since the manufacturing method of the present invention can be applied to a normal thick film printing process, it is possible to suppress an increase in cost. Further, particularly in the case of forming a fine wiring or a conductor that requires positional accuracy and dimensional accuracy, the fine wiring can be formed by using the manufacturing method according to claims 4 and 5 using the photolithography method. It works so as to obtain a conductor with excellent accuracy.

【0013】[0013]

【実施例】次に中間導体層として代表的な組合せである
WとIrの混合物について、本発明を詳細に説明する。
図1は中間導体層2であるW−Ir上に同寸法の表層C
u導体1を施したセラミック多層配線基板の構造図、図
2は中間導体層2であるW−Ir上にそれより微細な表
層Cu導体1を施したセラミック多層配線基板の構造図
である。
EXAMPLES The present invention will be described in detail with respect to a mixture of W and Ir, which is a typical combination as an intermediate conductor layer.
FIG. 1 shows the surface layer C of the same size on the intermediate conductor layer W-Ir.
FIG. 2 is a structural diagram of a ceramic multilayer wiring board provided with the u conductor 1, and FIG. 2 is a structural diagram of a ceramic multilayer wiring board provided with a finer surface Cu conductor 1 on the intermediate conductor layer W-Ir.

【0014】−実施例A− 平均粒径3〜4μmのW粉末に同等の粒度分布を有する
Ir粉末を加え、さらに必要に応じてアルミナを加え、
エチルセルロース樹脂を主として溶剤に溶解した有機バ
インダーと混合し、中間導体層用ペーストを作成した。
W配線導体3を内蔵したアルミナグリーンシート積層品
の内蔵導体をスルーホールにより連結した表層部に当該
ペーストを印刷して還元雰囲気、1550℃で同時焼成
した。次に得られたセラミック基板の表層導体面にポジ
型感光性樹脂を全面塗布し乾燥する。次に表層導体部に
紫外線を選択的に照射(露光)した後、現像液にて現像
し露光部を溶解除去し、表層導体部に開口部を有するポ
ジ型感光性樹脂層を得る。次にこのポジ型感光性樹脂層
の全面に紫外線を照射し現像液に対して可溶な樹脂層と
する。次にポジ型感光性樹脂の開口部にCuペーストを
充填し乾燥する。次に開口部にCuペーストが充填され
たポジ型感光性樹脂層を所定のアルカリ現像液にて溶解
除去する。次に得られたCuペーストを配したパターン
を900℃*15分焼成することにより中間導体層パタ
ーン上にCu導体配線を得た。得られた配線パターン寸
法は中間導体層2と表層Cu導体1は同サイズであっ
た。この試料の接合強度を初期強度と150℃高温保管
の強度で評価した。測定方法は、235℃±5℃の溶融
半田槽に試料を浸漬後、2mm×2mm角の大きさのラ
ンドに引張試験用のリード線(線径φ0.6mm)を半
田付けし、ピール引張法により、初期強度と150℃で
1000時間保管後の強度を測定した。
Example A Ir powder having an equivalent particle size distribution was added to W powder having an average particle size of 3 to 4 μm, and alumina was further added if necessary,
Ethyl cellulose resin was mixed mainly with an organic binder dissolved in a solvent to prepare an intermediate conductor layer paste.
The paste was printed on the surface layer portion in which the built-in conductor of the alumina green sheet laminated product containing the W wiring conductor 3 was connected by a through hole, and the paste was co-fired at 1550 ° C. in a reducing atmosphere. Next, the surface of the obtained ceramic substrate is coated with a positive photosensitive resin on the entire surface thereof and dried. Next, the surface conductor portion is selectively irradiated (exposed) with ultraviolet rays, and then developed with a developing solution to dissolve and remove the exposed portion to obtain a positive photosensitive resin layer having openings in the surface conductor portion. Next, the entire surface of the positive photosensitive resin layer is irradiated with ultraviolet rays to form a resin layer soluble in the developing solution. Next, the opening of the positive photosensitive resin is filled with Cu paste and dried. Next, the positive photosensitive resin layer whose opening is filled with Cu paste is dissolved and removed with a predetermined alkaline developer. Next, the obtained Cu paste pattern was fired at 900 ° C. for 15 minutes to obtain a Cu conductor wiring on the intermediate conductor layer pattern. The obtained wiring pattern dimensions were the same for the intermediate conductor layer 2 and the surface Cu conductor 1. The joint strength of this sample was evaluated by the initial strength and the strength at 150 ° C. high temperature storage. The measurement method is as follows: After immersing the sample in a molten solder bath at 235 ° C ± 5 ° C, solder a lead wire for tensile test (wire diameter φ0.6mm) to a land of 2mm × 2mm square, and peel peeling method. Thus, the initial strength and the strength after storage at 150 ° C. for 1000 hours were measured.

【0015】試料の組成並びに接合強度の評価を表1に
示す。併せて比較例として、この発明の組成外の例の試
験結果も表1に併記する。なお比較例のNo.6,7は
下層に中間導体層を設けていないものである。
Table 1 shows the composition of the sample and the evaluation of the bonding strength. In addition, as a comparative example, the test results of the examples other than the composition of the present invention are also shown in Table 1. In addition, No. of the comparative example. Nos. 6 and 7 have no intermediate conductor layer as the lower layer.

【0016】[0016]

【表1】 [Table 1]

【0017】実施例Aに示すWとIrによる中間導体層
用ペーストおよびさらに共材としてアルミナ粉末を添加
した中間導体層用ペーストを用いた例では、いずれも初
期強度と高温放置試験後の強度は大きく、またメッキ付
性および半田濡れ性についても良好な結果を得た。下層
に中間導体層を設けていない比較例No.6,7では、
表層Cu導体にガラス分を含まない組成では、初期強度
と高温放置試験後の強度不足が顕著であり、アルミナ基
板との接合性が実施例に比べて劣っている。また基板と
の接合性を向上させるため表層Cu導体中にガラス分を
添加した組成では、メッキ付性および半田濡れに不具合
がみられた。
In the examples using the intermediate conductor layer paste of W and Ir shown in Example A and the intermediate conductor layer paste to which alumina powder was further added as a co-material, both the initial strength and the strength after the high temperature storage test were The results were large and good results were obtained in terms of plating property and solder wettability. Comparative example No. 1 in which the intermediate conductor layer is not provided as the lower layer. In 6 and 7,
In the composition in which the surface Cu conductor does not contain glass, the initial strength and the strength shortage after the high temperature storage test are remarkable, and the bondability with the alumina substrate is inferior to the examples. Further, in the composition in which a glass component was added to the surface Cu conductor in order to improve the bondability with the substrate, there were problems in the plating property and the solder wettability.

【0018】中間導体層のWとIrの粉末は、Wが40
〜90wt%とIrが10〜60wt%の混合粉末であ
って、Irの含有量が10wt%未満ではWを合金化す
る量が少なくW単体の残存量が大で還元力の制御が十分
でなくなる。また60wt%を超える含有は基板との同
時焼成時、Ir粉末とアルミナ基板との焼結特性の差が
大きくなり基板反りおよび剥がれ等の不具合が発生する
ため不適当である。Irの含有量は35〜50wt%が
より望ましい。また、セラミックグリーンシートと中間
導体層の焼成収縮率の差を小さくするために添加するア
ルミナ粉末の量は、30wt%を超えると中間導体層の
導電性を低下させるので好ましくない。アルミナ粉末の
添加量は5〜20wt%がより望ましい。
The W and Ir powders of the intermediate conductor layer have a W of 40
˜90 wt% and Ir of 10 to 60 wt%, and if the Ir content is less than 10 wt%, the amount of W alloyed is small and the residual amount of W alone is large and the control of reducing power becomes insufficient. . Further, if the content exceeds 60 wt%, the difference in the sintering characteristics between the Ir powder and the alumina substrate becomes large when co-firing with the substrate, and problems such as substrate warpage and peeling occur, which are unsuitable. More preferably, the Ir content is 35 to 50 wt%. If the amount of alumina powder added to reduce the difference in firing shrinkage between the ceramic green sheet and the intermediate conductor layer exceeds 30 wt%, the conductivity of the intermediate conductor layer is reduced, which is not preferable. The addition amount of alumina powder is more preferably 5 to 20 wt%.

【0019】前記実施例Aでは、中間導体層を印刷法
で、表層Cu導体をポジ型感光性樹脂の開口部へのCu
ペーストの充填法で説明したが、表層導体のパターン間
隔が狭く細線化が必要な場合などパターン寸法、精度に
よってその製造法を変形実施できる構成を含む。例えば
印刷法では実現困難な狭ピッチ、微細配線の表層導体な
どは、内蔵導体とグリーンシート積層品を予め同時焼成
し、中間導体層をポジ型感光性樹脂の開口部へのW−I
r(必要に応じアルミナ粉末を添加)ペーストの充填法
でパターン形成し焼成した後、表層Cu導体もポジ型感
光性樹脂の開口部へのCuペーストの充填法でパターン
形成することもできる。またポジ型感光性樹脂に替え
て、コストおよびインライン化に適したネガ型感光性樹
脂およびフィルムにより開口部を形成し、同様の手順で
配線形成を行うことが可能であることは言うまでもな
い。この製造法により狭ピッチ、微細配線の表層導体に
おいても同等の効果を得ることができる。
In Example A, the intermediate conductor layer was formed by printing, and the surface Cu conductor was formed by Cu in the opening of the positive photosensitive resin.
Although the method of filling the paste has been described, it includes a configuration in which the manufacturing method can be modified depending on the pattern size and accuracy, such as when the pattern spacing of the surface layer conductor is narrow and thinning is required. For example, in the case of a surface conductor having a narrow pitch and fine wiring, which is difficult to achieve by the printing method, the built-in conductor and the green sheet laminated product are pre-fired simultaneously, and the intermediate conductor layer is WI to the opening of the positive photosensitive resin.
It is also possible to form a pattern by the filling method of the r (adding alumina powder if necessary) paste and fire it, and then pattern the surface Cu conductor by the filling method of the Cu paste into the opening of the positive photosensitive resin. Needless to say, it is possible to form the openings by using a negative photosensitive resin and film suitable for cost and in-line, instead of the positive photosensitive resin, and perform wiring formation in the same procedure. By this manufacturing method, the same effect can be obtained even in a surface conductor having a narrow pitch and fine wiring.

【0020】中間導体層および/または表層Cu導体を
厚膜印刷法で形成した場合、狭ピッチの限界は130μ
m(線幅80μm)、寸法精度は±8μm、位置精度は
±15μmであった。フォトリソグラフィー法による感
光性樹脂の開口部へのペーストの充填法で形成した場
合、狭ピッチの限界は50μm(線幅20μm)、寸法
精度は±3μm、位置精度は±6μmである。
When the intermediate conductor layer and / or the surface Cu conductor is formed by the thick film printing method, the narrow pitch limit is 130 μm.
m (line width 80 μm), dimensional accuracy was ± 8 μm, and positional accuracy was ± 15 μm. When the paste is filled in the openings of the photosensitive resin by the photolithography method, the narrow pitch limit is 50 μm (line width 20 μm), the dimensional accuracy is ± 3 μm, and the positional accuracy is ± 6 μm.

【0021】また、中間導体層の幅と表層Cu導体の幅
は、その絶縁間隔を確保し、半田ブリッヂ等の実装不良
が発生しない範囲で決定されるものであって、図2に示
すように下層の中間導体層2の幅が表層Cu導体1の幅
より広い構造となっても同様の効果を有する。
Further, the width of the intermediate conductor layer and the width of the surface Cu conductor are determined within a range in which the insulation interval is secured and a mounting defect such as a solder bridge does not occur, and as shown in FIG. Even if the width of the lower intermediate conductor layer 2 is wider than that of the surface Cu conductor 1, the same effect can be obtained.

【0022】さらに中間導体層上に得られたCu導体
は、酸化防止あるいは半田との接合性向上のために通常
行われる様なNi−Au等のメッキ処理を施しても良い
ことはいうまでもない。
Further, it goes without saying that the Cu conductor obtained on the intermediate conductor layer may be subjected to a plating treatment such as Ni-Au which is usually carried out for the purpose of preventing oxidation or improving the jointability with solder. Absent.

【0023】−実施例B− 実施例Aの中間導体層において、Wの一部をMoに代え
た例、およびIrに代えてPt、Ti、Crを用いた例
につき同様の中間導体層および表層Cu導体層を形成
し、同様の強度試験をした。中間導体層組成と接合強度
の試験結果を表2に示す。
-Example B- In the intermediate conductor layer of Example A, the same intermediate conductor layer and surface layer were used for an example in which a part of W was replaced by Mo and an example in which Pt, Ti, Cr were used instead of Ir. A Cu conductor layer was formed and the same strength test was performed. Table 2 shows the test results of the composition of the intermediate conductor layer and the bonding strength.

【0024】[0024]

【表2】 [Table 2]

【0025】[0025]

【発明の効果】以上の説明より明らかなように、本発明
のセラミック多層配線基板の構造によれば、表層導体の
下層に中間導体層を設けているため、後付け焼成用の導
体として導電性に優れるCu導体が使用でき、かつ下地
のセラミック多層基板との接合強度も確保できるという
効果を有する。また表層Cu導体中のガラス分を減少で
きることから、メッキ付性や半田濡れ性等による不良が
なく、実装時の信頼性を損なわないセラミック多層配線
基板を供給できるという効果を有する。
As is apparent from the above description, according to the structure of the ceramic multilayer wiring board of the present invention, since the intermediate conductor layer is provided under the surface layer conductor, it becomes conductive as a conductor for post-baking. It has an effect that an excellent Cu conductor can be used and the bonding strength with the underlying ceramic multilayer substrate can be secured. Further, since the glass content in the surface Cu conductor can be reduced, there is an effect that it is possible to supply a ceramic multilayer wiring board which does not have defects due to plating properties and solder wettability and which does not impair reliability during mounting.

【0026】また、本発明のセラミック多層配線基板の
製造法によれば、表層導体が狭ピッチ、微細配線化して
もフォトリソグラフィー法を利用したポジ型感光性樹脂
の開口部へのペースト充填法を使用するため、より高密
度な配線を可能とし、歩留まりが向上できるという効果
を有する。
Further, according to the method for manufacturing a ceramic multilayer wiring board of the present invention, a paste filling method is used to fill the openings of the positive photosensitive resin using the photolithography method even when the surface layer conductors have a narrow pitch and fine wiring. Since it is used, there is an effect that higher density wiring is possible and the yield can be improved.

【0027】さらに、本発明の中間導体層に必要に応じ
てセラミック基板と同材質の其材粉末を添加することに
より、下地のセラミックグリーンシートとの焼成収縮の
差を緩和でき、寸法バラツキ等の品質を安定化できると
いう効果を有する。
Furthermore, by adding powder of the same material as that of the ceramic substrate to the intermediate conductor layer of the present invention as necessary, the difference in firing shrinkage with the underlying ceramic green sheet can be alleviated, and dimensional variations, etc. It has the effect of stabilizing the quality.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例を示す模式図FIG. 1 is a schematic diagram showing an embodiment of the present invention.

【図2】 本発明の他の実施例を示す模式図FIG. 2 is a schematic view showing another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1・・・表層Cu導体、2・・・中間導体層、3・・・
W配線導体、4・・・セラミック基板
1 ... Surface Cu conductor, 2 ... Intermediate conductor layer, 3 ...
W wiring conductor, 4 ... Ceramic substrate

───────────────────────────────────────────────────── フロントページの続き (72)発明者 中田 好和 大阪府大阪市中央区北浜4丁目5番33号 住友金属工業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshikazu Nakata 4-53-3 Kitahama, Chuo-ku, Osaka-shi, Osaka Sumitomo Metal Industries, Ltd.

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 Wまたは/およびMoを主成分とする配
線導体層を内蔵したセラミック多層基板の表面に配した
導体配線として、Cuを主成分とする金属の表面導体層
部の下層に、Wまたは/およびMo40〜90wt%と
Ir、Pt、Ti、Crの1種または2種以上の10〜
60wt%の中間導体層を設けてなることを特徴とする
セラミック多層配線基板。
1. As a conductor wiring arranged on the surface of a ceramic multilayer substrate containing a wiring conductor layer containing W or / and Mo as a main component, W is formed under a surface conductor layer portion of a metal containing Cu as a main component. Or / and Mo of 40 to 90 wt% and one or more of Ir, Pt, Ti and Cr of 10 or more.
A ceramic multilayer wiring board comprising an intermediate conductor layer of 60 wt%.
【請求項2】 中間導体層がさらに30wt%以下のセ
ラミクス基板と同材質の共材を含有する請求項1記載の
セラミック多層配線基板。
2. The ceramic multilayer wiring board according to claim 1, wherein the intermediate conductor layer further contains 30 wt% or less of the same material as the ceramics board.
【請求項3】 Wまたは/およびMoを主成分とする配
線導体形成材料を内蔵させて基板材料を多層に形成し、
その表層に表れる導体に、Wまたは/およびMo40〜
90wt%とIr、Pt、Ti、Crの1種または2種
以上の10〜60wt%を有機バインダーとともに混合
した中間導体層用ペーストを印刷し、基板と内部導体を
同時に焼成し、次いでその表層の中間導体層上にCuを
主成分とする導体厚膜形成用ペーストを印刷して焼成
し、導体配線を得ることを特徴とするセラミック多層配
線基板の製造方法。
3. A wiring material for forming a wiring conductor containing W or / and / or Mo as a main component is incorporated to form a substrate material in multiple layers,
W or / and Mo40 to the conductor appearing on the surface layer
90 wt% and 10 to 60 wt% of Ir, Pt, Ti, or Cr, which is mixed with an organic binder, is printed, and an intermediate conductor layer paste is printed, the substrate and the inner conductor are simultaneously fired, and then the surface layer A method for producing a ceramic multilayer wiring board, characterized in that a conductor thick film forming paste containing Cu as a main component is printed on an intermediate conductor layer and fired to obtain a conductor wiring.
【請求項4】 Wまたは/およびMo40〜90wt%
とIr、Pt、Ti、Crの1種または2種以上の10
〜60wt%を有機バインダーとともに混合した中間導
体層用ペーストおよびCuを主成分とする導体形成用ペ
ーストの配線形成が、 Wまたは/およびMoを主成分とする配線導体層を内蔵
したセラミック多層基板を焼成した後、該セラミック多
層基板の表層に表れる導体のパターンを形成すべき部分
以外に、ポジ型感光性樹脂をフォトリソグラフィー法に
よりパターニングし、その後、そのポジ型感光性樹脂パ
ターンに紫外線を照射し現像液に対して可溶な樹脂パタ
ーンの開口部を形成する第一工程と、 前記ポジ型感光性樹脂パターンにより開口部が形成され
たセラミック多層基板上に、中間導体層用ペーストを充
填し乾燥する第二工程と、 前記ペーストが充填されたポジ型感光性樹脂を所定のア
ルカリ現像液にて除去する第三工程と、 得られた前記中間導体層用ペーストを配したパターンを
焼成する第四工程と、 次いでCuを主成分とする導体形成用ペーストの配線形
成を上記第一工程から第四工程においてペーストをCu
を主成分とする導体形成用ペーストに代える以外は同様
に行いCuを主成分とする導体パターンを得る第五工
程、 を有することを特徴とするセラミック多層配線基板の製
造方法。
4. W or / and Mo 40 to 90 wt%
And one or more of Ir, Pt, Ti, and Cr 10
The wiring formation of the intermediate conductor layer paste and the conductor forming paste containing Cu as a main component, which is mixed with an organic binder in an amount of ˜60 wt%, is carried out by forming a ceramic multilayer substrate containing a wiring conductor layer containing W or / and Mo as a main component. After firing, a positive photosensitive resin is patterned by a photolithography method in a portion other than a portion where a conductor pattern appearing on the surface layer of the ceramic multilayer substrate is to be formed, and then the positive photosensitive resin pattern is irradiated with ultraviolet rays. First step of forming an opening of a resin pattern that is soluble in a developing solution, and filling and drying an intermediate conductor layer paste on the ceramic multilayer substrate in which the opening is formed by the positive photosensitive resin pattern. And a third step of removing the positive photosensitive resin filled with the paste with a predetermined alkaline developer, A fourth step of firing the obtained pattern in which the paste for the intermediate conductor layer is arranged is carried out, and then the wiring of the conductor forming paste containing Cu as a main component is formed in the first to fourth steps by the Cu paste.
A method for manufacturing a ceramic multilayer wiring board, comprising: a fifth step of obtaining a conductor pattern containing Cu as a main component, which is performed in the same manner except that a conductor forming paste containing as a main component is replaced.
【請求項5】 Wまたは/およびMo40〜90wt%
とIr、Pt、Ti、Crの1種または2種以上の10
〜60wt%を有機バインダーとともに混合した中間導
体層用ペーストおよびCuを主成分とする導体形成用ペ
ーストの配線形成が、 Wまたは/およびMoを主成分とする配線導体層を内蔵
したセラミック多層基板を焼成した後、該セラミック多
層基板の表層に表れる導体のパターンを形成すべき部分
以外に、ネガ型感光性樹脂またはフィルムをフォトリソ
グラフィー法によりパターニングし、ネガ型感光性樹脂
またはフィルムに開口部を形成する第一工程と、 前記ネガ型感光性樹脂またはフィルムの開口部が形成さ
れたセラミック多層基板上に、中間導体層用ペーストを
充填し乾燥する第二工程と、 前記ペーストが充填されたネガ型感光性樹脂またはフィ
ルムを所定の剥離液により除去する第三工程と、 得られた前記中間導体層用ペーストを配したパターンを
焼成する第四工程と、 次いでCuを主成分とする導体形成用ペーストの配線形
成を上記第一工程から第四工程においてペーストをCu
を主成分とする導体形成用ペーストに代える以外は同様
に行いCuを主成分とする導体パターンを得る第五工
程、 を有することを特徴とするセラミック多層配線基板の製
造方法。
5. W or / and Mo 40 to 90 wt%
And one or more of Ir, Pt, Ti, and Cr 10
The wiring formation of the intermediate conductor layer paste and the conductor forming paste containing Cu as a main component, which is mixed with an organic binder in an amount of ˜60 wt%, is carried out by forming a ceramic multilayer substrate containing a wiring conductor layer containing W or / and Mo as a main component. After firing, the negative photosensitive resin or film is patterned by photolithography to form an opening in the negative photosensitive resin or film in addition to the portion where the conductor pattern appearing on the surface layer of the ceramic multilayer substrate is to be formed. A second step of filling and drying an intermediate conductor layer paste on a ceramic multilayer substrate in which the opening of the negative photosensitive resin or film is formed, and a negative type filled with the paste Third step of removing the photosensitive resin or film with a predetermined stripping solution, and the obtained intermediate conductor layer pace A fourth step of firing a pattern in which the conductors are arranged, and then wiring formation of a conductor forming paste containing Cu as a main component in the first to fourth steps.
A method for manufacturing a ceramic multilayer wiring board, comprising: a fifth step of obtaining a conductor pattern containing Cu as a main component, which is performed in the same manner except that a conductor forming paste containing as a main component is replaced.
【請求項6】 Wまたは/およびMo40〜90wt%
とIr、Pt、Ti、Crの1種または2種以上の10
〜60wt%にさらに30wt%以下のセラミックス基
板と同材質の共材粉末を添加して有機バインダーととも
に混合したペーストを用いる請求項3、4および5記載
のセラミック多層配線基板の製造方法。
6. W or / and Mo 40 to 90 wt%
And one or more of Ir, Pt, Ti, and Cr 10
6. The method for producing a ceramic multilayer wiring board according to claim 3, 4 or 5, wherein a paste obtained by further adding 30 wt% or less of a co-material powder of the same material as that of the ceramic substrate to -60 wt% and mixing it with an organic binder is used.
JP8857195A 1995-03-09 1995-03-09 Ceramic multilayer wiring board and manufacture thereof Pending JPH08250859A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8857195A JPH08250859A (en) 1995-03-09 1995-03-09 Ceramic multilayer wiring board and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8857195A JPH08250859A (en) 1995-03-09 1995-03-09 Ceramic multilayer wiring board and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH08250859A true JPH08250859A (en) 1996-09-27

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Family Applications (1)

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JP8857195A Pending JPH08250859A (en) 1995-03-09 1995-03-09 Ceramic multilayer wiring board and manufacture thereof

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11160356A (en) * 1997-11-25 1999-06-18 Matsushita Electric Ind Co Ltd Probe card for wafer collective measurement and inspection and ceramic multilayer interconnection board as well as their manufacture
JP2008258214A (en) * 2007-03-31 2008-10-23 Sumitomo Metal Electronics Devices Inc Multilayer wiring board for mounting light-emitting device, and its manufacturing method
JP2009295661A (en) * 2008-06-03 2009-12-17 Sumitomo Metal Electronics Devices Inc Ceramic wiring board and its manufacturing method
JP2011134841A (en) * 2009-12-24 2011-07-07 Kyocera Corp Multilayer wiring board and method of manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11160356A (en) * 1997-11-25 1999-06-18 Matsushita Electric Ind Co Ltd Probe card for wafer collective measurement and inspection and ceramic multilayer interconnection board as well as their manufacture
JP2008258214A (en) * 2007-03-31 2008-10-23 Sumitomo Metal Electronics Devices Inc Multilayer wiring board for mounting light-emitting device, and its manufacturing method
JP2009295661A (en) * 2008-06-03 2009-12-17 Sumitomo Metal Electronics Devices Inc Ceramic wiring board and its manufacturing method
JP2011134841A (en) * 2009-12-24 2011-07-07 Kyocera Corp Multilayer wiring board and method of manufacturing the same

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