JPH08242063A - Wiring circuit board and its manufacture - Google Patents

Wiring circuit board and its manufacture

Info

Publication number
JPH08242063A
JPH08242063A JP4537395A JP4537395A JPH08242063A JP H08242063 A JPH08242063 A JP H08242063A JP 4537395 A JP4537395 A JP 4537395A JP 4537395 A JP4537395 A JP 4537395A JP H08242063 A JPH08242063 A JP H08242063A
Authority
JP
Japan
Prior art keywords
circuit board
solder
external connection
bump
soft
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4537395A
Other languages
Japanese (ja)
Inventor
Satoshi Tanaka
聡 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toppan Inc
Original Assignee
Toppan Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toppan Printing Co Ltd filed Critical Toppan Printing Co Ltd
Priority to JP4537395A priority Critical patent/JPH08242063A/en
Publication of JPH08242063A publication Critical patent/JPH08242063A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3468Applying molten solder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

Abstract

PURPOSE: To form an electrode of a uniform size in a proper position to be attached and detached easily by coating a hard metal which becomes a base with a soft conductive substance (solder and conductive resin) as much as required for fusing as an external connection electrode of a BGA, thus constituting the whole to be almost a ball-shape. CONSTITUTION: A hard metallic layer 11 is formed in a lower surface of a substrate 10. A bump 13 of almost a ball-shape is arranged and formed to almost a matrix form by performing patterning by means of a photoetching method. A resist pattern 12 corresponding to each bump is comprised of a peripheral part covered with a resist of a center part covered with resist - a doughnut-like opening part - doughnut-like resist. After the bump 13 consisting of a hard metal which becomes a base of an external connection electrode is formed, the lower surface of the substrate 10 is immersed in solder liquid and the bump 13 is coated with solder. Solder is formed as much as required for direct surface attaching with an external circuit and functions as a soft metallic part which contributes to connection with an external circuit.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体集積回路素子
(以下、チップと称する)を搭載し、外部回路に接続す
るために用いる配線回路基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board on which a semiconductor integrated circuit element (hereinafter referred to as a chip) is mounted and which is used for connecting to an external circuit.

【0002】詳しくは、ボール・グリッド・アレイ型
(Ball Grid Array …以下、BGAと称する)の半導体
パッケージ向けの配線回路基板に関する。
More specifically, the present invention relates to a wired circuit board for a ball grid array type (BGA) semiconductor package.

【0003】[0003]

【従来の技術】従来、チップをプリント配線基板などの
外部回路に接続するための代表的な装置として、クワッ
ド・フラット・パッケージ(Quad Flat Package …以
下、QFPと称する)がある。
2. Description of the Related Art Conventionally, as a typical device for connecting a chip to an external circuit such as a printed wiring board, there is a quad flat package (hereinafter referred to as QFP).

【0004】QFPは、パッケージの内部で、チップと
リードフレームのインナー・リードとをワイヤボンディ
ング等により接続し、チップを含む領域を樹脂にてモー
ルドしてパッケージとし、その四辺からリードフレーム
のアウター・リードを引き出し、前記リードをガルウィ
ング状に形成し、外部回路と接続する方式の半導体パッ
ケージであり、最も広く普及している。
In the QFP, inside the package, the chip and the inner lead of the lead frame are connected by wire bonding or the like, and a region including the chip is molded with resin to form a package. This is a semiconductor package in which leads are drawn, the leads are formed in a gull wing shape, and the leads are connected to an external circuit, and are most widely used.

【0005】昨今、新規な上記の接続用装置として、B
GA型の半導体パッケージが普及しつつある。
Recently, as a new connection device, the B
GA type semiconductor packages are becoming popular.

【0006】前記パッケージは、特開昭59-172758 号公
報に例示されるような、外部回路に直接的表面取り付け
ができるリードレス・チップキャリヤに関するものであ
り、パッケージの下面に、外部回路との直接的表面取り
付けができるように、略マトリックス状に外部接続用電
極(ボール状のハンダパッド)が配置された構成であ
る。
The package relates to a leadless chip carrier which can be directly surface-mounted on an external circuit, as exemplified in Japanese Patent Laid-Open No. 59-172758. The external connection electrodes (ball-shaped solder pads) are arranged in a substantially matrix shape so that they can be directly surface-mounted.

【0007】また、これに似た形態の半導体パッケージ
として、上記ハンダパッドの代わりに金属ピンを立てた
構造で、プリント配線基板に予め形成したスルーホール
に挿入してハンダ付けすることで固定する、いわゆるピ
ン・グリッド・アレイ型(Pi-n Grid array …以下、P
GAと称する)の半導体パッケージも公知である。
Further, as a semiconductor package of a similar form to this, a structure in which metal pins are erected in place of the solder pads is inserted into through holes formed in the printed wiring board in advance and fixed by soldering. So-called pin grid array type (Pi-n Grid array ...
Semiconductor packages (referred to as GA) are also known.

【0008】QFPに対してのBGAの利点は、特に実
装密度の向上にあり、QFPを取り付けるのに必要な外
部回路基板の実質的面積よりも、BGAを取り付けるの
に必要な前記面積が大幅に小さくなる点にある。また、
端子数が200ピン程度のチップを搭載する場合、QF
Pでは端子ピッチを約 0.5mmと狭くする必要があるが、
BGAでは端子ピッチが約 1.5mmで済むため、さらに高
集積なチップを搭載することも可能である。
The advantage of the BGA over the QFP lies particularly in the increased packing density, in that the area required for mounting the BGA is significantly larger than the substantial area of the external circuit board required for mounting the QFP. It's getting smaller. Also,
QF when mounting a chip with about 200 pins
In P, the terminal pitch needs to be narrowed to about 0.5 mm,
Since the terminal pitch of BGA is about 1.5 mm, it is possible to mount more highly integrated chips.

【0009】また、リードフレームと異なり、配線回路
基板では、配線パターンの設計が自在であり、1つのモ
ジュールにチップを複数個搭載することが容易となる。
Further, unlike the lead frame, the wiring pattern can be freely designed on the printed circuit board, and it becomes easy to mount a plurality of chips on one module.

【0010】すなわち、半導体パッケージの進化の過程
は、QFP(端子が四辺)→PGA(端子が底面)→B
GA(端子が底面であり、PGAよりも薄型)と言え
る。このタイプの半導体装置は、マルチ・チップ・モジ
ュール(Multi Chip Modul-e=MCM)として昨今普及
しつつある。
In other words, the process of semiconductor package evolution is: QFP (terminals on all sides) → PGA (terminals on bottom) → B
It can be said to be GA (the terminal is the bottom surface and thinner than PGA). This type of semiconductor device is recently becoming popular as a multi chip module (Multi Chip Module-e = MCM).

【0011】[0011]

【発明が解決しようとする課題】従来のBGA型の半導
体パッケージにおける外部接続用電極(ボール状のハン
ダパッド)は、材質がハンダのみであるため、以下の問
題点を有している。
The external connection electrode (ball-shaped solder pad) in the conventional BGA type semiconductor package has the following problems because the material is only solder.

【0012】前記パッケージを、一旦、外部回路に取
り付けた後では、ハンダパッドが完全に変形し、融着に
寄与するため、パッケージの取替えが困難である。
After the package is once attached to the external circuit, the solder pad is completely deformed and contributes to fusion, so that it is difficult to replace the package.

【0013】特に技術革新が目ざましい半導体分野にお
いては、チップのライフサイクルも短く、それを応用し
た電子機器の機能向上(修理も含めて)を図った場合
に、外部回路表面でパッケージを取替える機能が要求さ
れる。
Particularly in the semiconductor field where technological innovation is remarkable, the life cycle of the chip is short, and when the function of the electronic equipment applying it is improved (including repair), the function of replacing the package on the surface of the external circuit is provided. Required.

【0014】従来法でのハンダパッド形成は、電極形
成箇所に、溶融状態のハンダを印刷または滴下した後、
加熱(リフロー)時の表面張力により、ボール状とする
手法であった。
The conventional method of forming a solder pad is to print or drop molten solder on the electrode formation area,
It was a method of forming a ball shape by the surface tension at the time of heating (reflow).

【0015】印刷または滴下によって、多数のハンダパ
ッドを、正しい位置に均一な大きさで設けることは困難
である。
It is difficult to provide a large number of solder pads at the correct positions and in a uniform size by printing or dropping.

【0016】本発明は、BGAの外部接続用電極とし
て、パッケージの着脱が容易な構造であり、各電極を正
しい位置に、大きさを均一に形成することが容易となる
ような電極の形成方法を提供することを目的とする。
The present invention has a structure in which a package can be easily attached and detached as an electrode for external connection of a BGA, and a method for forming an electrode in which each electrode can be easily formed in a correct position and in a uniform size. The purpose is to provide.

【0017】[0017]

【課題を解決するための手段】本発明による外部接続用
電極は、ハンダのみの材質からなる構造ではなく、ベー
スとなる硬質金属上に、融着に必要なだけの軟質導電物
質(ハンダや導電性樹脂)を被覆した、全体が略ボール
状の構成とする。
The electrode for external connection according to the present invention does not have a structure made of only a solder material, but a soft conductive material (solder or conductive material) necessary for fusion bonding on a hard metal serving as a base. (A resinous material) is coated to form a substantially ball-shaped structure as a whole.

【0018】尚、本発明においては、ハンダのように、
加熱によって容易に溶融変形したり、導電性樹脂のよう
に、外部回路の端子部分と比較して剛性の低いものを、
「軟質」と称し、ハンダ溶融温度でも固体状態を維持
し、外部回路の端子部分と比較しても剛性が劣らないよ
うなものを「硬質」と称することとする。
In the present invention, like solder,
Those that are easily melted and deformed by heating or that have low rigidity compared to the terminal part of the external circuit, such as conductive resin,
It is called "soft", and it is called "hard" if it maintains a solid state even at the solder melting temperature and its rigidity is not inferior to that of the terminal portion of the external circuit.

【0019】すなわち、請求項1に記載の本発明は、外
部回路との直接的表面取り付けができるように、下面に
略マトリックス状に外部接続用電極が配置された構成の
配線回路基板において、外部接続用電極が、硬質の金属
からなるバンプ上に軟質の導電性物質を積層あるいは被
覆してなり、全体の形状が略ボール状であることを特徴
とする。
That is, the present invention according to claim 1 is a wired circuit board having a structure in which electrodes for external connection are arranged on the lower surface in a substantially matrix form so as to be directly surface-mounted to an external circuit. It is characterized in that the connecting electrode is formed by laminating or coating a soft conductive material on a bump made of a hard metal, and the overall shape is substantially a ball shape.

【0020】請求項2に記載の本発明は、バンプが、
銅,アルミニウム,またはそれらの合金からなり、導電
性物質が、ハンダまたは樹脂からなり、外部接続用電極
が、それらから選択された組合せによることを特徴とす
る。
The present invention according to claim 2 is characterized in that the bump is
It is characterized in that it is made of copper, aluminum, or an alloy thereof, the conductive material is made of solder or resin, and the external connection electrode is made of a combination selected from them.

【0021】請求項3に記載の本発明は、上述の配線回
路基板の外部接続用電極を形成するにあたって、少なく
とも以下の工程を具備することを特徴とする配線回路基
板の製造方法である。 (a)配線回路基板の下面に形成された硬質金属層にパ
ターニングを施し、外部回路への表面取り付け用端子部
分となるバンプを、略ボール状に形成する工程。 (b)前記基板を、固体状態では軟質である液体状態の
導電性物質に浸漬し、前記バンプ上に、軟質の導電性物
質を積層あるいは被覆する工程。 (c)前記導電性物質を加熱することによって、略ボー
ル状とする工程。
According to a third aspect of the present invention, there is provided a method of manufacturing a wired circuit board, which comprises at least the following steps when forming the external connection electrodes of the wired circuit board. (A) A step of patterning the hard metal layer formed on the lower surface of the printed circuit board to form bumps, which will be terminal portions for surface attachment to an external circuit, in a substantially ball shape. (B) A step of immersing the substrate in a liquid conductive substance that is soft in a solid state, and laminating or coating the soft conductive substance on the bumps. (C) A step of heating the conductive material into a substantially ball shape.

【0022】[0022]

【実施例】以下、本発明の実施例を製造工程順に示す図
面を用いて説明する。
Embodiments of the present invention will be described below with reference to the drawings showing the order of manufacturing steps.

【0023】配線回路基板10として、銅張積層板(エポ
キシ樹脂等からなる絶縁性基材の両面または片面に、銅
箔を貼り合わせたもの)をベース材料とし、これをフォ
トエッチング法等の方法で加工して、チップ搭載部と配
線パターンを形成したものを用いる。前記基板10の下面
には、硬質金属層11(銅めっき)が形成されている。
(図1(a) 参照)
As the wiring circuit board 10, a copper clad laminate (a copper foil is attached to both sides or one side of an insulating base material made of epoxy resin or the like) is used as a base material, and this is used as a photoetching method or the like. Then, the one on which the chip mounting portion and the wiring pattern are formed is used. A hard metal layer 11 (copper plating) is formed on the lower surface of the substrate 10.
(See Figure 1 (a))

【0024】尚、同図においては、上面がチップの搭載
面であり、下面に外部接続用電極を形成することにな
る。配線回路基板10の内部では、配線回路パターンが上
面から下面に導通しており、下面ではパターンの終端が
略マトリックス状に配置されているが、図示は省略す
る。
In the figure, the upper surface is the chip mounting surface, and the external connection electrodes are formed on the lower surface. Inside the wired circuit board 10, the wired circuit pattern is conducted from the upper surface to the lower surface, and the pattern ends are arranged in a substantially matrix on the lower surface, but they are not shown.

【0025】フォトエッチング法により、硬質金属層11
にパターニングを施し、図1(c) に示されるような断面
形状(略ボール状)のバンプ13を、基板下面に略マトリ
ックス状に配置形成する。
The hard metal layer 11 is formed by photoetching.
Then, the bumps 13 having a cross-sectional shape (substantially ball-like) as shown in FIG. 1C are arranged and formed on the lower surface of the substrate in a substantially matrix shape.

【0026】バンプ13を略ボール状となるようにエッチ
ング成形するには、フォトレジストのパターン形成を、
図1(b) ・図1(b)'に示すようにする。
To form the bumps 13 into a substantially ball shape by etching, a photoresist pattern is formed.
1 (b) -As shown in FIG. 1 (b) '.

【0027】個々のバンプに対応するレジストパターン
12は、レジストで覆われた中心部〜ドーナツ状の開口部
分〜ドーナツ状のレジストで覆われた周辺部からなる。
(図1(b)'の平面図参照)
Resist pattern corresponding to each bump
12 includes a central portion covered with a resist, a donut-shaped opening portion, and a peripheral portion covered with a donut-shaped resist.
(See the plan view of Figure 1 (b) ')

【0028】外部接続用電極のベースとなる、硬質金属
からなるバンプ13を形成した後、基板10の下面をハンダ
液中に浸漬して、バンプ13をハンダによって被覆する。
After the bumps 13 made of hard metal, which will be the bases of the electrodes for external connection, are formed, the lower surface of the substrate 10 is dipped in a solder solution to cover the bumps 13 with solder.

【0029】前記ハンダは、外部回路との直接的表面取
り付けができる必要量だけ形成すれば良く、外部回路と
の接合に直接寄与する軟質金属部として機能する。
The solder may be formed in an amount necessary for direct surface mounting to an external circuit, and functions as a soft metal portion that directly contributes to joining with the external circuit.

【0030】次いで、ハンダを加熱溶融することによっ
て、略ボール状とする。(図示せず)
Next, the solder is heated and melted into a substantially ball shape. (Not shown)

【0031】[0031]

【発明の効果】本発明による外部接続用電極の構造で
は、接合に直接的に寄与する軟質金属部が少量なため、
パッケージを外部回路に取り付けた後でも、パッケージ
の取替えが容易である。
In the structure of the electrode for external connection according to the present invention, since the soft metal portion directly contributing to the joining is small,
Even after the package is attached to the external circuit, it is easy to replace the package.

【0032】また、本発明による外部接続用電極の製造
方法では、多数のハンダパッドを、正しい位置に均一な
大きさで設けることも容易である。
In addition, in the method of manufacturing an electrode for external connection according to the present invention, it is easy to provide a large number of solder pads at correct positions with a uniform size.

【0033】[0033]

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による外部接続用電極の製造方法を製造
工程順に示す説明図。
FIG. 1 is an explanatory view showing a method of manufacturing an external connection electrode according to the present invention in the order of manufacturing steps.

【符号の説明】[Explanation of symbols]

10…配線回路基板 11…硬質金属層 12…レジストパターン 13…バンプ(硬質金属) 10 ... Wiring circuit board 11 ... Hard metal layer 12 ... Resist pattern 13 ... Bump (hard metal)

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】外部回路との直接的表面取り付けができる
ように、下面に略マトリックス状に外部接続用電極が配
置された構成の配線回路基板において、 外部接続用電極が、硬質の金属からなるバンプ上に軟質
の導電性物質を積層あるいは被覆してなり、全体の形状
が略ボール状であることを特徴とする配線回路基板。
1. A wired circuit board having a structure in which electrodes for external connection are arranged in a substantially matrix form on the lower surface so as to be directly surface-mounted to an external circuit, wherein the electrodes for external connection are made of a hard metal. A wiring circuit board, characterized in that the bumps are laminated or covered with a soft conductive material and the overall shape is substantially ball-like.
【請求項2】バンプが、銅,アルミニウム,またはそれ
らの合金からなり、 導電性物質が、ハンダまたは樹脂からなり、 外部接続用電極が、それらから選択された組合せによる
ことを特徴とする請求項1記載の配線回路基板。
2. The bump is made of copper, aluminum, or an alloy thereof, the conductive material is made of solder or resin, and the external connection electrode is made of a combination selected from them. 1. The printed circuit board according to 1.
【請求項3】請求項1に記載の配線回路基板の外部接続
用電極を形成するにあたって、少なくとも以下の工程を
具備することを特徴とする配線回路基板の製造方法。 (a)配線回路基板の下面に形成された硬質金属層にパ
ターニングを施し、外部回路への表面取り付け用端子部
分となるバンプを、略ボール状に形成する工程。 (b)前記基板を、固体状態では軟質である液体状態の
導電性物質に浸漬し、前記バンプ上に、軟質の導電性物
質を積層あるいは被覆する工程。 (c)前記導電性物質を加熱することによって、略ボー
ル状とする工程。
3. A method for manufacturing a wired circuit board, which comprises at least the following steps in forming an electrode for external connection of the wired circuit board according to claim 1. (A) A step of patterning the hard metal layer formed on the lower surface of the printed circuit board to form bumps, which will be terminal portions for surface attachment to an external circuit, in a substantially ball shape. (B) A step of immersing the substrate in a liquid conductive substance that is soft in a solid state, and laminating or coating the soft conductive substance on the bumps. (C) A step of heating the conductive material into a substantially ball shape.
JP4537395A 1995-03-06 1995-03-06 Wiring circuit board and its manufacture Pending JPH08242063A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4537395A JPH08242063A (en) 1995-03-06 1995-03-06 Wiring circuit board and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4537395A JPH08242063A (en) 1995-03-06 1995-03-06 Wiring circuit board and its manufacture

Publications (1)

Publication Number Publication Date
JPH08242063A true JPH08242063A (en) 1996-09-17

Family

ID=12717471

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4537395A Pending JPH08242063A (en) 1995-03-06 1995-03-06 Wiring circuit board and its manufacture

Country Status (1)

Country Link
JP (1) JPH08242063A (en)

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