JPH08241893A - Semiconductor integrated circuit device and manufacture thereof - Google Patents

Abstract

PURPOSE: To provide a semiconductor integrated circuit device having a wiring film of high reliability and manufacturing technique for easily manufacturing the same. CONSTITUTION: After an insulating film 10 on a base 9 on which a plurality of semiconductor elements are formed is formed, a groove 12 is made in the selective region of the surface of the film 10, a photoresist film 14 is formed at the part of the surface of the region embedded in the groove 12 in the film 13 formed on the film 10 having the groove 12, and then the region where part of the surface of the film 13 is exposed is etched with the film 14 as an etching mask until the surface of the film 10 is exposed. Thus, a columnar pillar 13b is formed on the lower surface of the film 14, and the film 13 of the shape embedded in the groove 12 is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device and a manufacturing technique thereof, and more particularly to a technique effectively applied to a semiconductor integrated circuit device having a highly reliable wiring structure.

[0002]

2. Description of the Related Art In semiconductor integrated circuit devices, high integration and fine processing have been promoted, and accordingly, the wiring structure has become fine, and a highly reliable wiring structure has been demanded.

In recent years, as a wiring structure of a semiconductor integrated circuit device, a pillar pillar made of a conductor is formed in a connection hole in a selective region of an interlayer insulating film for electrically connecting a lower wiring layer and an upper wiring layer. Some have been adopted.

The manufacturing process of the wiring having pillars in the semiconductor integrated circuit device examined by the present inventor is as follows.

That is, as shown in a schematic perspective view in FIG. 17, an insulating film 3 on a semiconductor substrate on which semiconductor elements are formed.
After forming an overlapping film of an aluminum film 31 for wiring, a chromium film 32 serving as a stopper film at the time of pillar formation, and an aluminum film 33 for pillar formation on 0, a wiring pattern is formed by using a photolithography technique. .

Next, as shown in FIG. 18, a photoresist film 34 serving as a mask for forming pillars in the through holes.
The aluminum film 33 whose surface is exposed after forming
Columnar pillar 3
5 is formed. In this case, the chromium film 32 serves as a stopper film that prevents etching.

Next, as shown in FIG. 19, after forming a polyimide film 36 as an interlayer insulating film, a photoresist film 37 as an etchback film is applied to form the film.

Next, as shown in FIG. 20, the photoresist film 37 and the polyimide film 36 thereunder are exposed until the surface of the pillar 35 formed of the aluminum film 33 is exposed.
Is removed by etching.

By this work, the aluminum film 33 embedded in the polyimide film 36 as the interlayer insulating film is formed.
It is possible to form the pillar 35 made of

The manufacturing process for forming a wiring film embedded in the groove of the insulating film as the wiring film of the semiconductor integrated circuit device examined by the present inventor is as follows.

That is, as shown in FIG. 21, a BPSG (Boro Phospho Silicate Glass) film 38 as an insulating film is formed on an insulating film 30 on a semiconductor substrate on which a semiconductor element is formed, and wiring is formed on the surface thereof. After selectively forming a photoresist film 39 serving as a formation mask, the BPSG film 38 is etched using the photoresist film 39 as a mask to form a groove 40.

Next, as shown in FIG. 22, the BPSG film 3
A tungsten film 41 as a wiring film is formed thickly so as to completely fill the groove 40 on the surface of No. 8.

Next, as shown in FIG. 23, the tungsten film 41 is polished and removed from the surface thereof by using a chemical mechanical polishing (CMP) method to form the tungsten film 41 only in the groove 40. By leaving it, the wiring film made of the tungsten film 41 can be formed in the groove 40.

As a document describing the technique of forming a wiring film in a semiconductor integrated circuit device, for example, Press Journal, Inc., November 2, 1989, “'90 latest semiconductor process technology” p267 to p273.
Are listed in.

[0015]

However, the present inventor has found that the semiconductor integrated circuit device having the above-mentioned wiring film has various problems as described below.

That is, in the manufacturing process for forming the pillar 35 made of the aluminum film 33, the aluminum film 3 is used.
1. Since it is necessary to manufacture a laminated film having a three-layer structure of 1, the chromium film 32, and the aluminum film 33, there is a problem that the number of manufacturing steps increases.

In addition, as the wiring structure is being microfabricated and the resolution capability is being improved by thinning the photoresist film, a thick film for forming the pillars 35 having the above-mentioned three-layer structure is formed. Since it is necessary to use the thick photoresist film 34 in the processing of (1), this is contrary to the direction of increasing the resolution capability, and there is a problem that fine processing cannot be performed to some extent. In particular, when the photoresist film 34 is used as an etching mask to etch the above-mentioned overlay film thereunder, the photoresist film 34 is also etched to some extent by, for example, an etching solution in wet etching or dry etching. There is a problem in that the ratio of the etching rate with respect to the photoresist film 34 cannot be ignored, and it is necessary to select a specific material for the photoresist film 34.

Therefore, it is considered difficult to put it into practical use in a manufacturing process for forming a fine wiring structure of 0.5 μm or less, for example.

Further, in the manufacturing process for forming the pillar 35 described above, the aluminum film 31 and the chromium film 32 are formed.
Since there are many interfaces between dissimilar metal films such as the interface with and the like, changes in the resistance value due to reactions due to etching and various chemical reactions occur due to the interfaces, and the reliability of the pillar 35 decreases. There is a problem.

On the other hand, the BPSG film 3 which is the above-mentioned insulating film
In the manufacturing process of forming the wiring film embedded in the groove 40 of No. 8, the tungsten film 41 is polished and removed from the surface by using the chemical mechanical polishing (CMP) method, and the tungsten film is formed only in the groove 40. By leaving 41, a wiring film made of the tungsten film 41 is formed in the groove 40. Therefore, there is a problem in that the pillar-shaped pillars protruding above the wiring film cannot be formed by adopting this manufacturing process.

An object of the present invention is to provide a semiconductor integrated circuit device having a highly reliable wiring film.

Another object of the present invention is to provide a manufacturing technique capable of easily manufacturing a semiconductor integrated circuit device having a highly reliable wiring film.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0024]

The typical ones of the inventions disclosed in the present invention will be outlined below.

(1) A semiconductor integrated circuit device according to the present invention comprises: a wiring film on a substrate on which a plurality of semiconductor elements are provided;
It is assumed that the wiring film and the pillar are provided in a selective region on the surface of the wiring film, and the wiring film and the pillar are formed in the same process.

(2) In the method of manufacturing a semiconductor integrated circuit device according to the present invention, after forming an insulating film on a substrate on which a plurality of semiconductor elements are formed, a groove is formed in a selective region on the surface of the insulating film. A step of forming, a step of forming a wiring film on an insulating film having a groove, and a step of forming a photoresist film serving as an etching mask on a part of the surface of a region of the wiring film embedded in the groove By etching the area where the surface of the wiring film is exposed using the photoresist film as an etching mask until the surface of the insulating film is exposed,
And a step of forming columnar pillars on the lower surface of the photoresist film and forming a wiring film having a shape buried in the groove.

[0027]

[Action]

(1) According to the semiconductor integrated circuit device described above, since the wiring film and the pillar are formed in the same process, the wiring film and the pillar are patterned from a conductive film of the same material. Since the interface between the wiring film and the pillar is made of the same material and is integrated, it is possible to prevent chemical reactions due to different materials at the interface, so that the reliability is high. Wiring structure.

(2) According to the method of manufacturing a semiconductor integrated circuit device of the present invention described above, a groove is formed in a selective region on the surface of the insulating film, and a wiring film is formed on the insulating film having the groove. After that, a step of forming a photoresist film serving as an etching mask on a part of the surface of the region embedded in the groove in the wiring film, and the surface of the wiring film is exposed using the photoresist film as an etching mask. By etching the region until the surface of the insulating film is exposed, a pillar pillar is formed on the lower surface of the photoresist film and a wiring film having a shape embedded in the groove is formed. Since the wiring film and the pillar can be formed in the same process, the interface between the wiring film and the pillar is made of the same material and is integrated, so that different materials at the interface are formed. It is possible to prevent such due to chemical reactions is the high reliability of the wiring structure.

Since the wiring film and the pillar can be formed in the same step, the number of manufacturing steps can be reduced, and the wiring film and the pillar can be formed by a simple manufacturing step.

Further, the surface of the insulating film is exposed in the area where the surface of the wiring film is exposed by using the photoresist film formed on a part of the surface of the area where the wiring film is embedded in the groove as an etching mask. By etching until the process, a pillar-shaped pillar is formed on the lower surface of the photoresist film and a wiring film having a shape embedded in the groove is formed. Since it only has to function as an etching mask when etching a wiring film having a corresponding film thickness, the photoresist film is also etched to some extent by, for example, an etching solution in wet etching or dry etching. Photoresist film material and film in consideration of etching rate ratio Since is necessary to select and eliminated, it becomes simple manufacturing process from this point.

[0031]

Embodiments of the present invention will now be described in detail with reference to the drawings. In all the drawings for explaining the embodiments, those having the same function are designated by the same reference numerals, and a duplicate description will be omitted.

(Embodiment 1) FIGS. 1 to 9 are sectional views showing a manufacturing process of a semiconductor integrated circuit device according to an embodiment of the present invention. The semiconductor integrated circuit device and the manufacturing method thereof according to the present invention will be specifically described with reference to FIG.

First, as shown in FIG. 1, a field insulating film made of a silicon oxide film is formed by using a thermal oxidation process on an element isolation region which is a selective region on the surface of a semiconductor substrate 1 made of, for example, p-type silicon single crystal. The film 2 is formed. Although not shown, a channel stopper film for preventing inversion is formed under the field insulating film 2.

Next, as shown in FIG. 2, a gate insulating film 3 made of silicon oxide is formed in the active region surrounded by the field insulating film 2, and a gate made of polycrystalline silicon is formed on the gate insulating film 3. The electrode 4 is formed. The gate electrode 4 is formed by sequentially depositing an insulating film 5 made of a polycrystalline silicon film and a silicon oxide film on the semiconductor substrate 1 and sequentially etching these. Then, the gate electrode 4
Side wall insulating film 6 made of silicon oxide on the side wall of
To form.

Next, n such as phosphorus (P) is formed on the semiconductor substrate 1.
Type impurities are ion-implanted to form an n-type semiconductor region 7 serving as a source and a drain.

Next, as shown in FIG. 3, an insulating film 8 is formed on the semiconductor substrate 1. As the insulating film 8, for example, a silicon oxide film formed by a CVD method can be used.

In the manufacturing process of the semiconductor integrated circuit device described above, the p-channel MOSFET is formed on the semiconductor substrate 1, but the p-channel MOSFET is formed on the semiconductor substrate 1.
It is possible to adopt a mode in which various semiconductor elements such as n-channel MOSFETs, bipolar transistors, and capacitive elements other than the above are formed.

The manufacturing process of the semiconductor integrated circuit device described above can be performed by combining various prior arts. A main part of the semiconductor integrated circuit device and the manufacturing method thereof according to the present invention is to form a wiring film and a pillar in the wiring structure of the semiconductor integrated circuit device in the same step. Based on this, in order to simplify future illustrations, the semiconductor substrate 1 formed by the above-described manufacturing process is comprehensively illustrated as the substrate 9 in which the p-channel MOSFET is formed as the starting material, and the internal structure is shown. The internal structure of the base body 9 having the above is omitted and the dimensions shown in the drawing are reduced.

Next, as shown in FIG. 4, an insulating film 10 made of, for example, a BPSG film is formed on the surface of the insulating film 8 formed on the substrate 9.

Next, after forming the photoresist film 11 on the surface of the insulating film 10, the opening 11 is formed in the selective region of the photoresist film 11 by using the photolithography technique.
After forming a, the region of the insulating film 10 whose surface is exposed by the opening 11a is etched using the photoresist film 11 as an etching mask to form a groove 12.

The depth of the groove 12 corresponds to the film thickness of the wiring film formed in this region, and is, for example, 0.3 to 1.5 μm.

The etching process for forming the groove 12 using, for example, a BPSG film as the insulating film 10 can be most easily performed by adopting a time-specified etching method.

As another mode of forming the insulating film 10, a nitric oxide film serving as an etching stopper film is formed on the BPSG film by plasma CVD (Chemical Vapor Deposit).
There is a method in which a silicon oxide film having a film thickness corresponding to the film thickness of the wiring film is formed on the nitric oxide film by a plasma CVD method after forming the film with a film thickness of, for example, 10 to 50 nm by the ion) method. In this case, the etching step of forming the groove 12 can be performed by removing a selective region of the silicon oxide film by using a photolithography technique using a nitric oxide film as an etching stopper film.

Next, as shown in FIG. 5, after removing the unnecessary photoresist film 11, the groove 12 to be described later is formed.
A wiring film 13 is formed on the groove 12 and the insulating film 10 in order to form a wiring film to be embedded in the substrate and a pillar electrically connected to the wiring film in the same process.

The wiring film 13 is formed with a film of, for example, a tungsten film having a film thickness of, for example, 50 to 200 nm as an adhesive film for enhancing the adhesiveness with the insulating film 10 by a sputtering method (not shown), and then the groove 12 is formed. CVD capable of forming good coverage for embedding
For example, a tungsten film is formed by the method.

Wiring film 13 on insulating film 10 except trench 12
The film thickness of is equivalent to the height of the pillar.

Next, after a photoresist film 14 is formed on the surface of the wiring film 13, a selective region of the photoresist film 14 is exposed by an exposure device, and then exposed and developed.
The photoresist film 14 is left in the region where the pillar is formed, and the photoresist film 14 in the other regions is removed.

The pattern of the photoresist film 14 in this case corresponds to the planar shape of the pillar. The planar shape of the pillar-shaped pillar can be various shapes such as a circular shape or a square shape.

Then, as shown in FIG. 6, using the photoresist film 14 as an etching mask, the wiring film 13 whose surface is exposed is etched by an insulating film by an anisotropic dry etching method. By performing the process until the surface of 10 is exposed, the pillar-shaped pillar 13b and the wiring film 13a embedded in the groove 12 are formed in the same step.

The etching process of the wiring film 13 is optimal by adopting an etching control method utilizing plasma emission, such as using a peak value due to plasma emission of silicon and fluorine from the exposed insulating film 10 as a monitor. Etching process.

Next, as shown in FIG. 7, after the unnecessary photoresist film 14 is removed, an insulating film 15 serving as an interlayer insulating film is formed with a film thickness equal to or larger than the height of the pillar 13b.

The insulating film 15 is formed, for example, by forming a silicon oxide film by the plasma CVD method.

After that, an etching sacrificial film 16 such as a photoresist film or an SOG (Spin On Glass) film is formed on the surface of the insulating film 15.

The sacrificial film 16 for etching is the insulating film 1
5 has irregularities on the surface, the irregularities are buried to form the sacrificial film 16 for etching having a flat surface, and the etching sacrificial film 16 to be described later can be uniformly formed. . If the manufacturing process in which the surface of the insulating film 15 can be formed as a flat surface without unevenness is adopted, the sacrificial film 16 for etching is used as necessary.
May be omitted.

Next, as shown in FIG. 8, a chemical mechanical polishing (CMP) method is used to sequentially remove the etching sacrificial film 16 and the insulating film 15 on the lower surface thereof from the surface thereof, and the surface of the pillar 13b. Do the work until the is exposed.

The work of sequentially removing the sacrificial film 16 for etching and the insulating film 15 from the surface thereof can also be performed by an etching method such as wet etching or dry etching. In this case, until the surface of the pillar 13b is exposed. Do that work.

Through this process, the surface of the pillar 13b is exposed and the insulating film 15 as an interlayer insulating film which is flush with the surface of the pillar 13b can be formed on the side surface of the pillar 13b.

Next, as shown in FIG. 9, after forming a wiring film 42 such as an aluminum film on the pillar 13b and the insulating film 15, the wiring film 42 in an unnecessary region is formed by using a photolithography technique. The wiring film 42 having a wiring pattern is formed by selectively removing it.

Next, a surface protective film (not shown) such as a nitric oxide film is formed, and the manufacturing process of the semiconductor integrated circuit device is completed.

According to the semiconductor integrated circuit device manufactured by the manufacturing process of the semiconductor integrated circuit device of this embodiment described above, the wiring film 13a and the pillar 13b can be formed by the same process. Therefore, since the wiring film 13a and the pillar 13b can be patterned from the wiring film 13 which is a conductive film of the same material, the interface between the wiring film 13a and the pillar 13b is made of the same material. Since they are integrated with each other, a chemical reaction or the like due to different materials at the interface can be prevented, so that a highly reliable wiring structure can be obtained.

According to the method for manufacturing the semiconductor integrated circuit device of the present embodiment described above, the groove 12 is formed in the selective region of the surface of the insulating film 10, and the wiring film is formed on the insulating film 10 having the groove 12. After forming 13, the step of forming the photoresist film 14 on a part of the surface of the region of the wiring film 13 which is embedded in the groove 12, and the surface of the wiring film 13 exposed by using the photoresist film 14 as an etching mask. Etching the exposed region until the surface of the insulating film 10 is exposed to form pillar pillars 13b on the lower surface of the photoresist film 14 and a wiring film 13a having a shape embedded in the groove 12. Is to have. Therefore, since the wiring film 13a and the pillar 13b can be formed in the same process, the interface between the wiring film 13a and the pillar 13b is made of the same material and is integrated, so that it is caused by different materials at the interface. Since it is possible to prevent chemical reactions that occur, it is possible to provide a highly reliable wiring structure.

Further, since the wiring film 13a and the pillar 13b can be formed in the same step, the number of manufacturing steps can be reduced, and the wiring film 13a and the pillar 13 can be manufactured by a simple manufacturing step.
b can be formed.

Further, by using the photoresist film 14 as an etching mask, the region where the surface of the wiring film 13 is exposed is etched until the surface of the insulating film 10 is exposed, whereby the pillar-shaped pillars are formed on the lower surface of the photoresist film 14. 1
3 b and the step of forming the wiring film 13 a in the shape of being buried in the groove 12, the photoresist film 14 etches the wiring film 13 having a film thickness corresponding to the height of the pillar 13 b. At this time, since it only has to function as an etching mask, the photoresist film 14 is also etched to some extent by, for example, an etching solution in wet etching or dry etching, but the etching rate ratio between the wiring film 13 and the photoresist film 14 should be taken into consideration. Photoresist film 14
Since there is no need to select the material and film thickness of
From this point as well, the manufacturing process can be simple.

Furthermore, by using the photoresist film 14 as an etching mask, the region where the surface of the wiring film 13 is exposed is etched until the surface of the insulating film 10 is exposed. By including the step of forming the pillar 13b and the wiring film 13a having a shape buried in the groove 12, the height of the pillar 13b can be freely set as necessary.

After the pillars 13b are formed, the insulating film 15 is formed on the side surfaces of the pillars 13b so that the pillars 13b are embedded in the regions of the insulating film 15 that are like connection holes. Can be reinforced. Therefore, the pillar 13b having the above-mentioned high dimensions is
In addition to being able to form the pillar, the aspect ratio of the pillar 13b can be increased, and the pillar 13b can be formed by fine processing. As a result, it has a highly reliable wiring film and pillar with fine processing, for example, 0.
A wiring structure such as a fine multilayer wiring having a thickness of 5 μm or less can be formed.

(Embodiment 2) FIG. 10 is a sectional view showing a manufacturing process of a semiconductor integrated circuit device which is another embodiment of the present invention.

The characteristics of the semiconductor integrated circuit device of this embodiment are as follows.
The wiring film 13a in Example 1 described above is the upper wiring film, and the lower wiring film 18 is formed through the contact film 13c embedded in the connection hole 17 therebelow.

In the manufacturing process of the semiconductor integrated circuit device of this embodiment, after the insulating film 8 of the first embodiment described above is formed, the lower wiring film 18 is formed in a selective region on the surface thereof, and then the substrate 9 is formed. An insulating film 10 made of, for example, a BPSG film is formed thereon.

Next, before forming the groove 12 in the first embodiment, after forming the connection hole 17 in a selective region of the insulating film 10 where the groove 12 is formed by using the photolithography technique. The contact film 13c is formed by burying the wiring film 13 in the connection hole 17 in the same step as the step of forming the wiring film 13a and the pillar 13b having the shape buried in the groove 12 in the first embodiment.

The manufacturing steps other than the manufacturing steps described above in the present embodiment are the same as the manufacturing steps of the semiconductor integrated circuit device of the first embodiment described above, and therefore the description thereof will be omitted.

In this embodiment, the contact film 13c for electrically connecting the lower layer wiring film 18 and the wiring film 13a, the wiring film 13a to be the upper layer wiring film, and the pillars 13b can be formed in the same step, which results in the manufacturing process. It is possible to form a simple manufacturing process because there are few defects and they can be formed.

Further, the contact film 13c and the wiring film 13a
Since the pillars 13b are made of the same material and are formed of the wiring film 13 formed in the same step,
Since the interface between the contact film 13c and the wiring film 13a and the interface between the wiring film 13a and the pillar 13b are the wiring film 13, it is possible to prevent chemical reactions and the like at these interfaces and to have excellent electrical characteristics. In addition, a highly reliable wiring structure can be obtained.

(Embodiment 3) FIG. 11 is a sectional view showing a manufacturing process of a semiconductor integrated circuit device which is another embodiment of the present invention.

The characteristics of the semiconductor integrated circuit device of this embodiment are as follows.
The conductive film 19 made of a material different from those is provided on the side surfaces of the wiring film 13a and the contact film 13c in the second embodiment described above. As the conductive film 19, for example, a multilayer film of a titanium film and a titanium nitride film is applied. Since the conductive film 19 is provided, the wiring film 1
3b and the contact film 13c and the lower wiring film 18 and the insulating film 10 are improved in adhesiveness, and an electric wiring structure having excellent electric characteristics can be obtained.

The manufacturing process of the semiconductor integrated circuit device according to the present embodiment is the same as the connection hole 17 and the groove 12 in the second embodiment.
After forming, the conductive film 19 is formed. To form the conductive film 19, the insulating film 1 including the surfaces of the connection hole 17 and the groove 12 is formed.
For example, after forming a titanium film on the surface of 0, a titanium nitride film is formed on the surface.

Next, after the wiring film 13 is formed by the same process as in the first embodiment, the photoresist film 14 is formed in the region of the wiring film 13 where the pillar 13b is formed.

After that, using the photoresist film 14 as an etching mask, the wiring film 13 whose surface is exposed is etched by a dry etching method having anisotropy to form a conductive film 19 on the insulating film 10. Columnar pillar 1 by performing the process until the titanium nitride film is exposed.
3b and the wiring film 13a embedded in the groove 12 are formed in the same step.

In the etching process of the wiring film 13, by adopting an etching control method using plasma light emission such as using a peak value due to plasma light emission of titanium from the titanium nitride film in the exposed conductive film 19 as a monitor, It can be an optimum etching process.

Next, the conductive film 19 on the insulating film 10 is removed by dry etching using, for example, a chlorine-based gas, so that the wiring film 13a and the pillar 13b made of, for example, a tungsten film are hardly etched. be able to.

The manufacturing process other than the manufacturing process described above in this embodiment is the same as the manufacturing process of the semiconductor integrated circuit device according to the first and second embodiments, and the description thereof will be omitted.

In this embodiment, since the conductive film having excellent adhesiveness is provided on the side surfaces of the wiring film 13a and the contact film 13c, the adhesiveness with the lower wiring film 18 and the insulating film 10 is improved. In addition, an electric wiring structure having excellent electric characteristics can be obtained.

(Embodiment 4) FIG. 12 is a sectional view showing a manufacturing process of a semiconductor integrated circuit device which is another embodiment of the present invention.

The characteristics of the semiconductor integrated circuit device of this embodiment are as follows.
An aluminum film is used as the wiring film 13 in the above-described Example 3, and the wiring film 13a and the pillar 13 are used.
Aluminum is applied as the material of the b and the contact film 13c.

In the manufacturing process of the semiconductor integrated circuit device of this embodiment, after forming the conductive film 19 in the above-described third embodiment, a reflow aluminum film is formed as the wiring film 13 to form the wiring film 13 in the groove 12. Can be easily embedded.

Next, the pillar 13 in the wiring film 13
After forming the photoresist film 14 in the region where b is to be formed, the photoresist film 14 is used as an etching mask to etch the exposed wiring film 13 by a dry etching method using a chlorine-based gas. By performing the above steps until the titanium nitride film in the conductive film 19 on the insulating film 10 is exposed, the pillar-shaped pillar 13b and the wiring film 13a embedded in the groove 12 are formed in the same step. In this case, by using the fluorine-based gas at the end point of the etching, the chlorine-based gas and the fluorine-based gas can be replaced with each other, so that the wiring film 13a and the pillar 13b are formed of an aluminum film. Corrosion of 13 can be prevented.

The manufacturing steps other than the manufacturing steps described above in this embodiment are the same as the manufacturing steps of the semiconductor integrated circuit device of the first, second, and third embodiments, and therefore description thereof will be omitted.

According to the method of manufacturing the semiconductor integrated circuit device of the present embodiment, the wiring film 13a and the pillar 13b are formed in the same step using the wiring film 13 made of an aluminum film. Since it is a cheaper material such as a film and can be formed by an easy manufacturing process, the manufacturing cost can be reduced.

(Embodiment 5) FIGS. 13 to 16 are sectional views showing a manufacturing process of a semiconductor integrated circuit device according to another embodiment of the present invention.

In the semiconductor integrated circuit device and the method of manufacturing the same of the present embodiment, after forming the wiring film 13a and the pillar 13b in the above-described second embodiment, the wiring film 21a and the pillar 21b as the upper wiring which are electrically connected thereto are formed. To form a multi-layer wiring structure.

The method of manufacturing the semiconductor integrated circuit device of this embodiment is as follows. In addition, the above-mentioned Examples 1, 2, 3
The description of the same steps as those of the semiconductor integrated circuit device manufacturing process will be omitted.

As shown in FIG. 13, after the insulating film 20 having a film thickness corresponding to the film thickness of the wiring film of the upper layer wiring is formed on the pillar 13b and the insulating film 15, the pillar 13b is formed by using the photolithography technique. The insulating film 20 in the region above is removed to form the connection hole 20a and expose the surface of the pillar 13b. The insulating film 20 is formed, for example, by forming a silicon oxide film by a plasma CVD method.

Next, a wiring film 21 is formed on the connection hole 20a and the insulating film 20 in order to form a wiring film to be buried in the connection hole 20a described later and pillars electrically connected to the wiring film in the same step.

The wiring film 21 is, for example, a reflow aluminum film. Note that, as another mode of the wiring film 21, various conductive films such as a tungsten film or a conductive polycrystalline silicon film can be used.

The film thickness of the wiring film 21 on the insulating film 10 excluding the connection hole 20a corresponds to the height of the pillar.

Next, as shown in FIG. 14, a photoresist film 22 is formed on the surface of the wiring film 21, and a selective region of the photoresist film 22 is exposed by an exposure device, and then exposed and developed. The photoresist film 22 is left in the region where the pillar is formed, and the photoresist film 22 in the other regions is removed.

The pattern of the photoresist film 22 in this case corresponds to the planar shape of the pillar. The planar shape of the pillar-shaped pillar can be various shapes such as a circular shape or a square shape.

Thereafter, using the photoresist film 22 as an etching mask, the wiring film 21 having an exposed surface is etched by a dry etching method using a chlorine-based gas to expose the surface of the insulating film 20. The pillar-shaped pillar 21b and the connection hole 20a
The wiring film 21a having a shape embedded in is formed in the same step. In this case, by using the fluorine-based gas at the end point of the etching, the chlorine-based gas and the fluorine-based gas can be replaced with each other, so that the wiring film 21a and the pillar 21b are formed of an aluminum film. 21 can be prevented from corrosion.

As shown in FIG. 14, when the pattern of the photoresist film 22 as an etching mask is formed with a deviation from a predetermined position, the pillar 21b is located on the surface of the wiring film 21a. The wiring film 21a and the pillar 21b can be formed in the same step so that there is no electrical problem even if the wiring film 21a deviates from the proper position. Therefore, the pattern of the photoresist film as the etching mask for forming the pillar 21b can be formed by a simple manufacturing process without any problem even if there is some variation.

Next, as shown in FIG. 15, after removing the unnecessary photoresist film 22, an insulating film 23 to be an interlayer insulating film is formed with a film thickness equal to or higher than the height of the pillar 21b.

The insulating film 23 is formed, for example, by forming a silicon oxide film by the plasma CVD method.

After that, a sacrificial film 24 for etching such as a photoresist film or an SOG (Spin On Glass) film is formed on the surface of the insulating film 23.

This etching sacrificial film 24 is the insulating film 2.
3 has irregularities on the surface, the irregularities are buried to form the sacrificial film for etching 24 having a flat surface, and these are formed because the etching described below can be performed uniformly. . If the manufacturing process in which the surface of the insulating film 23 can be formed as a flat surface without unevenness is adopted, the sacrificial film 24 for etching is used as necessary.
May be omitted.

Next, as shown in FIG. 16, the chemical mechanical polishing (CMP) method is used to sequentially remove the etching sacrificial film 24 and the insulating film 23 on the lower surface thereof from the surface of the pillar 21b. Do the work until the is exposed.

The work of sequentially removing the sacrificial film for etching 24 and the insulating film 23 from the surface thereof can be performed by an etching method such as wet etching or dry etching. In this case, until the surface of the pillar 21b is exposed. Do that work.

By this step, the insulating film 23 as an interlayer insulating film which exposes the surface of the pillar 21b and is flush with the surface of the pillar 21b can be formed on the side surface of the pillar 21b.

Next, a surface protective film (not shown) such as a nitric oxide film is formed, and the manufacturing process of the semiconductor integrated circuit device is completed.

According to the semiconductor integrated circuit device manufactured by the above-described manufacturing process of the semiconductor integrated circuit device of this embodiment, the wiring film 13a and the pillar 13b are formed by the same process, and then the wiring film 21a and the pillar are manufactured by the same process. 21b can be formed. Therefore, since the wiring film and the pillar of each layer of the multilayer wiring structure can be patterned from the wiring film which is the conductive film of the same material, the interface between the wiring film of each layer and the pillar is made of the same material. Since they are integrated with each other, a chemical reaction or the like due to different materials at the interface can be prevented, so that a highly reliable wiring structure can be obtained.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say. Specifically, as the wiring film, other conductive materials such as an aluminum alloy film which is an alloy of a conductive metal and aluminum or a conductive polycrystalline silicon film can be applied in addition to the tungsten film or the aluminum film.

[0109]

The effects obtained by the typical ones of the inventions disclosed in this application will be briefly described as follows.
It is as follows.

(1) According to the semiconductor integrated circuit device of the present invention, the wiring film and the pillar can be formed in the same step. Therefore, since the wiring film and the pillar can be patterned from the conductive film of the same material, the interface between the wiring film and the pillar is made of the same material and integrated. Since a chemical reaction due to different materials at the interface can be prevented, a highly reliable wiring structure can be obtained.

(2) According to the method for manufacturing a semiconductor integrated circuit device of the present invention, after forming a groove in a selective region of the surface of the insulating film and forming a wiring film on the insulating film having the groove. ,
A step of forming a photoresist film serving as an etching mask on a part of the surface of the region of the wiring film embedded in the groove, and insulating the region where the surface of the wiring film is exposed using the photoresist film as an etching mask By etching until the surface of the film is exposed, a pillar pillar is formed on the lower surface of the photoresist film, and a wiring film having a shape embedded in the groove is formed. Since the wiring film and the pillar can be formed, since the interface between the wiring film and the pillar is made of the same material and is integrated, it is possible to prevent a chemical reaction or the like due to different materials at the interface. A wiring structure with high reliability can be obtained.

Since the wiring film and the pillar can be formed in the same step, the number of manufacturing steps can be reduced and the wiring film and the pillar can be formed by a simple manufacturing step.

(3) According to the method of manufacturing a semiconductor integrated circuit device of the present invention, the wiring film is formed by using the photoresist film formed on a part of the surface of the region of the wiring film embedded in the groove as an etching mask. By etching the region where the surface of the photoresist is exposed until the surface of the insulating film is exposed, thereby forming a pillar pillar on the lower surface of the photoresist film and forming a wiring film having a shape embedded in the groove. Since the photoresist film only needs to function as an etching mask when etching the wiring film having a film thickness corresponding to the height of the pillar, the photoresist film is also used as an etching solution or dry etching in wet etching, for example. Etching rate due to wiring film and photoresist film Since considering ratio is necessary to select a such material and film thickness of the photoresist film disappears, also from this point can be a simple manufacturing process.

Further, by using the photoresist film as an etching mask, the region where the surface of the wiring film is exposed is etched until the surface of the insulating film is exposed to form pillar pillars on the lower surface of the photoresist film. The height of the pillar can be freely set as required by including the step of forming the wiring film having the shape buried in the groove.

Further, after the pillars are formed, an insulating film is formed on the side surfaces of the pillars so that the pillars are embedded in the region of the insulating film that is like a connection hole, and the pillars having a columnar shape can be reinforced by the insulating film. Therefore, in addition to being able to form the pillars of high dimensions described above, the aspect ratio of the pillars can be increased and the pillars can be formed by fine processing. As a result, it is possible to form a wiring structure having a highly reliable wiring film and pillars, such as a multilayer wiring, by fine processing.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 9 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 10 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is another embodiment of the present invention.

FIG. 11 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is another embodiment of the present invention.

FIG. 12 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is another embodiment of the present invention.

FIG. 13 is a cross-sectional view showing the manufacturing process of the semiconductor integrated circuit device which is another embodiment of the present invention.

FIG. 14 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is another embodiment of the present invention.

FIG. 15 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit device which is another embodiment of the present invention.

FIG. 16 is a cross-sectional view showing the manufacturing process of the semiconductor integrated circuit device which is another embodiment of the present invention.

FIG. 17 is a schematic perspective view showing a manufacturing process of a wiring having pillars in a semiconductor integrated circuit device examined by the present inventor.

FIG. 18 is a schematic perspective view showing a manufacturing process of a wiring having pillars in a semiconductor integrated circuit device examined by the present inventor.

FIG. 19 is a cross-sectional view showing a manufacturing process of a wiring having pillars in a semiconductor integrated circuit device examined by the present inventor.

FIG. 20 is a cross-sectional view showing a manufacturing process of a wiring having pillars in a semiconductor integrated circuit device examined by the present inventor.

FIG. 21 is a cross-sectional view showing the manufacturing process of the wiring film in the semiconductor integrated circuit device examined by the present inventor.

FIG. 22 is a cross-sectional view showing the manufacturing process of the wiring film in the semiconductor integrated circuit device examined by the present inventor.

FIG. 23 is a cross-sectional view showing the manufacturing process of the wiring film in the semiconductor integrated circuit device examined by the present inventor.

[Explanation of reference numerals] 1 semiconductor substrate 2 field insulating film 3 gate insulating film 4 gate electrode 5 insulating film 6 sidewall insulating film 7 semiconductor region 8 insulating film 9 substrate 10 insulating film 11 photoresist film 11a opening 12 groove 13 wiring film 13a Wiring film 13b Pillar 13c Contact film 14 Photoresist film 15 Insulating film 16 Etching sacrificial film 17 Connection hole 18 Lower layer wiring film 19 Conductive film 20 Insulating film 20a Connection hole 21 Wiring film 21a Wiring film 21b Pillar 22 Photoresist film 23 Insulation Film 24 Sacrificial film for etching 30 Insulating film 31 Aluminum film 32 Chrome film 33 Aluminum film 34 Photoresist film 35 Pillar 36 Polyimide film 37 Photoresist film 38 BPSG film 39 Photoresist film 40 Groove 41 Tungsten film 42 Arrangement Wire membrane

Claims (9)

[Claims] 1. A wiring film on a substrate on which a plurality of semiconductor elements are provided, and a pillar provided on a selective region of a surface of the wiring film, wherein the wiring film and the pillar are provided. A semiconductor integrated circuit device, which is formed by the same process. 2. A wiring film on a substrate on which a plurality of semiconductor elements are provided, a contact film provided in a selective region on the lower surface of the wiring film, and a selective surface on the surface of the wiring film. A semiconductor integrated circuit device having a pillar provided in a region, wherein the wiring film, the contact film, and the pillar are formed in the same step. 3. The semiconductor integrated circuit device according to claim 1 or 2, wherein the wiring film is provided in a selective region of a surface of an insulating film on a substrate on which a plurality of semiconductor elements are provided. A semiconductor integrated circuit device characterized by being embedded in a groove. 4. The semiconductor integrated circuit device according to claim 2, wherein a conductive film made of a material different from that of the wiring film and the contact film is provided on sidewalls of the wiring film and the contact film. A semiconductor integrated circuit device. 5. A step of forming an insulating film on a substrate on which a plurality of semiconductor elements are formed, and then forming a groove in a selective region of the surface of the insulating film; and a step of forming an insulating film having the groove. A step of forming a wiring film thereon, a step of forming a photoresist film serving as an etching mask on a part of a surface of a region of the wiring film embedded in the groove, and a step of forming the photoresist film as an etching mask. As a region in which the surface of the wiring film is exposed, the pillar-shaped pillar is formed on the lower surface of the photoresist film by etching until the surface of the insulating film is exposed, and the wiring having a shape embedded in the groove is formed. A method of manufacturing a semiconductor integrated circuit device, comprising the step of forming a film. 6. A step of forming an insulating film on a substrate on which a plurality of semiconductor elements are formed, and then forming a groove in a selective region on the surface of the insulating film; and a step of forming an insulating film having the groove. A step of forming a wiring film thereon, a step of forming a photoresist film serving as an etching mask on a part of a surface of a region of the wiring film embedded in the groove, and a step of forming the photoresist film as an etching mask. As a region in which the surface of the wiring film is exposed, the pillar-shaped pillar is formed on the lower surface of the photoresist film by etching until the surface of the insulating film is exposed, and the wiring having a shape embedded in the groove is formed. A step of forming a film, a step of forming an insulating film on the base body with a film thickness equal to or greater than the height of the pillar, and a step of exposing the surface of the pillar from the surface of the insulating film. By removing the insulating film from the surface of the insulating film, a method of manufacturing a semiconductor integrated circuit device characterized by a step of providing an insulating film on a side surface of the pillar. 7. A step of forming an insulating film on a substrate on which a plurality of semiconductor elements are formed, and then forming a connection hole in a selective region of a surface of the insulating film, the connection in the insulating film. A step of forming a groove in a selective region of the surface of the insulating film including a hole; a step of forming a wiring film on the insulating film having the connection hole and the groove; A step of forming a photoresist film serving as an etching mask on a part of the surface of the region embedded in the groove; and a region where the surface of the wiring film is exposed by using the photoresist film as an etching mask. By etching until the surface of the insulating film is exposed, columnar pillars are formed on the lower surface of the photoresist film, and at the same time, the pillar-shaped pillars are buried in the wiring film and the connection hole. The method of manufacturing a semiconductor integrated circuit device characterized by a step of forming a filled-in shape of the contact membrane. 8. A step of forming an insulating film on a substrate on which a plurality of semiconductor elements are formed, and then forming a connection hole in a selective region of a surface of the insulating film, and the connection in the insulating film. A step of forming a groove in a selective region of the surface of the insulating film including a hole; a step of forming a wiring film on the insulating film having the connection hole and the groove; A step of forming a photoresist film serving as an etching mask on a part of the surface of the region embedded in the groove; and a region where the surface of the wiring film is exposed by using the photoresist film as an etching mask. By etching until the surface of the insulating film is exposed, columnar pillars are formed on the lower surface of the photoresist film, and at the same time, the pillar-shaped pillars are buried in the wiring film and the connection hole. Forming a contact film having an embedded shape; forming an insulating film on the base body with a film thickness equal to or greater than the height of the pillar; and exposing the surface of the pillar from the surface of the insulating film. A step of removing the insulating film from the surface of the insulating film to form an insulating film on the side surface of the pillar. 9. The method for manufacturing a semiconductor integrated circuit device according to claim 6, wherein the step of removing the insulating film from the surface of the insulating film is chemical until the surface of the pillar is exposed from the surface of the insulating film. A method of manufacturing a semiconductor integrated circuit device, which is performed using a mechanical polishing (CMP) method.