JPH08241253A - One-chip semiconductor device - Google Patents

Abstract

PURPOSE: To shorten the check time in the one-chip semiconductor device which is internally provided with a ROM and a function circuit controlled by the control program written in this ROM. CONSTITUTION: At the time of checking a function circuit 18, data in respective addresses of a ROM 20 are successively read out by an address control circuit 25 for ROM check, and the operation processing to obtain the sum total or these data is performed by operation circuits 26 to 28 for ROM check, and operation results of operation circuits 26 to 28 are held in registers 29 and 30. Then, held data in registers 29 and 30 are outputted.

Description

Detailed Description of the Invention

[0001]

This invention relates to a ROM (Read
The present invention relates to a one-chip semiconductor device such as a one-chip microcomputer with a built-in ROM, which has a functional circuit that operates according to a control program written in a ROM and is applicable to various semiconductor devices with a built-in ROM. A functional circuit is a ROM
The circuit which fetches, decodes and executes the data of (1) is shown, and in the case of a microcomputer, it is a circuit which operates according to ROM data (instruction).

[0002]

2. Description of the Related Art RO having a control program written therein
FIG. 2 shows a conventional example of a one-chip semiconductor device such as a one-chip microcomputer having a functional circuit that operates according to a control program written in M and ROM. In FIG. 2, 1 is an input terminal, 2 is an inspection mode setting circuit, 3 is a ROM inspection mode signal output from the inspection mode setting circuit 2, 4 is an address control circuit, and 5 is an address bus connected to the address control circuit 4. , 6 is a ROM in which a control program is written, 7 is a multiplexer,
8 is an output terminal, 9 is a clock input terminal, 10 is a clock, and 11 is R in a one-chip microcomputer.
Functional circuits other than OM6, 12 is a functional circuit inspection mode signal, 13 is a multiplexer, and 14 is an input terminal from the outside of a correct control program.

This one-chip semiconductor device has an input terminal 1
The normal operation mode or the inspection mode is set by the input signal from. Further, the inspection mode can be roughly classified into a ROM inspection mode for inspecting the ROM 6 and a functional circuit inspection mode for inspecting a functional circuit other than the ROM. First, ROM6
When inspecting, that is, inspecting whether the control program is correctly stored in the ROM 6, by inputting a signal (corresponding to specific serial data) that changes at a specific timing to the input terminal 1, The ROM inspection mode signal 3 is output from the inspection mode setting circuit 2. The ROM inspection mode signal 3 sets the one-chip semiconductor device to the ROM inspection mode.

The ROM address control circuit 4 is preset to the starting end address of the ROM 6 which starts the inspection by the addition of the ROM inspection mode signal 3, for example. It should be noted that the presetting can be performed not only in response to the ROM inspection mode signal 3 but also by another method. For example, the ROM address can be preset to "0" by an input terminal called reset, and this method can also be preset. Here, the preset address operates as a starting point.

The ROM address is RO from the ROM address control circuit 4 through the address bus 5.
Input to M6. As a result, ROM data corresponding to the input ROM address is output from the ROM 6. This ROM data is input to the multiplexer 7. The data read from the ROM 6 and the output signal from the functional circuit 11 are input to the multiplexer 7, and the multiplexer 7 selects one of the ROM inspection mode signals 3 as a selection signal. And output. When the ROM inspection mode signal 3 is output, the ROM data is output from the multiplexer 7 and R
When the OM inspection mode signal 3 is not output, that is, in the functional circuit inspection mode or the normal operation mode, the output signal of the functional circuit 11 is output from the multiplexer 7. The output signal of the multiplexer 7 is the output terminal 8
Output to the outside. Then, the ROM data output from the output terminal 8 is input to a tester (not shown) and compared with an expected value stored in the tester in advance (program data of a correct control program written in the ROM 6). Then, it is determined whether or not they match with each other.

Next, the clock 10 is input from the clock input terminal 9, and the ROM address of the ROM address control circuit 4 is incremented by one in synchronization with the clock 10. As a result, the ROM data corresponding to the incremented ROM address is sequentially output from the ROM 6, so that the same test is performed and the ROM data is stored in the ROM.
The inspection of the ROM 6 is completed by repeating the capacity of 6 times.

Next, add a correct control program,
When inspecting whether the functional circuit 11 operates normally, the inspection mode is set by inputting a signal (corresponding to specific serial data different from that in the ROM inspection mode) to the input terminal 1 at a specific timing. The functional circuit inspection mode signal 12 is output from the circuit 2, and the ROM inspection mode signal 3 is not output.

The multiplexer 13 selects whether the control program, which is the basis of the operation of the functional circuit 11, is input from the ROM 6 or externally via the input terminal 14, and when the functional circuit inspection mode signal 12 is output. Selects the correct control program from the input terminal 14 and inputs it to the functional circuit 11. The functional circuit 11 operates according to the input correct control program, and its output signal is input to the multiplexer 7. The multiplexer 7 outputs the output signal of the functional circuit 11 to the output terminal 8 in the functional circuit inspection mode.

At this time, since it is known in advance what signal the functional circuit 11 will output according to the data inputted from the input terminal 14, the judgment is made by comparing the expected value with the output data from the output terminal 8. To do. The judgment is
It is performed by a device called a tester. In the normal operation mode, neither the ROM inspection mode signal 3 nor the functional circuit inspection mode signal 12 is output from the inspection mode setting circuit 2. At this time, the program data of the ROM 6 is output from the multiplexer 13 that selects the control program of the functional circuit 11 and input to the functional circuit 11. The functional circuit 11 is R
The output signal is input to the multiplexer 7 by operating according to the control program from the OM 6. The multiplexer 7 outputs the operation signal to the output terminal 8. In the normal operation mode, the output terminal 8 is used as an output terminal from the functional circuit 11 (port terminal in the case of a microcomputer).

[0010]

In such a conventional technique, the ROM 6 and the functional circuit 11 are separately tested, and the R 6
The OM6 can inspect only one address data per clock. Therefore, the ROM is in proportion to the capacity of the ROM 6.
The inspection time of 6 increases, and the total inspection time of the one-chip semiconductor device increases accordingly. Therefore, there is a problem that it takes a huge amount of time to inspect a one-chip semiconductor device having a large-capacity ROM built therein.

An object of the present invention is to solve the above-mentioned conventional problems and to provide a one-chip semiconductor device capable of shortening the inspection time.

[0012]

SUMMARY OF THE INVENTION A one-chip semiconductor device of the present invention relates to a ROM in which a control program is written, a functional circuit which operates according to the control program written in the ROM, and a functional circuit which is tested when the functional circuit is inspected. R
First switching means for giving a control program from outside instead of the OM control program, and ROM at the time of inspecting the functional circuit
Of the ROM inspection address control circuit for sequentially reading the data of the respective addresses, and the ROM inspection arithmetic circuit for performing arithmetic processing for integrating the respective data read from the plurality of addresses of the ROM when the functional circuit is inspected. A register for holding a calculation result and a second switching means for outputting an output signal of the functional circuit when inspecting the functional circuit and outputting data held in the register when inspecting the ROM are provided.

[0013]

According to the structure of the present invention, when the functional circuit is inspected, the first switching means externally supplies a correct control program to the ROM to operate the functional circuit, and the second switching means outputs the functional circuit. Output the signal to the outside. Then, by comparing the output signal of this functional circuit with the expected value, it is determined whether or not the functional circuit is normal. At the same time, the ROM inspection address control circuit performs R
The data of each address of the OM is sequentially read, the arithmetic circuit performs an arithmetic process of integrating the data read from the plurality of addresses of the ROM, and the arithmetic result of the arithmetic circuit is held in the register. Then, when the ROM is inspected, the data held in the register is output to the outside by the second switching means. Then, by comparing the data held in this register with the expected value, it is determined whether or not the control program is correctly written in the ROM. At this time, the number of pieces of data held in the register is the calculation result obtained by integrating the data read from a plurality of addresses in the ROM, and R
Compared with the number of data of each address written in the OM, the time required for data comparison is remarkably short.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of a one-chip semiconductor device such as a one-chip microcomputer having a ROM having a control program written therein and a functional circuit operating according to the control program written in the ROM. In FIG. 1, reference numeral 15 is an inspection mode determination circuit, 16 is a ROM inspection mode signal, 17 is a functional circuit inspection mode signal, and 18 is an R in a one-chip microcomputer.
Functional circuits other than OM, 19 is a multiplexer that is the first switching means, and 20 is an RO in which a control program is written.
M and 21 are multiplexers, which are second switching means, and 22.
Is an output terminal, 23 is an input terminal, 24 is an input terminal from the outside of a correct control program, 25 is an address control circuit, 26 is an arithmetic circuit for performing an addition operation, 27 is an arithmetic circuit for performing an operation for obtaining a complement, and 28 is an addition An arithmetic circuit for performing an arithmetic operation, 29 a register for retaining the arithmetic operation result of the arithmetic circuit 26, 30 a register for retaining the arithmetic operation result of the arithmetic circuit 28, 31 a clock input terminal, 32 a clock, 33 a counter for counting the clock 32 , 34 is an overflow signal, 35 is a serial transfer register 35a to 35
e is a serial transfer register group composed of e, 36 is a serial transfer register group composed of serial transfer registers 36a to 36e, and 37 is an address bus connected to the address control circuit 25.

In the normal operation, neither the ROM inspection mode signal 16 nor the functional circuit inspection mode signal 17 is output from the inspection mode setting circuit 15. Therefore, the multiplexer 19 which selects the control program of the functional circuit 18 is read from the ROM.
20 program data are output and input to the functional circuit 18. The functional circuit 18 operates according to the control program from the ROM 20, and the output signal is the multiplexer 2
Input to 1. The multiplexer 21 outputs the operation signal to the output terminal 22.

At the time of inspection, first, a signal that changes at a specific timing to the input terminal 23 (serial signal similar to the conventional example).
Enter As a result, the inspection mode setting circuit 15
The functional circuit inspection mode signal 17 is output, and the functional circuit 18
Start the inspection. At this time, the control program necessary for the inspection is supplied from the input terminal 24 instead of the ROM 20 by the multiplexer 19. Then, the functional circuit 18 is
It operates according to the input correct control program, and its output signal is input to the multiplexer 21. In the functional circuit inspection mode, the multiplexer 21 operates in the functional circuit 18
The output signal of is output to the output terminal 22, and the comparison determination is performed in the same manner as in the conventional example.

At the same time, the one-chip semiconductor device is a ROM
Start calculation for inspection. The ROM address control circuit 25 is preset to the start address of the ROM 20 to be inspected in response to the functional circuit inspection mode signal 17, and this address is input to the ROM 20. And
ROM data corresponding to the input ROM address is R
It is output from the OM 20 and input to the arithmetic circuits 26 and 27. The arithmetic circuit 27 calculates the complement of the read ROM data and inputs it to the arithmetic circuit 28. At this time, the registers 29 and 30 are cleared.

Next, the ROM address control circuit 25 is incremented by one in synchronization with the clock 32 input from the input terminal 31. ROM data corresponding to the incremented ROM address is ROM
It is sequentially output from 20. The arithmetic circuit 26 calculates the sum of the ROM data and the value of the register 29, and again calculates the register 2
Hold at 9. Similarly, the arithmetic circuit 28 calculates the sum of the complement of the ROM data and the value of the register 30, and holds the arithmetic result again in the register 30. This operation is repeated for the preset inspection capacity of the ROM 20. The inspection capacity of the ROM 20 is preset in the counter 33. The counter 33 counts the clock 32 and outputs an overflow signal 34 when it reaches a set value. By the overflow signal 34, the value of the register 29 holding the calculation result is transferred to the serial transfer register 35a, and the register 29 is cleared. Similarly, register 3
The value of 0 is transferred to the serial transfer register 36a and the register 30 is cleared.

The arithmetic circuit 26 and the register 29 operate so as to accumulate and hold the ROM data for a fixed number of addresses, and the arithmetic circuit 28 and the register 30 form the complement of the ROM data for a fixed number of addresses. An operation of accumulating and holding is performed, and these operations correspond to an operation process of integrating each data read from a plurality of addresses of the ROM in the claims and an operation of holding the operation result.

In the same manner, the arithmetic processing is performed on the data at all addresses in the ROM 20. Each time the overflow signal 34 is output, the value of the register 29 is sent to the serial transfer register 35a, the data of the serial transfer register 35a is sent to the serial transfer register 35b, ...
・ Sequentially transferred. Similarly, the value of the register 30 is transferred to the serial transfer register 36a and the serial transfer register 3a.
The data of 6a is transferred to the serial transfer register 36b ...
And transferred in sequence.

In this way, the serial transfer register 3
5a, 35b, ..., The total sum of ROM data for a certain number of addresses in sequentially different address areas of the ROM 20 is stored in the serial transfer registers 36a, 36b.
.. hold the sum of the complements of the ROM data for a fixed number of addresses in sequentially different address areas of the ROM 20. This is executed in parallel during the inspection of the functional circuit 18.

Taking a microcomputer as an example, at present, the time required to inspect the functional circuit 18 is longer than the time required to inspect the ROM 20. However, the ROM capacity is also 1
6k, 32k, 48k, 64k, ...
M inspection time cannot be ignored. According to the present invention, this time is set to zero by performing the ROM inspection in parallel with the functional circuit inspection. The sum operation of the ROM data is zero because it is performed during the functional circuit inspection. Conventionally, ROM inspection and function inspection have been performed serially. The time required for ROM inspection is ROM capacity 128 kW, 1 instruction cycle 0.
In the case of 2 μs, one condition (generally 3 conditions) requires at least 25 ms. It becomes almost zero. If the ROM capacity increases, the reduction time will increase further.

When the ROM inspection is performed after the inspection of the functional circuit 18 is completed, a signal that changes at a specific timing (a serial signal similar to the conventional example) is input to the input terminal 23. As a result, the inspection mode setting circuit 15 outputs the ROM inspection mode signal 16 to set the ROM inspection mode. At this time, the value of the serial transfer register 35e at the final stage is input to the multiplexer 21. The multiplexer 21 outputs the data held in the serial transfer register 35e to the output terminal 22 because the ROM inspection mode signal 16 is input. The data of the serial transfer registers 35a, 35b, ... Are sequentially transferred in synchronization with the clock 32 and output from the output terminal 22. The data of the operation result output from the output terminal 22 is compared with data expected by using a tester (data corresponding to the sum of ROM data for a certain number of addresses previously obtained according to the program data of the correct control program). Then, the quality is judged. The expected data is calculated in advance from the program data of the correct control program written in the ROM.

Serial transfer registers 35a, 35b ...
.. After all the data in 35e have been compared, the multiplexer 21 is switched, and the data in the serial transfer registers 36a, 36b ...
And compare it with the expected data using a tester,
Pass / fail judgment is performed. If the counter 33 is set to a fractional capacity instead of the total capacity of the ROM, RO
It is also possible to divide M for inspection. The counter 33
Since the ROM capacity is counted, the counter 33 may be initially set to 0 or may be preset to a specific value for use. In that sense, the ROM is divided and inspected.

Further, in this embodiment, the total sum of ROM data and the total sum of complements of ROM data are output as the calculation result and compared with the expected value to make a decision. However, in order to improve the reliability of the inspection, the ROM of a specific address is used. An arithmetic circuit that takes the sum of data multiplied by a constant can also be used.
As an example, for example, in the Japanese barcode, the 10's complement of (odd digit × 3 + even digit) is the final digit data. The ROM capacity is divided into A, B, C, ...
As a group, 1 for A group, 10 for B group, 100 for C group, and so on.
It is conceivable that a coefficient different for each group is multiplied for the calculation.

[0026]

According to the one-chip semiconductor device of the present invention, the data of each address of the ROM is sequentially read by the ROM inspection address control circuit in parallel with the inspection of the functional circuit, and the arithmetic circuit extracts the data from the plurality of addresses of the ROM. When the ROM is inspected, the arithmetic processing for integrating the read data is performed, the arithmetic result of the arithmetic circuit is held in the register, and the data held in the register is output to the outside by the second switching unit when the ROM is inspected. The number of calculation results to be compared with the expected value can be significantly reduced compared to the number of addresses in the ROM, and even if the capacity of the ROM is large, the ROM can be inspected in a short time. In addition, if the data of one address is abnormal, the result of the integrated operation will also be abnormal. Therefore, the inspection accuracy is equivalent to comparing the data of each address of the ROM one by one.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a one-chip semiconductor device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional one-chip semiconductor device.

[Explanation of symbols]

1, 23 Inspection mode setting terminal 2, 15 Inspection mode setting circuit 3, 16 ROM inspection mode signal 4, 25 ROM address control circuit 5 Address bus 6, 20 ROM 7, 13, 19, 21 Multiplexer 8, 22 Output terminal 9, 31 input terminal 10,32 clock 11,18 functional circuit 12,17 functional circuit inspection mode signal 14,24 input terminal 26,27,28 arithmetic circuit 29,30 register 33 counter 34 overflow signal 35,36 serial transfer register group 35a- 35e Serial transfer register 36a to 36e Serial transfer register

Claims (1)

[Claims] 1. A ROM in which a control program is written,
A functional circuit that operates according to the control program written in the ROM; a first switching unit that externally supplies a control program to the functional circuit in place of the control program of the ROM when the functional circuit is inspected; A ROM inspection address control circuit for sequentially reading data of each address of the ROM when inspecting the functional circuit;
RO for performing arithmetic processing for integrating respective data read from a plurality of addresses of the ROM when the functional circuit is inspected
A second operation circuit for M inspection, a register for holding an operation result of the operation circuit, an output signal of the function circuit when the function circuit is inspected, and a data held in the register when the ROM is inspected. And a one-chip semiconductor device having a switching means.