JPS6167168A - Microcomputer - Google Patents

Abstract

PURPOSE:To check data from ROM by a simple mechanism to provide checking function to a computer by selecting the data from internal data bus or the output from a comparator in accordance with the command to send the selected data to the output terminal. CONSTITUTION:A controlling terminal 2 of a microcomputer is applied with an input of L-level during the normal operation and an input of H-level when an internal ROM13 is checked to control multiplexers 9, 10. The multiplexer 10 is connected with an internal data bus 6 through an instruction decoder 14 and connected further with an internal ROM13 and a comparator 7. The multiplexer 9 is connected with multiplexers 11, 9 in series and the multiplexer 9, 11, 8 are connected respectively to the bus 6. The input signal from an input terminal 3 is sent through the multiplexer 8 into a comparator 7. The multiplexer 9 selects the outputs from the bus 6 and from a program counter 12 and sends the selected output to an output terminal 4. The multiplexer 11 selects the output from the bus and from the comparator 7 and sends the selected output to an output terminal 5 for checking the data from the ROM13.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a micro combiator, and more particularly to a microphone combiator composed of one chip.

(Prior art) Conventionally, internal read-only memory (hereinafter referred to as internal ROM)
In a one-chip microcombiner with t-chip, the program counter is incremented by inputting a clock signal, the value of this program counter is sent as an address signal to the internal ROM, and the addressed data is decoded by an instruction decoder. The device has a normal operation mode (hereinafter referred to as the 10th operation mode) in which the command is executed by controlling the command according to the command.

(Problems to be solved by the invention) In such a one-chip microcomputer,
Inspection of its internal ROM (hereinafter referred to as rate 2 operation mode)
To do this, by operating a specific terminal, the data in the internal ROM addressed by the program counter is output to multiple terminals, and the microcombiner checks whether the successive output data is correct or not. Inspections were conducted using an LSI tester synchronized with Eta.

However, this method requires a large amount of equipment such as an LSI tester, and has the disadvantage that it is not possible to easily test the data in the internal ROM.

The object of the present invention is to eliminate the above-mentioned drawbacks and to facilitate internal ELO
The purpose of this invention is to provide a one-chip micro combiator with functions that allow data testing.

(Rounding Means to Solve Interpoint Points) The microcombination unit of the present invention has a control terminal capable of switching between a first operation mode and a second operation mode according to an input command; an input control means for selectively transmitting an input signal applied from the outside via a plurality of input terminals to either an internal data bus or an input of a comparator according to the instructions; a first output control means that selects one of the values of the counter and sends it to a plurality of output terminals; and a read-only memory that selects the input of either the instruction decoder Ruru or the comparator according to the instruction; a second output control means for transmitting the output of the four comparators; and a third control means for selecting either the data on the internal data bus or the output value of the four comparators according to the command and sending it to the output terminal. It consists of:

(Example) Next, embodiments of the present invention will be described using the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

This embodiment has a control terminal 2 that can switch between a tenth operation mode and a second operation mode according to an input command, and an input signal that is applied from the outside via a plurality of input terminals 3 according to the command. A multipreference controller 8 serves as an input control means that selects and transmits either the input of the internal data bus 6 or the comparator 8, and the data of the internal data bus 6 or the value of the program counter 12 according to the command. Select one of multiple output terminals 4
Multiplexer as the first output control means to send to?
9; and a multiprefner 10 as a second output control means that selects the input of either the instruction decoder 14 or the comparator 7 according to the instruction and transmits the output of the internal ROM (read-only memory) 13; A multiplexer is used as a third control means that selects either the data on the internal data bus 6 or the output value of the comparator 7 and sends it to the output terminal 5 according to a command. 11.

Next, the operation of this embodiment will be explained.

As before, the first operating mode is the normal input/output mode and the second operating mode is the internal FLOM test mode. The control terminal 2 is fully switched between the first operation mode and the second operation mode in response to an input command signal.

Now, when 1L' (low level signal) is applied to the control terminal, the 0 first operation mode is set, and when 1%H' (high level signal) is applied, the 0 second operation mode is set. shall be taken as a thing.

By applying 1L# to control terminal 2, input terminal 3
The output terminals 4.5 and 4.5 take the first operation mode and perform normal input/output. Also, the internal R,0M13 takes the first operation mode and outputs its own data to the instruction decoder 14, but not to the comparator 7.

This is a function of the normal operation mode in a conventional one-chip microcombiner.

Next, when selecting the second operation mode and inspecting the data in the internal ROM, it is sufficient to apply 'H' to the control terminal 2. As a result, 1H# is applied to the multiplex 8°9.10.11 is input, and input/output control is performed to set the second operation mode.
outputs the value of the program counter 12. The internal R,0M 13 also applies its own data addressed by the program counter 12 to the comparator 7. The plurality of input terminals 3 output external input signals to the comparator 7.

The data in the internal ROM 13 and the multiplexer 8 are connected to the comparator 7.
A matching signal compared with the input signal inputted via the input signal is outputted to the output terminal 5.

FIG. 2 is a block diagram illustrating an example of connection with the pond device when testing the embodiment shown in FIG. 1.

PR to Micro Combi Goto 1 shown in Figure 1.

OM (Programmable had 0nly
Metnory) 15 to the address line 16. data line 1
Connect with 7. The address line 16 is connected to the output terminal 4, and the data line 17 is connected to the input terminal 3.

In this way, when operating in the above-mentioned operation mode 's2 (inspection mode), the value of the program cuff/12 outputted from the plurality of output terminals 4 is inputted to paohils as an address signal via the address line 16fr-. Ru. The data of Pa0M15 addressed by this address signal is inputted to the plurality of input terminals 3 through the data line 17.

Multigrek? 8 sends this data to comparator 7.

The comparator 7 compares the data sent from the outside with the data sent from the internal ROM 13 described above, and if they match, outputs a match signal to the output terminal 5 via the multiplier 11f. Therefore, the data in the internal ROM 13 can be easily inspected by observing the coincidence signal at the output terminal 5. For example, if output terminal 5 is %H〃, then within laUFLOM13C) Chi/,! :PROM
I517) It can be seen that the data in the internal ROM 13 and the data in the Pa0M15 do not match if the f-data matches and %Lll. At this time, by simultaneously observing multiple output terminals 4, the internal ['(,0M13
It is possible to know which addresses in the list do not match.

In the above embodiment, the control terminal 2 is used as a test terminal, and the state of the control terminal 2 is used to switch between the first operation mode and the $2 operation mode. Alternatively, it can be realized using a register that is reset. Further, although an example has been described in which PR and OM are used as external read-only memories, it is also possible to use external data memories.

(Effects of the Invention) As explained in detail above, according to the present invention, the internal RO
This provides a microphone combination with the ability to easily check whether the data in M matches the data in the external read-only memory.

Effects such as eliminating the need for an expensive and large LSI tester to test the internal ROM can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
FIG. 2 is a block diagram illustrating an example of the connection with the pond device when testing the embodiment shown in the figure. 1...←Valve φ micro combinator, 2...
...Control terminal, 3...Input terminal, 4.5.
...Output terminal, 6...Internal data bus,
7...Comparator, 8.9.10゜11...
・Multiplexer, 12...Program counter, 13...Internal ROM, 14...Instruction decoder, 15...PROM, 16...
...address line, 17...data line.

Claims (1)

[Claims] A control terminal that can switch between a first operation mode and a second operation mode according to an input command, and an internal data bus or a comparator that input signals applied from the outside via a plurality of input terminals according to the command. an input control means for selecting and transmitting either one of the inputs of the input, and a first output for selecting either the data of the internal data bus or the value of the program counter according to the command and transmitting the selected one to the plurality of output terminals. a second output control means for selecting the input of either the instruction decoder or the comparator in accordance with the instruction and transmitting the output of the read-only memory; A microcomputer comprising: third control means for selecting one of the output values of the comparator and sending it to an output terminal.