JPH08236480A - Smiconductor device and its manufacture - Google Patents

Abstract

PURPOSE: To reduce the manufacturing cost of a semiconductor device by utilizing a silicon nitride film which is used as a protective film of implanting ions for preventing the silicification performed for reducing the resistance of a diffusion layer having a shallow junction from being obstructed by the knock-on phenomenon of oxygen for an element structure also. CONSTITUTION: A process for forming side walls from a silicon oxide film is omitted from a semiconductor manufacturing process by working a silicon nitride film 111 used as a protective film of implanting ions into substrate sections 102 and 103 and gate polysilicon 106 to the side walls 111. When baron is diffused in the polysiilicon 106, therefore, the boron can be prevented from punching through a gate oxide film 105, because the diffusion of the boron is suppressed by the knock-on of nitrogen.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a method for manufacturing a semiconductor device having a metal silicide film on a conductor or a diffusion layer.

[0002]

2. Description of the Related Art In order to increase the integration degree of SLI, it is necessary to reduce the junction depth of the impurity diffusion layers in the source / drain regions. However, when the thickness of the diffusion layer is reduced, the resistance value of the diffusion layer increases and the operation speed of the semiconductor decreases. Therefore, a semiconductor device has been manufactured by the method described below.

First, an element isolation region is formed on a P-type silicon substrate, and a gate oxide film and a gate electrode made of polycrystalline silicon are sequentially formed on the substrate surrounded by the element isolation region. Next, after lightly injecting N-type impurities into the substrate, a silicon oxide film is formed on the entire surface of the substrate, and the silicon oxide film is anisotropically etched to form a sidewall oxide film on the sidewall of the gate electrode. To form. Further, an N-type impurity is ion-implanted into the substrate at high energy to form a MOSFET having an LDD (lightly doped drain) structure. Then, a metal film is formed on the entire surface of the substrate, and a metal silicide film is formed on the impurity diffusion layer and the gate electrode by heat treatment. After that, the metal film in the portion which is not silicided is removed. Through the above steps, the MOSFET in which the source / drain resistance is reduced by the metal silicide film is manufactured.

On the other hand, when ion implantation is performed on a silicon substrate, a silicon oxide film is formed as a protective film on the substrate surface to prevent surface roughness of the substrate surface and abnormal implantation profile due to channeling, and impurities are introduced through this silicon oxide film. I was performing ion implantation. However, when the ion implantation is performed through the oxide film, oxygen is introduced into the silicon substrate by collision with the implanted ions, so that a phenomenon called knock-on occurs. The proportion of oxygen that is knocked on becomes large when ions of a large mass of impurities such as arsenic are implanted. Due to this knock-on phenomenon, when a metal silicide layer is formed on the impurity diffusion layer formed by ion implantation, silicidation is suppressed by oxygen introduced into the silicon substrate, and as a result, the formed metal is formed. The thickness of the silicide layer becomes thin,
There is a problem that it is difficult to reduce the resistance of the source / drain regions. This problem was particularly remarkable in the N-type impurity diffusion layer in which arsenic was ion-implanted.

Further, according to the above manufacturing method, P-type MOSFE
When manufacturing T, boron is sometimes injected as an impurity into the polysilicon film that becomes the gate electrode. However, since boron has a large diffusion coefficient, boron in the gate electrode penetrates through the gate oxide film and becomes a channel of the substrate. There is a known problem that the threshold voltage of the MOSFET is diffused by diffusing into the region.

In view of this, Japanese Patent Application Laid-Open No. 64-760 discloses a manufacturing method for preventing surface roughness of a substrate surface due to ion implantation without introducing oxygen ions into the silicon substrate. That is, after forming the sidewall oxide film, a silicon nitride film is formed on the entire surface of the substrate, and impurities are injected into the substrate through the silicon nitride film with high energy to form an impurity diffusion layer. According to this method, since not nitrogen but nitrogen is introduced into the silicon substrate and the gate electrode by knock-on, silicidation is not suppressed.

[0007]

However, according to the above manufacturing method, the silicon nitride film is formed on the entire surface of the silicon substrate after the step of anisotropically etching the silicon oxide film to form the sidewall oxide film on the side wall of the gate electrode. And a step of removing the silicon nitride film used as the protective film with hot phosphoric acid after the step of implanting impurities with high energy, which complicates the manufacturing method of the semiconductor device. was there. In the manufacture of semiconductor devices, since the same product is manufactured in a large amount, even if one manufacturing process is increased or decreased, the manufacturing cost is greatly affected, which is a very serious problem.

Therefore, an object of the present invention is to provide a semiconductor device in which a metal silicide layer having a low resistance value and having a sufficient thickness is provided on an impurity diffusion layer or an electrode without complicating the manufacturing process of the semiconductor device and the semiconductor device. It is to provide a manufacturing method.

Further, another object of the present invention is to provide a semiconductor device in which the difference in boron in the electrodes is reduced and a method for manufacturing the same.

[0010]

A semiconductor device according to a first aspect of the present invention is a semiconductor substrate, a gate insulating film patterned on the semiconductor substrate, and a pattern formed on the gate insulating film. A gate electrode, an impurity diffusion layer containing impurities and nitrogen formed in the semiconductor substrate at least on both sides of the gate electrode, and a sidewall insulating film containing a nitride film formed on the sidewall of the gate electrode, At least a metal silicide film formed on the impurity diffusion layer is included.

A semiconductor device according to a second aspect of the present invention is
A semiconductor substrate, a first well region containing an impurity of a first conductivity type and a second well region containing an impurity of a second conductivity type formed in the semiconductor substrate, and the first well region. A first gate insulating film formed on the first gate insulating film, a second gate insulating film formed on the second well region, and a first gate insulating film formed on the first and second gate insulating films, A second gate electrode, a first impurity diffusion layer formed in the first well region on both sides of the first gate electrode, and containing a first conductivity type impurity and nitrogen,
A second impurity diffusion layer containing a second conductivity type impurity and nitrogen formed in the second well region on both sides of the second gate electrode; and the first and second gate electrodes. It includes a sidewall insulating film including a nitride film formed on each sidewall, and a metal silicide film formed on at least the first and second impurity diffusion layers.

A semiconductor device according to a third aspect of the present invention is
A semiconductor substrate, an insulating film patterned on the semiconductor substrate, a conductor containing nitrogen patterned on the insulating film, and a sidewall containing a nitride film formed on a sidewall of the conductor. It includes an insulating film and at least a metal silicide film formed on the conductor.

A semiconductor device according to a fourth aspect of the present invention is
A semiconductor substrate; an insulating film patterned on the semiconductor substrate; a conductor patterned on the insulating film; and impurities and nitrogen formed in at least the semiconductor substrate on both sides of the conductor. The semiconductor device includes an impurity diffusion layer including a sidewall insulating film including a nitride film, which is formed on a sidewall of the conductor, and a metal silicide film formed at least on the impurity diffusion layer.

A method of manufacturing a semiconductor device according to a first aspect of the present invention includes a first step of sequentially forming a gate insulating film on a semiconductor substrate and a gate electrode on the gate insulating film, and After forming an insulating film including a nitride film on the entire surface of the semiconductor substrate on which the gate insulating film and the gate electrode are formed, impurities are ion-implanted into the semiconductor substrate at least on both sides of the gate electrode through the insulating film. A second step of introducing nitrogen of the nitride film into the semiconductor substrate at least on both sides of the gate electrode,
A third step of etching the insulating film to form a sidewall insulating film including the nitride film on a sidewall of the gate electrode and exposing the semiconductor substrate outside the sidewall insulating film; After forming a metal film on the entire surface of the semiconductor substrate on which the film, the gate electrode, and the sidewall insulating film are formed, heat treatment is performed on the semiconductor substrate, and at least the metal on the semiconductor substrate outside the sidewall insulating film is formed. It includes a fourth step of forming a silicide film and a fifth step of removing a portion of the metal film that has not been silicidized.

In a method of manufacturing a semiconductor device according to a second aspect of the present invention, a first well containing an impurity of a first conductivity type is formed in a first region of a semiconductor substrate, and the first region is formed. A first step of forming a second well containing an impurity of a second conductivity type in a second region of the semiconductor substrate different from the above, and forming a first gate insulating film on the first well. A second gate insulating film is formed on the second well, and first and second gate electrodes are sequentially formed on the first and second gate insulating films by patterning.
Step, and the first and second gate insulating films and the first,
A third step of forming an insulating film including a nitride film on the entire surfaces of the first and second wells in which a second gate electrode is formed, and the first gate in the first region through the insulating film. The first impurity is ion-implanted into the first wells on both sides of the electrode, and at least the nitrogen of the nitride film is at least the first impurity
A fourth step of introducing into the first well on both sides of the gate electrode, and a second step in the second well on both sides of the second gate electrode in the second region through the insulating film. A fifth step of ion-implanting impurities and introducing nitrogen of the nitride film into at least the second wells on both sides of the second gate electrode; and etching the insulating film to form the first, A sixth step of forming a sidewall insulating film made of the insulating film on a sidewall of the second gate electrode and exposing the first and second wells outside the sidewall insulating film; Forming a metal film on the entire surface of the first and second wells on which the second gate insulating film and the first and second gate electrodes and the sidewall insulating film are formed, and then heat treating the semiconductor substrate. By giving at least The method further includes a seventh step of forming metal silicide films on the first and second wells outside the sidewall insulating film, and an eighth step of removing the metal film in the non-silicided portions. .

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device in which a first insulating film is formed on a semiconductor substrate, and a conductor is patterned on the first insulating film.
And forming a second insulating film including a nitride film on the entire surface of the semiconductor substrate on which the first insulating film and the conductor have been formed, and then introducing impurities into the conductor through the second insulating film. A second step of implanting nitrogen of the nitride film into the conductor while ion-implanting, and etching the second insulating film to form a sidewall of the conductor on the side wall of the second insulating film. A third step of forming an insulating film,
And a fourth step of forming a metal silicide film on at least the conductor.

In a method of manufacturing a semiconductor device according to a fourth aspect of the present invention, a first step of forming a first insulating film on a semiconductor substrate and patterning a conductor on the first insulating film. A second insulating film including a nitride film is formed on the entire surface of the semiconductor substrate on which the first insulating film and the conductor are formed, and then, at least on both sides of the conductor through the second insulating film. A second step of implanting impurities into the semiconductor substrate and introducing nitrogen of the nitride film into the semiconductor substrate on both sides of the conductor, and etching the second insulating film A sidewall insulating film made of the second insulating film is formed on a sidewall of the body, and the semiconductor substrate outside the sidewall insulating film is exposed.
And the step of forming a metal silicide film on the semiconductor substrate at least outside the sidewall insulating film.
And the process of.

A method of manufacturing a semiconductor device according to a fifth aspect of the present invention comprises the steps of forming an insulating film on a semiconductor substrate, forming a conductor on the insulating film, and then patterning the conductor. , Implanting at least boron and nitrogen into the conductor, and forming at least a metal silicide film on the conductor.

According to the present invention, a nitride film is used as a protective film for ion implantation, and a part of the nitride film is also used as a sidewall of a conductor, so that silicidation of the impurity diffusion layer or the conductor is suppressed. It is possible to manufacture a semiconductor device that is not subject to a relatively simple manufacturing method. Also, when boron is implanted as an impurity to reduce the resistance of polysilicon or the like used as a conductor,
It is possible to manufacture a semiconductor device in which suppression of silicidation of a conductor is suppressed and diffusion of boron in the conductor is reduced by a relatively simple manufacturing method.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

First, a first embodiment in which the present invention is applied to a CMOS device will be described with reference to FIGS.

First, as shown in FIG. 1A, an N well 102 and a P well 108 are formed in a P type silicon substrate 101, and a field oxide film 104 is formed by, for example, a selective oxidation (LOCOS) method.

Next, as shown in FIG. 1B, a silicon oxide film 105 having a thickness of about 5 to 20 nm is formed on the N well 102 and the P well 103, respectively, by a thermal oxidation method, and then formed thereon. Thickness 1 by chemical vapor deposition (CVD) method
Non-doped polycrystalline silicon film 10 having a thickness of 0 to 300 nm
6 is deposited. Then, N type impurities are ion-implanted into the polycrystalline silicon film 106, heat treatment is performed to reduce the resistance of the polycrystalline silicon film 106, and then patterning is performed by a photolithography technique to form the N well 102 and the P well.
A gate polysilicon film 106 made of a polycrystalline silicon film 106 is formed on each well 103. In addition, the silicon oxide film 105 other than directly under the gate polysilicon film 106
Is removed.

Next, as shown in FIG. 1C, with the N well 102 side being masked with a photoresist 107,
Energy of 40 keV on the P-well 103 side, 2 × 1
Phosphorus is ion-implanted at a dose of 0 ¹³ / cm ² and heat treatment is performed to form N ⁻ regions 108 of the source / drain of the NMOSFET.

Next, as shown in FIG. 1D, after removing the photoresist 017, the P well 103 side is masked with the photoresist 110 this time. Then, in this state, the energy of 15 keV, 2
Boron is ion-implanted at a dose of × 10 ¹³ / cm ² ,
A heat treatment is performed to form source / drain P ⁻ regions 109 of the PMOSFET.

Next, as shown in FIG. 2A, after removing the photoresist 110, a silicon nitride film 11 having a thickness of about 100 to 300 nm is formed on the entire surface of the substrate by the CVD method.
1 is formed. When the surface of the substrate is already oxidized by natural oxidation or the like, the silicon nitride film 111 is formed on this oxide film, but the thickness of this oxide film is smaller than that of the silicon nitride film 111. If it is relatively thin,
It does not significantly affect the silicidation of titanium described later.

Thereafter, the N well 102 side is masked with a photoresist 112, and in this state, the P well 103 side is subjected to an energy of 30 to 100 keV, 5 × 10 ¹⁴ to 1
Arsenic is ion-implanted at a dose of about 10 ¹⁶ / cm ² . At this time, arsenic is transferred to the P through the silicon oxide film 111.
Ions are implanted into the well 103. Then, heat treatment is applied to the N ⁺ region 1 of the source / drain of NMOSFET.
13 is formed.

Next, as shown in FIG. 2B, after removing the photoresist 112, the P well 103 side is masked with the photoresist 114 this time. Then, in this state, B on the N well 102 side at an energy of 20 to 90 keV and a dose amount of 1 × 10 ^{14 to} 5 × 10 ¹⁶ / cm ^2.
F ₂ is ion-implanted, heat-treated, PMOSFET
Source / drain P ⁺ regions 115 are formed. Also at this time, BF ₂ is ion-implanted into the N well 102 through the silicon nitride film 111.

Next, as shown in FIG. 2C, after removing the photoresist 114, the silicon nitride film 111 is removed.
Etching is performed by an anisotropic etching technique so that only the side wall of each gate polysilicon film 103 remains, and the silicon nitride film 111 in other portions is removed. As a result, the sidewall insulating film 111 made of the silicon nitride film 111 is formed on the sidewall of each gate polysilicon film 106. After that, a titanium film 116 is deposited on the entire surface by sputtering to have a film thickness of about 40 nm.

Next, as shown in FIG. 2D, the substrate 10
1 is heat-treated at a temperature of 400 to 900 ° C. for 5 to 60 seconds, so that the gate polysilicon film 106 and the diffusion layer 1 are formed.
The titanium silicide film 117 is formed in self-alignment only on the layers 13 and 115. Then, the titanium film 116 remaining without silicidation and the reaction products other than the silicide are removed by a mixed liquid of ammonia / hydrogen peroxide / water or a liquid containing hydrofluoric acid. As a result, the titanium film 116 on the sidewall insulating film 111 is removed, and the gate polysilicon film 106 and the titanium silicide films 117 on both sides thereof are removed.
And are isolated from each other.

Thereafter, as shown in the figure, the interlayer insulating film 1 is formed on the entire surface.
18 is formed, a contact hole 119 is formed in the interlayer insulating film 118, and an aluminum (Al) recording layer 120 is formed.
To form.

According to the manufacturing method described above, when the impurity diffusion layer 113 of the N well 102 and the impurity diffusion layer 115 of the P well 103 are respectively formed, the silicon nitride film 1 is formed.
Since 11 is used as a protective film for ion implantation, surface roughness of the substrate surface due to ion implantation and abnormal implantation profile due to channeling can be prevented, and not only oxygen but also nitrogen is introduced into the substrate by knock-on. The silicidation of titanium is not suppressed. Therefore, a titanium silicide film 117 having a sufficient thickness can be obtained on each of the diffusion layers 113 and 115. As a result, each M
Even when the source / drain junction depth of the OSFET is reduced, its resistance can be reduced, and a reduction in the operating speed of each element can be prevented.

Moreover, since the silicon nitride film 111 used as the protective film for the ion implantation is anisotropically etched to form the sidewall insulating film of the gate polysilicon film 106, the sidewall of the silicon oxide film is formed as in the conventional case. It is not necessary to separately form an insulating film, and the number of manufacturing steps does not need to be increased.

In the first embodiment, the CMOS
A P-type well and an N-type well are formed on a silicon substrate for application to a device, but when applied to a normal MOS device, they are a field oxide film and a gate oxide film directly on the silicon substrate. A silicon oxide film is formed.

Further, in the above embodiment, the NMOSFE
The source / drain of the T and PMOSFETs are provided with N ⁻ regions 108 and P ⁻ regions 109, respectively, to form an LDD structure. However, if lateral diffusion of impurities due to heat treatment after ion implantation poses a problem, they are not provided. May be.

Further, in the above-described embodiment, the heat treatment is performed after the ion implantation for forming the impurity diffusion layer 113 and after the ion implantation for forming the impurity diffusion layer 115 to activate the impurities. Immediately after the ion implantation for forming the impurity diffusion layer 113, the heat treatment for activation is not performed, and after the ion implantation for forming the impurity diffusion layer 115 is performed, for example, at a temperature of 850 ° C., 30
It is also possible to perform N ₂ annealing for a minute to activate the impurities in both impurity diffusion layers 113 and 115 at the same time.

Further, in the above-described embodiment, when the gate polysilicon film 106 is formed, the non-doped polycrystalline silicon film 106 is formed on the entire surface, and the polycrystalline silicon film 1 is formed.
After ion-implanting N-type impurities into 08 to reduce the resistance,
Although it was processed into a pattern of a gate electrode, phosphorus diffusion may be used for ion implantation of N-type impurities. Further, the polycrystalline silicon film 106 is processed into a pattern of a gate electrode, and the impurity diffusion layer 11 of each well 102, 103 is processed.
Simultaneously with the formation of 3, 115, the silicon nitride film 1
It is also possible to ion-implant each conductivity type impurity into each gate polysilicon film 106 through 11 and thereby reduce the resistance of each gate polysilicon film 106. In that case, the silicon nitride film 111 acts as a protective film at the time of ion implantation into each gate polysilicon film 106, and nitrogen is introduced into each gate polysilicon film 106 by knock-on. The silicidation at the time of forming the titanium silicide film 117 on the silicon film 106 is not suppressed, the titanium silicide film 117 having a sufficient thickness is formed on the gate polysilicon film 106, and the gate electrode is low. Be made resistant. In any case, the nitrogen concentration in the impurity diffusion layer or the gate electrode is preferably 10 ¹⁸ to 10 ²¹ / cm ³ .

In the formation of the titanium silicide film 117, 600-110 after removing the remaining titanium film
The titanium silicide film 117 may be further reduced in resistance by performing heat treatment again at a temperature of 0 ° C. for 5 to 60 seconds. Further, as the metal forming the silicide, a refractory metal such as molybdenum (Mo), tungsten (W), tankle (Ta), or cobalt (Co) may be used instead of titanium (Ti).

In general, when boron is used to form a P-type impurity diffusion layer in a substrate, since the diffusion coefficient of boron is large, it is deeply diffused in a silicon substrate by a heat treatment performed after ion implantation, and as a result, it is shallow. Although it was difficult to obtain a junction, when the silicon nitride film 111 is used as a protective film for ion implantation as in the above-described embodiment, nitrogen introduced into the substrate by knock-on suppresses diffusion of boron. Even if boron is used as an impurity, it is easy to form a shallow junction.

The second embodiment of the present invention is an application of the present invention to a device having a field shield electrode. With the recent increase in integration of semiconductor devices, LOCOS
The field shield separation method is attracting attention instead of the law. In this field shield isolation method, element isolation is performed by setting the potential of the field shield electrode formed in the element isolation region via the field shield insulating film to a fixed potential. For this second embodiment,
This will be described with reference to FIGS.

First, as shown in FIG. 3A, a silicon oxide film 202 is formed on a silicon substrate 201 by a thermal oxidation method.
Is formed and a non-doped polycrystalline silicon film is formed thereon by the CVD method, and then this polycrystalline silicon film is selectively etched to be processed into the shape of the field shield electrode 203.

Next, as shown in FIG. 3B, a silicon oxide film 204 is formed on the entire surface of the substrate by the CDV method.

Next, as shown in FIG. 3C, anisotropic etching is performed by the RIE method or the like so that the silicon oxide film 204 is left only on the side wall of the field shield electrode 203. And 204 are selectively removed to form a sidewall oxide film 204 on the side surface of the field shield electrode 203.

Next, as shown in FIG. 3D, a silicon oxide film 205 is formed on the silicon substrate 201 by a thermal oxidation method.
To form. At this time, the thermal oxide film 220 is also formed on the upper surface of the shield electrode 203. After that, C on the entire surface of the substrate
A non-doped polycrystalline silicon film 206 is formed by the VD method.

Next, as shown in FIG. 4A, the silicon oxide film 205 and the polycrystalline silicon film 20 are formed by a method such as RIE.
6 is selectively etched to form a gate oxide film 205 and a gate electrode 206. At this time, the shield electrode 20
The thermal oxide film 220 on the upper surface of 3 is also removed by etching.

Next, as shown in FIG. 4B, a silicon nitride film 207 having a thickness of about 100 to 300 nm is formed on the entire surface of the substrate by the CVD method, and this silicon nitride film 207 is formed.
Impurity ions are implanted into the silicon substrate 201, the field shield electrode 203, and the gate electrode 206 through the via to form an impurity diffusion layer 208 in the substrate and reduce the resistance of the field shield electrode 203 and the gate electrode 206.

Next, as shown in FIG. 4C, the silicon nitride film 207 is anisotropically etched by the RIE method or the like, so that only the sidewall portions of the field shield electrode 203 and the gate electrode 206 are sidewall nitrided. Membrane 20
Form 7.

Next, as shown in FIG. 4D, after depositing a titanium film to a thickness of about 40 nm on the entire surface of the substrate by a sputtering method, the substrate is heat-treated at a temperature of 400 to 900 ° C. for 5 to 60 seconds. Thus, the titanium silicide film 209 is formed in a self-aligned manner only on the impurity diffusion layer 208, the field shield electrode 203, and the gate electrode 206. Then, the titanium film remaining without silicidation and reaction products other than silicide are removed by cleaning.

Further, an interlayer insulating film 210 is formed on the entire surface of the substrate, and a contact hole 211 is formed in the interlayer insulating film 210.
Then, an aluminum wiring layer 212 that contacts the titanium silicide film 209 is formed on the bottom surface of the contact hole 211.

According to the manufacturing method described above, the silicon nitride film 207 acts as a protective film when impurity ions are implanted into the field shield electrode 203, and nitrogen is introduced into the field shield electrode 203 by knock-on. The silicidation when the titanium silicide film 209 is later formed on the field shield electrode 203 is not suppressed, and the titanium silicide film 209 having a sufficient thickness is used as the field shield electrode 203, the gate electrode 206, and the impurity diffusion layer 208. Are formed on top of them to reduce their resistance.

Also in this embodiment, the impurity diffusion layer 20 is used.
Boron is sometimes used to form No. 8, but in that case, the nitrogen introduced into the substrate by knock-on suppresses the diffusion of boron, so that the fluctuation of the threshold voltage of the MOS transistor is suppressed and the impurity diffusion is performed. It is easy to form shallow junctions in layers.

The effect of suppressing the diffusion of boron is achieved not only when the impurities are implanted into the electrodes and the source / drain regions via the nitride film but also when the nitrogen is directly implanted into the electrodes and the source / drain regions. To be done. That is, FIG. 4 (b)
4B, a step of directly implanting boron and nitrogen into the silicon substrate 201, the field shield electrode 203, and the gate electrode 206 without forming the silicon nitride film 207 to form the sidewall nitride film 207 shown in FIG. 4C. Even if the metal silicide film is formed on the silicon substrate 201, the field shield electrode 203, and the gate electrode 206 as shown in FIG. 4D, the same effect can be achieved.

Next, a third embodiment of the present invention applied to wiring inside a semiconductor device will be described with reference to FIGS. In this embodiment, the semiconductor device has a plurality of memory cells each including one MOS transistor and one capacitor, and a peripheral circuit for driving the memory cells.

In FIG. 5A, a semiconductor substrate 301 has a memory cell formation region A (left side) and a peripheral circuit formation region B (right side) with an element isolation region 302 therebetween. The gate oxide film 303, the gate electrode 304, the sidewall insulating film 305, and the impurity diffusion layer 306 are formed on the left side of the semiconductor substrate 301 by the method described in the first or second embodiment. These form one of a plurality of MOS transistors arranged in a matrix. Similarly, on the right side of the semiconductor substrate 301, the gate oxide film 32 is formed.
3, gate electrode 324, sidewall insulating film 325,
The impurity diffusion layer 326 is formed. These form one of a plurality of MOS transistors of the peripheral circuit. These two types of MOS transistors are preferably formed simultaneously.

Next, as shown in FIG. 5B, insulating films 307 and 327 are patterned on the gate electrodes 304 and 324, respectively, and then polycrystalline silicon containing impurities to be the lower electrode 308 of the capacitor is formed. Film, dielectric film 30
9. A polycrystalline silicon film containing impurities to be the upper electrode 310 of the capacitor is sequentially patterned. The lower electrode 308 of this capacitor is connected to one of the impurity diffusion layers 306 of the corresponding MOS transistor in the memory cell region. After that, BPSG (boron phos
an insulating film 311 such as a phor silicon glass) film is formed, and contact holes 312, 313, 3 are formed in the insulating film 311.
32 and 333 are opened. Furthermore, M in the memory cell area
The other impurity diffusion layer 306 of the OS transistor and the impurity diffusion layer 326 of the MOS transistor in the peripheral circuit formation region
The non-doped polycrystalline silicon to be the wiring (bit line) 314 connecting to one of the wirings and the other wirings 315 and 335 is patterned.

Next, as shown in FIG. 6A, a silicon nitride film 316 having a thickness of about 100 to 300 nm is formed on the entire surface of the substrate by the CVD method, and then a recording layer is formed via the silicon nitride film 316. Impurities are injected to reduce the resistance of the wiring layer. At this time, nitrogen in the silicon nitride film 316 is also knocked on to the wiring layer. When boron is used as the impurity implanted in the wiring layer, since nitrogen introduced into the substrate by knock-on suppresses the diffusion of boron in the wiring layer, a shallow junction should be formed in the impurity diffusion layers 306 and 326. Is easy. Further, an insulating film 316 is formed on the entire surface of the substrate, and the wiring 334 is connected to, for example, the power supply voltage (V _DD ), and the wiring 314 is supplied to the voltage V _DD / through a contact hole (not shown) formed in the insulating film 316. Connected to 2. Here, boron and nitrogen may be directly injected into the wiring layer without forming the silicon nitride film 316.

Next, as shown in FIG. 6B, the silicon nitride film is selectively removed to form wirings 314, 315, and
A sidewall nitride film 316 is formed only on the sidewall of 335. This step is omitted when the silicon nitride film 316 is not formed. Further, after depositing a titanium film with a thickness of about 40 nm on the entire surface of the substrate by a sputtering method, the substrate is heat-treated at a temperature of 400 to 900 ° C. for 5 to 60 seconds to self-align only on the wirings 314, 315, and 335. Then, a titanium silicide film 317 is formed. Thereby, the resistance of the wirings 314, 315, and 335 can be reduced. The titanium film remaining without silicidation and reaction products other than silicide are removed by cleaning. further,
An interlayer insulating film 318 is formed on the entire surface of the substrate, and for example, the wiring 335 is connected to the power supply voltage (V _DD ) and the wiring 315 is connected to the voltage V _DD through a contact hole (not shown) formed in the interlayer insulating film 318. / 2 is connected.

As described above, according to the present invention, a semiconductor device having a metal silicide layer having a sufficient thickness capable of forming a low resistance shallow junction can be manufactured with a relatively small number of steps. Therefore, the manufacturing cost is reduced. Further, even when boron is used as the impurity, it is possible to suppress the diffusion of boron in the conductor and suppress the fluctuation of the threshold voltage of the MOS transistor.

[0059]

According to the present invention, a semiconductor device having a metal silicide layer having a sufficient thickness capable of forming a low-resistance shallow junction can be manufactured in a relatively small number of steps. Manufacturing cost is reduced.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a method of manufacturing a CMOS device according to the first embodiment of the present invention in the order of steps.

FIG. 2 is a cross-sectional view showing the method of manufacturing the CMOS device according to the first embodiment of the present invention in the order of steps.

FIG. 3 is a cross-sectional view showing the method of manufacturing a semiconductor device according to the second embodiment of the present invention in the order of steps.

FIG. 4 is a sectional view showing a method of manufacturing a semiconductor device according to a second embodiment of the present invention in the order of steps.

FIG. 5 is a cross-sectional view showing the method of manufacturing a semiconductor device according to the third embodiment of the present invention in the order of steps.

FIG. 6 is a cross-sectional view showing a method of manufacturing a semiconductor device according to a third embodiment of the present invention in the order of steps.

[Explanation of symbols]

101 P-type silicon substrate 102 N-well 103 P-well 104 Field oxide film 105 Gate oxide film 106 Gate polysilicon film 108 N ^- region 109 P ^- region 111 Silicon nitride film 113 N ⁺ region 115 P ⁺ region 116 Titanium film 117 Titanium silicide layer

Claims (33)

[Claims] 1. A semiconductor substrate, a gate insulating film patterned on the semiconductor substrate, a gate electrode patterned on the gate insulating film, and formed in the semiconductor substrate at least on both sides of the gate electrode. A semiconductor including an impurity diffusion layer containing impurities and nitrogen, a sidewall insulating film including a nitride film formed on a sidewall of the gate electrode, and a metal silicide film formed on at least the impurity diffusion layer. apparatus. 2. A semiconductor substrate, a first well region containing an impurity of a first conductivity type and a second well region containing an impurity of a second conductivity type formed in the semiconductor substrate, A first gate insulating film formed on a first well region, a second gate insulating film formed on the second well region, and formed on the first and second gate insulating films, respectively. First and second gate electrodes, and a first impurity diffusion layer containing nitrogen of the first conductivity type and nitrogen formed in the first well region on both sides of the first gate electrode. A second impurity diffusion layer containing a second conductivity type impurity and nitrogen formed in the second well region on both sides of the second gate electrode; and the first and second gates. The sidewalls including the nitride film formed on the sidewalls of the electrodes are isolated. A semiconductor device comprising an edge film and a metal silicide film formed on at least the first and second impurity diffusion layers. 3. A semiconductor substrate, an insulating film patterned on the semiconductor substrate, a conductor including nitrogen patterned on the insulating film, and a nitride formed on a sidewall of the conductor. A semiconductor device including: a sidewall insulating film including a film; and a metal silicide film formed on at least the conductor. 4. A semiconductor substrate, an insulating film patterned on the semiconductor substrate, a conductor patterned on the insulating film, and formed on at least both sides of the conductor in the semiconductor substrate. A semiconductor device comprising: an impurity diffusion layer containing impurities and nitrogen; a sidewall insulating film containing a nitride film formed on a sidewall of the conductor; and a metal silicide film formed on at least the impurity diffusion layer. 5. The semiconductor device according to claim 4, wherein the conductor contains nitrogen, and a metal silicide film is formed on the conductor. 6. The semiconductor device according to claim 3, wherein the conductor is a field shield electrode. 7. The semiconductor device according to claim 3, wherein the conductor is used for wiring. 8. The memory cell according to claim 3, further comprising a plurality of memory cells each having a MOS transistor and a capacitor, wherein the conductor is used as a wiring for selecting a part of the plurality of memory cells. Semiconductor device. 9. The film thickness of the nitride film is 100 to 300 nm.
The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device. 10. The semiconductor device according to claim 1, wherein the semiconductor substrate is a silicon substrate, and the nitride film is a silicon nitride film. 11. The semiconductor according to claim 1, wherein the metal silicide film is at least one silicide film selected from the group consisting of titanium, molybdenum, tungsten, tantalum, and cobalt. apparatus. 12. The impurity diffusion layer comprises 10 ¹⁸ to 10 ^21.
/ Cm containing ³ nitrogen claim 1, 2 or any one of the 4
The semiconductor device according to the item. 13. The conductor is 10 ¹⁸ to 10 ²¹ / cm.
The semiconductor device according to claim 3, comprising ³ nitrogen. 14. A first step of sequentially forming a gate insulating film on a semiconductor substrate and a gate electrode on the gate insulating film, and the semiconductor substrate on which the gate insulating film and the gate electrode are formed. After forming an insulating film including a nitride film on the entire surface, impurities are ion-implanted into the semiconductor substrate at least on both sides of the gate electrode through the insulating film, and nitrogen in the nitride film is deposited on at least both sides of the gate electrode. A second step of introducing into the semiconductor substrate; and etching the insulating film to form a sidewall insulating film including the nitride film on a sidewall of the gate electrode, and the semiconductor outside the sidewall insulating film. A third step of exposing the substrate, and gold on the entire surface of the semiconductor substrate on which the gate insulating film, the gate electrode, and the sidewall insulating film are formed. After forming the metal film, heat-treating the semiconductor substrate to form a metal silicide film on the semiconductor substrate at least outside the sidewall insulating film; and a part of the metal film not silicified. And a fifth step of removing the semiconductor device. 15. A first well containing an impurity of a first conductivity type is formed in a first region of a semiconductor substrate, and the first well is formed.
A second step of forming a second well containing an impurity of a second conductivity type in a second region of the semiconductor substrate different from the first region, and forming a first gate insulating film on the first well. A second gate insulating film is formed on the second well, and a first gate electrode and a second gate electrode are sequentially formed on the first and second gate insulating films, respectively. And a third step of forming an insulating film including a nitride film on the entire surfaces of the first and second wells in which the first and second gate insulating films and the first and second gate electrodes are formed. A step of implanting a first impurity into the first wells on both sides of the first gate electrode in the first region through the insulating film, and at least nitrogen of the nitride film at least in the first region; A fourth step of introducing into the first well on both sides of the gate electrode, A second impurity is ion-implanted into the second wells on both sides of the second gate electrode in the second region through the insulating film, and nitrogen in the nitride film is formed at least in the second gate electrode. A fifth step of introducing into the second wells on both sides, and the insulating film is etched to form sidewall insulating films made of the insulating film on the sidewalls of the first and second gate electrodes, respectively. A sixth step of exposing the first and second wells outside the sidewall insulating film, the first and second gate insulating films, the first and second gate electrodes, and the sidewall A metal film is formed on the entire surface of the first and second wells in which an insulating film is formed, and then the semiconductor substrate is subjected to heat treatment to at least the first and second wells outside the sidewall insulating film. above The method of manufacturing a semiconductor device including a seventh step of forming the genus silicide film, respectively, and an eighth step of removing the metal film in a portion which was not silicided. 16. A first step of forming a first insulating film on a semiconductor substrate and further patterning a conductor on the first insulating film; and a step of forming the first insulating film and the conductor. After forming a second insulating film including a nitride film on the entire surface of the formed semiconductor substrate, impurities are ion-implanted into the conductor through the second insulating film, and nitrogen in the nitride film is introduced into the conductor. A second step of introducing, a third step of etching the second insulating film to form a sidewall insulating film made of the second insulating film on a sidewall of the conductor, at least the conductor And a fourth step of forming a metal silicide film thereon. 17. A first step of forming a first insulating film on a semiconductor substrate and patterning a conductor on the first insulating film; and forming the first insulating film and the conductor. A second insulating film including a nitride film is formed on the entire surface of the semiconductor substrate, and impurities are ion-implanted into the semiconductor substrate at least on both sides of the conductor through the second insulating film.
A second step of introducing nitrogen of the nitride film into the semiconductor substrate on both sides of the conductor; and etching the second insulating film to form a sidewall of the conductor with the second insulating film. A third step of forming a sidewall insulating film and exposing the semiconductor substrate outside the sidewall insulating film; and a fourth step of forming a metal silicide film on the semiconductor substrate at least outside the sidewall insulating film. And a method of manufacturing a semiconductor device. 18. The method according to claim 17, wherein the second step includes a step of ion-implanting the impurities into the conductor through the nitride film and introducing nitrogen of the nitride film into the conductor. Of manufacturing a semiconductor device of. 19. The method of manufacturing a semiconductor device according to claim 16, wherein the conductor is a field shield electrode. 20. The method of manufacturing a semiconductor device according to claim 16, wherein the conductor is used for wiring. 21. The semiconductor device according to claim 16, further comprising a plurality of memory cells each having a MOS transistor and a capacitor, wherein said conductor is used for a wiring for selecting a part of said plurality of memory cells. Manufacturing method. 22. The film thickness of the nitride film is 100 to 300 n.
18. The method for manufacturing a semiconductor device according to claim 14, wherein m is m. 23. The semiconductor substrate is a silicon substrate, and the nitride film is a silicon nitride film.
8. The method for manufacturing a semiconductor device according to any one of items 7. 24. The semiconductor according to claim 14, wherein the metal silicide film is at least one silicide film selected from the group consisting of titanium, molybdenum, tungsten, tantalum, and cobalt. Device manufacturing method. 25. The impurity diffusion layer comprises 10 ¹⁸ to 10 ^21.
18. The method for manufacturing a semiconductor device according to claim 14, wherein the semiconductor device contains nitrogen in an amount of / cm ³ . 26. The conductor is 10 ¹⁸ to 10 ²¹ / cm.
^The method for manufacturing a semiconductor device according to claim 16, wherein the semiconductor device contains ³ nitrogen. 27. The method of manufacturing a semiconductor device according to claim 14, wherein the heat treatment is performed at a temperature of 400 to 900 ° C. for 5 to 60 seconds. 28. The metal silicide film has a thickness of 600-11.
The method of manufacturing a semiconductor device according to claim 14, further comprising a step of performing heat treatment at a temperature of 00 ° C. for 5 to 60 seconds. 29. A step of forming an insulating film on a semiconductor substrate, forming a conductor on the insulating film, and then patterning the conductor; and a step of implanting at least boron and nitrogen into the conductor. And at least forming a metal silicide film on the conductor. 30. The method of manufacturing a semiconductor device according to claim 29, wherein the conductor is a field shield electrode. 31. The semiconductor device according to claim 29, comprising a plurality of memory cells each having a MOS transistor and a capacitor, wherein the conductor is used for a wiring for selecting a part of the plurality of memory cells. Manufacturing method. 32. The impurity of the first conductivity type is one impurity of N type and P type, and the impurity of the second conductivity type is another impurity of N type and P type. The semiconductor device according to claim 2, wherein 33. The impurity of the first conductivity type is one impurity of N-type and P-type, and the impurity of the second conductivity type is another impurity of N-type and P-type. The method for manufacturing a semiconductor device according to claim 15, wherein