JPH08235014A - Apparatus and method for test of program memory part of one-chip microcomputer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the time required for testing a program memory section by making each block of the other function simultaneously testable at the time of testing the program memory section. SOLUTION: A program memory testing device is provided with a program memory section 26 which stores each program information having a specific pattern, an address counter means section 35 which designates an address to the section 36 through an address bus 40 which is switched by means of a first change-over switch 41, a checksum computing means section 37 which calculates and stores the whole data of the address designated by the section 36 through a data bus 39 which is switched by means of a second change-over switch 42, and a test mode switching means section 34 which controls the switches 41 and 42, and the section 35.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a one-chip microcomputer, and more particularly to a one-chip microcomputer capable of simultaneously testing other functional blocks while a program memory section in the microcomputer is being tested. The present invention relates to a program memory unit test apparatus and method for a chip microcomputer.

[0002]

2. Description of the Related Art A conventional program memory unit test of a one-chip microcomputer will be described with reference to the accompanying drawings. FIG. 1 is a block diagram showing the configuration of a conventional one-chip microcomputer, and FIG. 2 is a flow chart showing a conventional program memory unit testing method. First,
As shown in FIG. 1, a conventional one-chip microcomputer includes an interrupt controller 1, a central processing unit 2, a data memory unit 3, a program memory unit 4, a peripheral device unit 5,
It comprises an input / output pot 6, and the above-mentioned functional parts are structurally and functionally interconnected through an address bus 7 and a data bus 8.

The one-chip microcomputer configured as described above is subjected to a test for selecting a good product and a defective product. When performing a test, data is given to each functional unit through the input / output port 6 and the data bus 8, and the result is read through the input / output port 6 to determine whether or not it matches the expected value. Program data is separately encoded in the program memory unit 4 according to the purpose.
At this time, it is tested whether proper information is encoded in the program memory unit 4.

The test method will be described with reference to FIG. FIG. 2 is a flow chart showing a conventional program memory test method. First, the address of the program memory unit 4 is designated as the φ address, and the data of the program memory unit 4 at the φ address is output to the input / output 6 ports. Next, the output data is compared with the expected value to see if they match, and if they do not match, it is determined to be defective and the one-chip microcomputer is processed as a defective product. On the other hand, if the output data matches the expected value, the address is incremented by 1 and the test is continued. As a result, if there is no abnormality up to the last address, the one-chip microcomputer is treated as a non-defective product and the test ends.

[0005]

However, the above-described conventional program memory unit testing apparatus and method for a one-chip microcomputer tests each other functional unit of the one-chip microcomputer while the program memory unit is being tested. Therefore, there is a problem in that the test time and the test cost increase as the function becomes higher and the program memory unit has a larger capacity.

The present invention is intended to solve the above-mentioned conventional problems, and it is possible to perform a test of each block of other functions at the same time as the test of the program memory section, thereby reducing the test time. It is an object of the present invention to provide a more effective one-chip microcomputer program memory unit test apparatus and method that reduces an increase in cost.

[0007]

To achieve the above object, a program memory unit test device for a one-chip microcomputer according to the present invention comprises a central processing unit for controlling the entire system and an interrupt controller for controlling an interrupt function. A data memory unit that stores information about data, a peripheral device that is connected to the main system online or offline to perform input / output, a program memory unit that stores each program information having a specific pattern, and a first switch. An address counter means section which is switched by a switch and which specifies an address to the program memory section through an address bus; and a second switch which is switched and calculates the entire data of the designated address of the program memory section through a data bus;
Checksum computing means for storing, test mode switching means for controlling the first and second changeover switches and the address counter means, output of whole data of the checksum computing means, and input of system-wide data Or an input / output port for outputting.

A method for testing a program memory section of a one-chip microcomputer according to the present invention comprises a first step of switching to a test mode to checksum all address data of the program memory section, and a binary step during the progress of the first step. The second step of executing the test of each functional section except the program memory section and the completion of the execution of the second step are confirmed, and the checksummed whole data is compared with an expected value, and the result is a good product. And a third step of determining whether the product is defective.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A program memory unit testing device and method for a one-chip microcomputer according to the present invention will be described in detail below with reference to the accompanying drawings. FIG. 3 is a configuration block diagram of the one-chip microcomputer of the present invention, and FIG. 4 is a flow chart showing a program memory unit testing method of the present invention.

First, FIG. 3 shows a program memory unit test apparatus for a one-chip microcomputer according to the present invention.
An interrupt controller 30 for controlling the interrupt function,
A central processing unit 31 that controls the entire system, a data memory unit 32 that stores information about data, a peripheral device unit 33 that is connected to the main system online or offline to perform input / output, and each program having a specific pattern. Program memory unit 36 for storing information
And an address counter means section 35 which is switched by the first changeover switch 41 to specify an address to the program memory section 36 through the address bus 40, and a second
The data bus 3 is switched by the changeover switch 42.
9, a checksum computing means 37 for calculating and storing the entire data of the designated address of the program memory 36, and a test mode switching means for controlling the first and second changeover switches 41 and 42 and the address counter means 35. It is configured to include a unit 34, an output of the entire data of the checksum computing unit 37, and an input / output 38 for inputting or outputting the data of the entire system. The respective components are structurally and functionally interconnected through an address bus 40 and a data bus 39.

The operation of the test device for the program memory section of the one-chip microcomputer of the present invention having the above construction will be described below. FIG. 4 is a flow chart showing a method of testing the program memory unit of the present invention. As shown in FIG. 4, data is applied through the input / output port 38 to set the test mode switching means unit 34 (401).
Then, the output of the test mode switching unit 34 enables the address counter unit 35, and controls the first changeover switch 41 so that the output end of the address counter unit 35 and the input end of the program memory unit 36 are connected. To do. Then, the second changeover switch 42 is controlled so that the output end of the program memory unit 36 and the input end of the checksum computing unit 37 are connected through the data bus 39.

Address counter means 35 enabled by the setting of the test mode switching means 34.
Starts counting while incrementing the address from the φ address by 1 (402). The count value designates an address in the program memory unit 36, and the data at the designated address is sequentially calculated and stored by the checksum computing unit 37 (403) (404) (40).
5).

When the test of the program memory unit 36 progresses, the test of the specific block excluding the program memory unit 36 progresses in a binary manner (406) (407). When the test of the specific block excluding the program memory section 36 is completed (408), all the data of the checksum computing section 37 is output through the input / output port 38 (40
9) Compare with the expected value to judge whether it is a good product or a defective product (4
10). If the result is determined to be defective, an analysis test is performed to find a defective address according to the user's selection (411).

The analysis test is performed by the test mode switching means section 34.
Is reset (412) and according to the specified address (413)
The data in the program memory unit 36 is sequentially output to (41
4), the defective value is compared and judged (415) and the defective address is checked (416) (417) (41).
8).

[0015]

As described above, according to the program memory unit testing apparatus and method of the one-chip microcomputer of the present invention, each functional block except the program memory unit is tested during the test of the program memory unit.
It is possible to prevent the increase of the test time due to the increase in the capacity of the program memory unit and reduce the test cost by executing the program in parallel.

[Brief description of drawings]

FIG. 1 is a block diagram of a conventional one-chip microcomputer.

FIG. 2 is a flowchart illustrating a conventional method of testing a program memory unit.

FIG. 3 is a configuration block diagram of a one-chip microcomputer of the present invention.

FIG. 4 is a flowchart showing a program memory unit testing method of the present invention.

[Explanation of symbols]

 30 interrupt controller 31 central processing unit 32 data memory unit 33 peripheral device unit 34 test mode switching unit unit 35 address counter unit unit 36 program memory unit 37 checksum operation unit unit 38 input / output 39 data bus 40 address bus 41 first switching Switch 42 Second switch

Claims (3)

[Claims] 1. A central processing unit for controlling the entire system, an interrupt controller for controlling an interrupt function, a data memory unit for storing information about data, and a main system connected online or offline to perform input / output. A peripheral device, a program memory section for storing respective program information having a specific pattern, an address counter means section which is switched by a first changeover switch and specifies an address to the program memory section through an address bus, and a second changeover switch. And a test mode switching means for controlling the first and second changeover switches and the address counter means, and a checksum calculating means for calculating and storing the entire data of the designated address of the program memory through the data bus. Department and front Overall data output of the checksum calculation unit section, and a program memory unit testing device of one-chip microcomputer and having an input / output port for inputting or outputting data of the system in general. 2. A first step of switching to a test mode to checksum all the address data of the program memory section, and a test of each functional section excluding the program memory section is binaryly performed during the progress of the first step. And a third step of confirming the end of execution of the second step, comparing the checksummed entire data with an expected value, and judging whether the product is a good product or a defective product based on the result. And a method for testing a program memory section of a one-chip microcomputer. 3. If the product is determined to be defective in the third step, the method further comprises the step of resetting the test mode switching unit according to the user's selection and further performing an analysis test for searching for a defective address. 3. The method for testing a program memory section of a one-chip microcomputer according to claim 2.