JPH08222604A - Structure of semiconductor device and method of manufacturing the same - Google Patents

Abstract

PURPOSE: To provide a semiconductor device such that an inner lead portion does not laterally curve or vertically bend and an electrical short circuit between the inner lead portion and the semiconductor chip due to contact with each other does not occur. CONSTITUTION: Forming a support member 7 which extends form the rear of a base 1 to that of an inner lead portion 10 provided at an opening via a side wall of a device hole 5 prevents the inner lead portion 10 from lateral curving or vertical bending. Since the support member 7 extends to the rear of the inner lead portion 10, the outer peripheral portion of a semiconductor chip 13 and the inner lead portion 10 do not short circuit even if they contact each other.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a tape carrier package structure mainly used as an LCD driver IC in recent years and a method of manufacturing the same.

[0002]

2. Description of the Related Art A conventional semiconductor device having a tape carrier package (TPC) structure has an opening in which a semiconductor element is installed in a substrate and an inner lead extending to the bottom of the opening. The semiconductor element and the inner lead were connected via the bump electrode.

[0003]

However, the semiconductor device having the above-mentioned structure has various problems due to the miniaturization of the inner leads and the miniaturization of the inner lead spacing. The miniaturization of the inner leads causes the inner leads to bend and float during the manufacturing process and use of this semiconductor device. Further, due to the miniaturization of the inner lead spacing, a misalignment occurs when aligning the inner lead and the bump electrode, which causes a defect.

[0004]

According to another aspect of the present invention, there is provided a semiconductor device comprising: a first substrate; an opening formed at a selected position in the substrate; and an opening formed on the substrate. A metal pattern extending up to the top of the metal pattern, a support member formed on at least a part of the back surface of the metal pattern portion extending above the aperture of the metal pattern, and connected by the metal pattern and a conductive member. , And a semiconductor element installed in the opening.

A method of manufacturing a semiconductor device according to the present invention comprises a step of preparing a first base, a step of forming an opening at a selected position in the base, and a step of opening the base to the opening. Forming a metal pattern extending up to, a step of forming a support member on at least a part of the back surface of the metal pattern portion extending above the opening of the metal pattern, and a semiconductor in the opening. And a step of installing an element and connecting to the metal pattern with a conductive member.

[0006]

In the semiconductor device, the metal pattern extending to the opening and the support member formed on at least a part of the back surface of the metal pattern extending to the opening of the metal pattern. Since the inner lead is provided, it is possible to prevent the inner lead from being bent or lifted when it is manufactured or used. In addition, in the manufacturing process, it is possible to prevent misalignment between the inner leads and the bump electrodes, and improve the assembly yield.

[0007]

First Embodiment FIG. 1 shows a method of manufacturing a semiconductor device according to a first embodiment of the present invention.

First, as shown in FIG. 1A, an adhesive 2 is applied on a base material 1 made of polyimide, polyester, glass epoxy or the like. A protective tape 3 is formed on the adhesive 2.

Next, as shown in FIG. 1B, the holes 4 and 5 are formed by punching with a die or the like. The opening 4 is a perforation hole for positioning, and the opening 5 is a device hole required when aligning the semiconductor element and the inner lead.

Next, after the protective tape 3 is peeled off, the copper foil 6 is bonded by heat or load. The copper foil 6 is formed on the substrate 1 with the adhesive 2 interposed, and the device hole 5 is formed.
It is also installed on the top (Fig. 1 (c)).

Further, a support member 7 is formed which extends from the back surface of the substrate 1 through the side wall of the device hole 5 to the back surface of the copper foil 6 laid over the opening (FIG. 1 (d)).
The support member 7 is formed by screen-printing a polyimide resin. The support member 7 may be formed by an X / Y drawing method or a method of partially leaving the resin by a photolithography process after applying a polyimide resin on the entire surface, in addition to screen printing.

Next, a back coat portion 8 is formed so as to fill the opening 5 from the back surface. This back coat part 8
It is formed by screen printing. The back coat portion is formed in order to prevent the copper foil 6 from being etched from its back surface in the subsequent etching process of the copper foil 6. Although the back coat material is formed only in the device hole 5 here, it may be formed in the device hole 5 and on the back surface of the substrate 1. Further, a photoresist 9 is selectively formed on the copper foil 6 (FIG. 1 (e)).

A plurality of photoresists 9 are formed in a line at regular intervals.

Next, the copper foil 6 is etched using the photoresist 9 as a mask to form a copper pattern 11. The copper pattern 11 includes outer lead portions 10 ′ on the base body 1 and inner lead portions 1 extending on the device holes 5.
It is composed of 0 and. In addition, a plurality of copper patterns 11 are formed in a line shape at regular intervals. Then, the back coat part 8 is removed (FIG. 1 (f)).

Further, plating 12 is applied to the surface of the copper pattern (FIG. 1 (g)). The material of the plating 12 is tin, solder, gold or the like. The opening inner lead 10 is formed. FIG. 1 (i) is a sectional view taken along line AA of FIG. 1 (g).
As described above, a plurality of copper patterns 11 plated with 12 are formed at regular intervals. In addition, FIG.
It is a top view of the area | region B of FIG.1 (f). In this way, a plurality of copper patterns 11 plated with plating 12 are formed in a line shape at regular intervals.

Next, the semiconductor element 13 is placed in the device hole 5 from the back surface side of the base material 1. This semiconductor device 13
Bump electrodes 14 are formed on the bump electrodes 14 and the bump electrodes 14 and the inner lead portions 10 are accurately aligned.
After that, the bump electrode 14 and the inner lead portion 10 are
Bonding is performed by heat and pressure using a jig called a bonding tool (FIG. 1 (h)). As described above, according to the method for manufacturing a semiconductor device of the first embodiment of the present invention, from the back surface of the substrate 1 to the back surface of the copper foil 6 which is provided on the opening through the side wall of the device hole 5. Since the support member 7 to be extended is formed, it is possible to prevent the inner lead portion 10 from being bent in the left-right direction and upward / downward in the vertical direction in the subsequent steps, particularly, in the etching step of the copper foil 6. Further, when the inner leads are bonded, misalignment between the inner leads 10 and the bump electrodes 14 can be reduced, and as a result, the yield can be improved.

Further, even when the distance (gap 15) between the outer peripheral portion of the semiconductor element 13 and the inner lead portion 10 is only about 10 μm, the copper foil 6 (inner lead portion).
Since the supporting member 7 extends on the back surface of the semiconductor element 1,
Even if the outer peripheral portion of 3 and the inner lead portion 10 come into contact with each other, there is no electrical short circuit.

[0018]

Second Embodiment FIG. 2 shows a method of manufacturing a semiconductor device according to a second embodiment of the present invention.

The steps from FIG. 2A to FIG. 2F are the same as those in the first embodiment, and the description thereof will be omitted. As shown in FIG. 2G, the second support member 7 ′ is selectively formed on the copper pattern 11. The second supporting member 7 ′ is made of a polyimide resin and is not formed on the bump electrode bonding area of the inner lead portion 10.

Next, plating 12 is applied to the surface of the copper pattern (FIG. 1 (h)). The material of the plating 12 is tin, solder, gold or the like. FIG. 1 (j) is a sectional view taken along line BB of FIG. 1 (h). As described above, a plurality of copper patterns 11 plated with 12 are formed at regular intervals.

Next, the semiconductor element 13 is placed on the copper pattern 11 on the side of the second supporting member 7 '. A bump electrode 14 is formed on the semiconductor element 13, and the bump electrode 14 and the inner lead portion 10 are accurately aligned. After that, the bump electrode 14 and the inner lead portion 10 are joined by heat and pressure using a jig called a bonding tool (FIG. 1 (i)).

Although the semiconductor element 13 is installed only on the side of the second supporting member 7'in this case, the semiconductor element may be installed from the side of the first supporting member 7 and mounted on both sides. of course,
The semiconductor element 13 may be installed only on the first support member 7 side.

As described above, according to the method of manufacturing the semiconductor device of the second embodiment of the present invention, the copper pattern 11 laid on the opening from the back surface of the substrate 1 through the side wall of the device hole 5. Since the second supporting member 7'on the copper pattern 11 is formed by extending the supporting member 7 extending to the rear surface of the inner pattern 10, the inner lead portion 10 is prevented from being bent in the left-right direction and ups and downs in the up-down direction in the subsequent steps. it can. Further, when the inner leads are bonded, misalignment between the inner leads 10 and the bump electrodes 14 can be reduced, and as a result, the yield can be improved.

Further, even when the distance (gap 15) between the outer peripheral portion of the semiconductor element 13 and the inner lead portion 10 is only about 10 μm, the copper foil 6 (inner lead portion) is formed.
Since the support members 7 and 7'are formed on both surfaces of
Even if the outer peripheral portion of the semiconductor element 13 and the inner lead portion 10 come into contact with each other, they are not electrically short-circuited.

Further, since the supporting members 7 and 7'are formed on both surfaces of the copper foil 6 (inner lead portion), the above effect can be obtained regardless of the bonding surface of the semiconductor element. Further, even if the bonding surface of the semiconductor element is on both sides, the above effect is obtained.

[0026]

Third Embodiment FIGS. 3 and 4 show a method of manufacturing a semiconductor device according to third and fourth embodiments of the present invention.

In FIG. 3, the support member 7 is formed only on the back surface of the inner lead 6 excluding the bump electrode and the area to be joined.

Further, in FIG. 4, a supporting member 7 is formed on the back surface of the inner lead 6 excluding the bump electrode and the area to be joined, and a supporting member 7'is formed on the surface of the inner lead 6 facing the supporting member 7. Is forming.

In such a case, the support members 7 and 7 '
Is small, the amount of the polyimide resin forming the supporting member is small and the manufacturing cost is reduced.

[Brief description of drawings]

FIG. 1 is a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a method of manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a method of manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 4 is a method of manufacturing a semiconductor device according to a fourth embodiment of the present invention.

[Explanation of symbols]

 1 ... Substrate 2 ... Adhesive 3 ... Protective tape 4 ... Perforation hole 5 ... Device hole 6 ... Copper foil 7, 7 '... Support member 8 ... Back Coat part 9 ... Photoresist 10 ... Inner lead part 10 '... Outer lead part 11 ... Copper pattern 12 ... Plating 13 ... Semiconductor element 14 ... Bump electrode 15 ... Gap

Claims (2)

[Claims] 1. A first base, an aperture formed at a selected position in the base, a metal pattern formed on the base and extending to the aperture, the metal A support member formed on at least a part of the back surface of the metal pattern portion extending over the opening portion of the pattern, and a semiconductor element connected to the metal pattern by a conductive member and installed in the opening portion. A semiconductor device having. 2. A step of preparing a first base, a step of forming an opening at a selected position in the base, and a metal pattern extending from above the base to above the opening. And a step of forming a support member on at least a part of the back surface of the metal pattern portion extending above the opening portion of the metal pattern, placing a semiconductor element in the opening portion, the metal pattern And a step of connecting with a conductive member.