JPH08222568A - Copper wiring manufacture, semiconductor device, and copper wiring manufacturing device - Google Patents

Abstract

PURPOSE: To form copper wiring by simple process without using a wet process. CONSTITUTION: Barrier layers 5 and 15 and copper films 6 and 16 are grown in this order on the surface of an insulating film 3 being grown on a substrate 2 and provided with a groove, and the groove 4 is charged with copper, and then positive bivalent copper organic complex gas and electron donative neutral ligand gas are supplied to the surface of the copper film 6, whereupon the copper on the surface of the copper film 6 is converted into a positive univalent copper organic complex, and is removed with vacuum exhaust, so copper thin film wiring 6' remains within the groove 4. Since the groove 4 can be made in minute width, and this copper film wiring 6' can also be micronized. Furthermore, providing a cap layer 7 on the copper film wiring 6' will enable encapsuled copper wiring 9 to be made, so copper ceases to corrode or diffuse in the insulating film.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technology for manufacturing fine copper wiring, a copper wiring manufacturing apparatus that can be used for manufacturing the same, and a semiconductor device having the copper wiring manufactured by the technology. The present invention relates to a copper wiring manufacturing method, a copper wiring manufacturing apparatus, and a semiconductor device having the copper wiring, which can be processed in a vacuum atmosphere with a simple manufacturing process.

[0002]

2. Description of the Related Art At present, as a wiring for connecting elements in a semiconductor integrated circuit, a wiring mainly made of aluminum (Al) is used for ease of processing.

However, since the wiring made of aluminum has weak resistance to electromigration and stress migration, it frequently breaks as the wiring becomes finer, which is a serious problem.

As a countermeasure against this, it has been proposed to form a wiring by using tungsten (W) or molybdenum (Mo) as a material, which has higher resistance to electromigration and stress migration than aluminum wiring. When these are applied to a fine wiring pattern, the voltage drop caused by the wiring becomes too large, causing the problem of heat generation in the wiring, and the large resistance value means that the signal transmission delays. There was a new problem such as being connected to.

Therefore, studies have begun on using copper (Cu), which has a small resistance value and excellent physical properties such as electromigration resistance and stress migration resistance, as a wiring material.

However, copper, which has excellent physical properties, is also LS
There are the following inconveniences when trying to use for I wiring,
It has been considered difficult to put it into practical use as a wiring material for semiconductor integrated circuits.

Diffusion is fast in silicon or a silicon oxide film. Poor adhesion to silicon oxide film. It is easily oxidized and corroded. Since the vapor pressure of the halogen compound of copper is low, the etching gas that can etch the conventional aluminum wiring cannot be used, and the fine processing cannot be performed by anisotropic dry etching.

However, in recent years, for example, titanium nitride (T
When a barrier layer such as an iN) thin film or a titanium tungsten (TiW) thin film is formed as a base thin film and a copper thin film is formed on the barrier layer, the barrier layer prevents diffusion of copper into the substrate. It has been found that the adhesiveness is improved together with this, and that if such a barrier layer is also formed on the copper thin film, the corrosion resistance of the copper wiring is also improved. There is a prospect for a solution.

Regarding the remaining problem of the fine processing of copper, for example, a wiring pattern is formed using a heat-resistant inorganic resist or the like on a copper thin film entirely formed on the surface of a substrate,
A solution of performing dry etching at a high temperature of 250 ° C. to 300 ° C. has been proposed, but the process becomes complicated,
Furthermore, there are many problems such as poor resolution and damage to copper wiring.

Further, regarding the formation of the wiring made of copper, a CVD reaction in which a copper thin film is formed on the entire surface of a semiconductor substrate, a resist similar to that conventionally used is applied and patterned, and then copper is deposited. A method of forming a copper wiring on a substrate by performing etching by a chemical reaction opposite to that has been proposed. This method has an advantage that etching can be performed at a relatively low temperature of 200 ° C. or lower,
Since the etching due to the reverse reaction of CVD is isotropic, several μ
Since it is difficult to perform a fine processing of m or less, it has not yet been put to practical use.

On the other hand, as a technique replacing the conventional etching technique, a method of forming fine copper wiring using a chemical mechanical polishing method (hereinafter referred to as CMP method) has been proposed. This method has the same idea as inlaying in the field of traditional crafts, and the CMP method will be briefly described with reference to the drawings.

Referring to FIG. 5A, reference numeral 102 denotes a silicon substrate having an insulating film 103 made of a silicon thermal oxide film. A groove 104 is provided in the insulating film 103, a barrier layer 105 is formed on the surface thereof, and a copper thin film 106 is conformally formed on the barrier layer 105 by a CVD method.

The surface of this substrate is polished with a polishing liquid (C
MP) and, as shown in FIG. 5B, the copper thin film 106 and the barrier layer 105 on the surface of the insulating film 103 were removed by polishing and filled in the groove 104. Since only the thing remains, the copper wiring thin film 106 ',
The peripheral surface of the copper wiring thin film 106 ′ and the underlying barrier layer 105 ′ on the bottom surface are left in the groove 104.

As shown in FIG. 5C, a protective film 107 having the same composition as that of the barrier layer 105 is formed on the entire surface of the substrate, and then the copper wiring thin film 10 is formed as shown in FIG. 5D.
If a resist film 108 is provided and etched so that the protective film 107 on 6'is not removed, the protective film 10 is removed.
Since the unnecessary portion of 7 is removed to form the cap layer 107 ′, according to this CMP method, as shown in FIG. 5 (e), the copper wiring thin film 106 ′ filled in the groove is The copper wiring 109 encapsulated by the underlying barrier layer 105 'and the cap layer 107' is completed.

The width of the copper wiring 109 is the same as that of the groove 1.
Since the width can be made equal to the width of 04, if the groove width is miniaturized by anisotropic etching, the copper wiring 109 can also be miniaturized.

As described above, in order to make full use of copper wiring having excellent electric characteristics as a wiring material for semiconductor integrated circuits, its fine processing technology is very important, but it is used in the current aluminum processing process. Since the existing dry etching technique cannot be applied, the wet polishing technique such as the above-mentioned CMP method is regarded as promising at present.

[0017]

However, the above C
The MP method is a wet process premised on the use of a polishing liquid. Unlike the vacuum process, which can perform substrate processing in a clean atmosphere, such wet processing has various problems such as dust being generated during polishing and inevitably adhering to the substrate, which greatly reduces yield and reliability. Is newly generated.

Therefore, the present invention provides a semiconductor device having fine copper wiring which can be manufactured by a process in a clean atmosphere without using a wet process, a manufacturing method for manufacturing the copper wiring, and a manufacturing apparatus which can be used for the method. Technology to provide.

[0019]

In order to solve the above-mentioned problems, the method according to the first aspect of the present invention is a barrier layer for forming a barrier layer on the surface of an insulating film formed on a substrate and provided with grooves. A film forming step, a copper filling step of forming a copper thin film on the surface of the barrier layer and filling the groove with copper, and removing the copper thin film leaving copper filled in the groove, And a wiring forming step of forming a copper wiring therein. The wiring forming step comprises a positive divalent copper organic complex gas and an electron donating neutral ligand on the surface of the copper thin film. And an etch back step of removing the copper thin film into a positive monovalent copper organic complex by supplying a gas,

A second aspect of the present invention is the method for producing a copper wiring according to the first aspect, wherein the wiring forming step forms a cap layer on the copper surface left in the groove. Characterized by having

According to a third aspect of the present invention, there is provided an insulating film formed on a substrate, a groove formed in the insulating film, a barrier layer formed in the groove, and a barrier layer formed on the barrier layer. A semiconductor device having a copper thin film formed to fill the inside of the groove, wherein the copper thin film outside the groove of the copper thin film is a positive divalent copper organic complex gas and an electron-donating neutral. It is converted to a positive monovalent copper organic complex by a ligand gas and removed, and copper wiring is formed in the groove,

An invention device according to claim 4 is the semiconductor device according to claim 3, characterized in that a cap layer is provided on the copper wiring,

The invention apparatus according to claim 5 has a barrier layer deposition chamber for depositing a barrier layer, a copper thin film deposition chamber for depositing a copper thin film, and an etchback chamber for removing the copper thin film. In a copper wiring manufacturing apparatus in which each chamber is arranged around a substrate transfer chamber in which a substrate transfer robot is placed, each chamber is evacuated and the substrate is transferred by the substrate transfer robot to be processed in each chamber. The substrate is not exposed to the atmosphere when the etching is performed, and the etch-back chamber is provided on the surface of the copper thin film formed on the substrate, the positive divalent copper organic complex gas and the electron-donating neutral ligand. Gas is supplied to make the copper thin film a positive monovalent copper organic complex so that unnecessary portions of the copper thin film on the surface of the substrate are uniformly removed.

[0024]

First, C for forming a copper thin film, which is the basis of the present invention, is formed.
The reaction mechanism of the VD method will be described. The CVD method for depositing a copper thin film includes a method using a positive monovalent copper organic complex gas as a raw material and a method using a positive divalent copper organic complex gas as a raw material, and their reaction mechanisms are generally as follows. It is thought to be due to a chemical reaction.

Method Using Positive Monovalent Copper Organic Complex Gas As the positive monovalent copper organic complex (Cu ⁺¹ complex), the following formula (1),

[0026]

Embedded image

1,5-cyclooctadiene (C ₈ H ₁₂ or less, abbreviated as “COD”) represented by the following formula:

[0028]

Embedded image

COD-Cu ⁺¹ -HFA having hexafluoroacetylacetone (CF ₃ COCHCOCF ₃ or less, abbreviated as “HFA”) represented by
FA and the following formula (hereinafter, a methyl group is abbreviated as “Me”).
The ethyl group is abbreviated as "Et". ),

[0030]

Embedded image

Vinyltrimethylsilane (S
i (Me) ₃ -CHCH ₂ or less, VTMS-Cu ⁺¹ HFA like having abbreviated) and a "VTMS" is used as a source gas.

The case where the COD-Cu ⁺¹ -HFA is used as a precursor will be described. First, when the substrate is placed in a vacuum chamber and COD-Cu ⁺¹ -HFA gas is introduced, the C
OD-Cu ^{+ 1-} HFA causes a dissociation reaction on the substrate surface. At this time, the Cu ⁺¹ -HFA intermediate is adsorbed on the substrate surface, and 2COD ↑ is desorbed in the gas phase.

Next, a disproportionation reaction of two molecules of the Cu ⁺¹ -HFA intermediate adsorbed on the surface produces one atom of metal Cu ^{0 on the} surface and is a positive divalent copper organic complex. Cu ⁺² (HFA) ₂ ↑ is released in the gas phase.

The reaction is summarized as follows. 2 (COD-Cu ⁺¹ -HFA) → Cu ⁰ + Cu ⁺² (HFA) ₂ ↑ + ₂ COD ↑ ...... (4)

Method Using Positive Divalent Copper Organic Complex As the positive divalent copper organic complex (Cu ⁺² complex), for example, Cu ⁺²
The case where (HFA) ₂ is used as the precursor will be described. When Cu ⁺² (HFA) ₂ gas and H ₂ gas are introduced into the vacuum chamber, C
u ⁺² (HFA) ₂ causes a dissociation reaction on the substrate surface, and Cu
^{+ 1-} HFA and the HFA intermediate are adsorbed on the substrate surface.

Next, a reduction reaction with H ₂ occurs, the HFA intermediate becomes volatile HFA-H ↑ and is eliminated into the gas phase, and one atom of metal Cu ⁰ is formed on the substrate surface.

The above equations can be summarized as follows. Cu ⁺² (HFA) ₂ + H ₂ → Cu ⁰ + 2HFA-H ↑ (5)

In any of the above cases described above, the formation of the copper thin film is performed by changing the Cu ⁺¹ intermediate adsorbed on the substrate surface to Cu ⁰ .

In this case, if a base metal thin film is formed on the surface of the substrate, the base metal thin film can donate free electrons to the Cu ⁺¹ intermediate, so that Cu ⁰ is generated and a copper thin film grows. However, since there is no underlying metal thin film on the substrate surface, S
In the portion where the insulating film such as iO ₂ is exposed, since the insulating film does not have free electrons that can be donated, Cu ⁰ is not generated and the reaction does not proceed. As a result, the copper thin film does not grow on the insulating film, and the selective growth in which copper is formed only on the base metal thin film can be performed.

Contrary to the above-described formation of the copper thin film, on the surface of the already formed copper thin film, for example, Cu (HFA) ₂
When the positive divalent copper organic complex such as gas and the electron-donating neutral ligand gas such as VTMS are supplied at a stoichiometric ratio of 1: 2, the positive divalent copper organic complex is obtained. And the electron-donating neutral ligand take in Cu ⁰ on the surface of the copper thin film, and the positive divalent organic copper complex is converted into the positive monovalent organic copper complex. Occurs. Cu ⁰ + Cu ⁺² (HFA) ₂ + 2VTMS → 2Cu ⁺¹ (HFA) VTMS ...... (6)

Since Cu ⁺¹ (HFA) VTMS on the right side of the above formula has a relatively high vapor pressure and can be easily removed from the substrate surface, the copper thin film is etched contrary to the above-mentioned CVD method. It becomes possible.

The structure of the Cu ⁺¹ (HFA) VTMS is shown in the following formula.

[0043]

[Chemical 4]

However, this etching is not anisotropic but isotropic, and when the copper thin film is etched using the resist as a mask, the wiring width cannot be miniaturized. But,
If a copper thin film is conformally formed on the surface of an insulating film having a groove with a fine width through a barrier layer, the inside of the groove will be filled with copper and become thicker, and the copper thin film in the area other than the groove will be thin. ,
The surface becomes flat. Therefore, even with isotropic etching, only the copper in the groove can be left and the thin copper thin film in the other portions can be removed, so that insulation between the wirings can be achieved and a fine width copper wiring can be made. .

VTMS on the left side of the above formula (6) may be an electron-donating neutral ligand, for example, Si (Me) ₃
C≡CSi (Me) ₃ or the like may be used.

[0046]

Embodiments of the present invention will be described with reference to the drawings. 1A to 1F are process diagrams for explaining an embodiment of the method of the present invention for manufacturing a copper thin film wiring having a fine width.

Referring to FIG. 1A, reference numeral 21 denotes a wafer, which has an insulating film 3 made of a silicon oxide film having a film thickness of 1.0 μm formed on a substrate 2 made of a silicon single crystal. . A width of 0.35 μm and a depth of 0.7 μm are formed on the insulating film 3 by photolithography and dry etching.
A plurality of grooves 4 (aspect ratio = 2) are provided so as to form a line and space.

The semiconductor manufacturing apparatus 30 shown in FIG. 2 is a copper wiring manufacturing apparatus according to an embodiment of the apparatus of the present invention, in which the process processing of the wafer 21 is consistently performed in vacuum to form copper wiring. The semiconductor manufacturing apparatus 30 has a substrate transfer chamber 31 in which a substrate transfer robot 39 is installed, and the cassette chamber 3 is centered around the substrate transfer chamber 31.
2. A dry etching chamber 33, a barrier layer film forming chamber 34, a copper thin film film forming chamber 35, and an etch back chamber 36 are arranged in this order in a counterclockwise direction in the drawing, and each chamber is separated by a vacuum pump (not shown). It is placed in a high vacuum state.

With the chambers other than the cassette chamber 32 kept in a high vacuum, the wafer 21 is placed in the cassette chamber 32.
After placing it inside and evacuating the cassette chamber 32, the wafer 21 is loaded into the barrier layer deposition chamber 34 by the substrate transfer robot 39.

In the barrier layer film forming chamber 34, the loaded wafer 21 is heated to 350 ° C., Ti (NMe ₂ ) ₄ gas and NH ₃ gas are introduced, and the following CVD reaction is performed.
A barrier layer 5 made of a TiN thin film having a thickness of 600 Å was formed. 6Ti (NMe ₂ ) ₄ (g) + 8NH ₃ (g) → 6TiN (s) + 24NHMe ₂ (g) + N ₂ (g)

The above CVD reaction proceeds at a reaction rate,
Since the iN thin film grows conformally, a wafer 22 with good coverage as shown in FIG. 1B was obtained.

Then, the wafer 22 is carried into the copper thin film forming chamber 35 from the barrier layer forming chamber 34, the temperature of the wafer 22 is set to 170 ° C., and Cu 2 H 3 which is a liquid source is used.
A copper thin film 6 was blanket-deposited on the barrier layer 5 by a thermal CVD method using FAVTMS to obtain a wafer 23 as shown in FIG. 1 (c). According to this thermal CVD method,
Since the copper thin film is formed in the reaction-controlled state, the copper thin film conformally grows and the surface of the wafer 23 becomes flat.

Next, the wafer 23 is carried into the etch-back chamber 36, the substrate temperature is set to 130 ° C., and Cu ⁺² (HFA) ₂ , which is a positive divalent copper organic complex gas, and an electron donating medium. a sexual ligand gas _{Si (Me) 3 C≡CSi (Me} ) 3
Introduce mixed gas with
When the pressure of a is maintained, the above (6)
The reverse reaction of the CVD film formation occurs according to the same principle as the formula, and the copper atom Cu ^{0 on the} surface of the copper thin film 6 is Cu ⁺¹ (HFA) Si (Me) ₃ C≡ which is a positive monovalent copper organic complex. Converted to CSi (Me) ₃ . At this time, in the experimental field, the volume ratio of the positive divalent copper organic complex gas to the electron-donating neutral ligand gas is not the ratio (1: 2) of the above formula (6), but the electron ratio. The donor neutral ligand was supplied in an excess amount.

Since the positive monovalent copper organic complex has a high vapor pressure and is easily removed by evacuation, Cu ⁰ metal is C
The copper thin film 6 is continuously converted into the organic complex of u ⁺¹ and the etching of the copper thin film 6 gradually progresses, leaving the copper thin film wiring 6 ′ in the groove 4 and removing the copper film 6 ′ on the surface of the insulating film 3 other than the groove 4. Etchback can be performed to expose the barrier layer 5.

Since it is difficult to stop the etching of the copper thin film 6 by just etching, when overetching is performed, as shown in the wafer 24 of FIG.
The height of the surface of the copper thin film wiring 6 ′ left inside was lower than the height of the surface of the insulating film 3.

Even when this over-etching is performed, the barrier layer 5 is not etched by the mixed gas of the positive divalent copper organic complex gas and the electron-donating neutral ligand gas,
Since the selectivity is so large that it can be said to be infinite, the exposed barrier layer 5 and the barrier layer 5 in the groove 4 are not eroded. The etching rate at this time is 6
It was 0 nm / min.

After completion of this etch back, the wafer 2
4 is again carried into the barrier layer film forming chamber 34, and FIG.
As shown in, a protective film 7 made of a TiN thin film was conformally formed under the same film forming conditions as the barrier layer 5 to obtain a wafer 25.

Then, the wafer 25 is loaded into the dry etching chamber 33, and argon gas is used as carrier gas and C.
The protective film 7 and the barrier layer 5 were etched in this order by supplying F ₄ gas as an etching gas to the surface of the wafer 25.

At this time, since the height of the surface of the copper thin film wiring 6'is lower than the height of the surface of the insulating film 3, the insulating film 3
Only the protective film 7 and the barrier layer 5 on the surface are removed,
A cap layer 7 ′ composed of the protective film 7 is left on the copper thin film wiring 6 ′. In addition, an underlying barrier layer 5 ′ composed of the barrier layer 5 is left around and around the copper thin film wiring 6 ′. Thus, a copper wiring 9 in which the copper wiring 6'is encapsulated by the underlying barrier layer 5'and the cap layer 7'was obtained.

When the copper wiring 9 is formed in this manner, the width of the copper wiring 9 and the width of the groove are the same, so that if the groove 4 is miniaturized, the copper wiring 9 can also be miniaturized. In addition, since plasma is not used to form the copper thin film wiring 6 ′,
No damage to the copper wiring or wafer,
Furthermore, since the etching back process of the copper thin film can be performed at a low temperature,
The above embodiment can also be applied to multilayer wiring. Furthermore, it is possible to perform processing in a clean atmosphere without performing wet etching, and since the copper wiring is encapsulated, it is resistant to corrosion, and the yield and reliability are high.

Next, another embodiment of the present invention will be described. Referring to FIG. 4, reference numeral 40 denotes a semiconductor manufacturing apparatus according to an embodiment of the present invention, which processes a wafer similar to the wafer 21 in a consistent vacuum atmosphere to form a copper wiring. The manufacturing apparatus 40 will be described together with another embodiment of the method of the present invention.

The semiconductor manufacturing apparatus 40 has a substrate transfer chamber 41 in which a substrate transfer robot 49 is arranged. With the substrate transfer chamber 41 as the center, a cassette chamber 42, a barrier layer deposition chamber 44, and a copper thin film. Film forming chamber 45, etch back chamber 46
Are arranged in this order in the counterclockwise direction in the drawing, and each chamber is placed in a high vacuum state by a vacuum pump (not shown).

The wafer 31 shown in FIG. 3A is similar to the wafer 21 in that it has a substrate 12 made of a silicon single crystal.
It has an insulating film 13 made of a silicon oxide film with a film thickness of 1 μm formed thereon, and the insulating film 13 has a width of 0.35
A plurality of grooves 14 each having a thickness of 0.7 μm and a depth of 0.7 μm are provided.

The wafer 31 is placed in the cassette chamber 42, evacuated, and then transferred to the barrier layer film forming chamber 44 by the substrate transfer robot 39.

In the barrier layer film forming chamber 44, a TiN target is arranged at a distance of 300 mm from the loaded wafer, and an argon gas is introduced into the barrier layer film forming chamber 44 to make it more than usual. An order of magnitude lower, 0.35 × 10
When the TiN target was sputtered at a pressure of ⁻² Pa, as shown in FIG.
The barrier layer 15 made of a TiN thin film having a thickness of Å was formed in the groove 14 with good coverage, and the wafer 32 was obtained.

The wafer 32 is placed in the copper thin film forming chamber 45.
CV under the same film forming conditions as the copper thin film forming chamber 35.
By the D reaction, a copper thin film 16 was conformally grown on the barrier layer 15 to form a wafer 33 having a flat surface as shown in FIG. 3 (c).

Then, the wafer 33 is transferred to the etch-back chamber 46, and at a substrate temperature of 130 ° C., Cu ⁺² (HFA) ₂ which is a positive divalent copper organic complex gas and an electron-donating neutral coordination are formed. Excessive Si (Me) ₃ C≡CSi (M
e) A mixed gas with ₃ gas is introduced, the pressure is kept at 100 Pa, Cu ⁰ on the surface of the copper thin film 16 is converted and removed into a positive monovalent copper organic complex, and as shown in FIG. The groove 14
A wafer 34 in which the copper thin film wiring 16 'was left only inside was obtained.

The wafer 34 is placed in the barrier layer deposition chamber 44.
Then, the TiN target was sputtered again under the same conditions as the film forming conditions of the barrier layer 15,
As shown in FIG. 3E, a protective film 17 made of a TiN thin film was formed on the surface of the wafer 34 with good coverage, and a wafer 35 was obtained.

The wafer 35 is taken out of the cassette chamber 42 and, as shown in FIG. 3 (f), the copper wiring thin film 16 'is formed.
The resist film 1 is formed so that the upper protective film 17 is not removed.
8 is provided and dry etching is performed to form the barrier layer 15
And the unnecessary portion of the protective film 17 is removed to remove the underlying barrier layer 1.
5'and a cap layer 17 'were formed to obtain a copper wiring 19 in which the copper thin film wiring 16' in the groove 14 was encapsulated.
At this time, if the portions other than the groove 14 are protected by a resist film, the underlying barrier layer 15 'and the cap layer 17' can be formed in a desired region.

The barrier layer 5 and the cap layer 7 are
When the TiN thin film used in
Ti (NEt ₂ ) ₄ may be used instead of Me ₂ ) ₄ or N 2
H ₃ hydrazine in place of the gas (N ₂ H ₄₎ gas and methyl hydrazine (N ₂ H ₃ CH ₃₎ or with a gas, further, TiCl ₄
It is also possible to use / NH ₃ -based source gas or other Ti-containing organometallic gas as the source gas.

The thin films that can be used for the barrier layers 5 and 15 and the protective films 7 and 17 are not limited to TiN thin films, but may be refractory metals such as TiW, Ta, Mo, and W, or high melting point metals. Any thin film that is a melting point metal compound and can be easily removed by dry etching can be applied to the present invention.

When the copper thin film is converted into a positive monovalent copper organic complex and etched back, the substrate temperature is set to 1 in each of the above embodiments.
Although kept at 30 ° C., etchback is possible in the temperature range of 70 ° C. to 200 ° C. However, the etching rate becomes low on the low temperature side, and the generated positive monovalent organic complex is redissolved on the high temperature side to regenerate Cu ⁰ , resulting in a decrease in the etching rate. As far as experimentally confirmed, it is desirable to keep the substrate temperature in the range of 120 ° C to 160 ° C.

Further, when the copper thin film is etched back, 1
Although the pressure is set to 00 Pa, a pressure range of 10 Pa to 200 Pa can be used. However, since the pressure value at this time is equivalent to the dry etching gas concentration, when the pressure is low, the reaction rate becomes slow, and when it is high, the etching in the peripheral portion proceeds too much and the etching distribution in the wafer surface deteriorates. In the range confirmed experimentally, 50 Pa to 1
It is considered that 50 Pa is a pressure range suitable for practical use.

In this embodiment, no carrier gas was used for etching back the copper thin film. However, when etching back the copper thin film on the surface of a large area wafer, a positive divalent copper organic complex gas and an electron were used. In order to improve the in-plane etching distribution, it is preferable to use an argon gas or a mixed gas of H ₂ gas added to an argon gas as a carrier gas in addition to the donor neutral ligand gas.

[0075]

According to the present invention, plasma does not have to be used for etching back a copper thin film, and since it can be performed at a low temperature, it does not damage the device. In addition, since the selectivity between the copper thin film and the underlying barrier layer at the time of this etching back is very large, the barrier layer in the groove is not etched.

Further, according to the present invention, since the treatment is carried out in a reduced pressure atmosphere and the wet treatment is not required, the yield and reliability are improved, and the process is simplified, so that the throughput is improved.

[Brief description of drawings]

FIG. 1 is a process chart for explaining an embodiment of the method of the present invention.

FIG. 2 shows an example of a semiconductor manufacturing apparatus that can be used to carry out the method.

FIG. 3 is a process chart for explaining another embodiment of the method of the present invention.

FIG. 4 is an example of a semiconductor manufacturing apparatus that can be used for implementing the method.

FIG. 5 is a process drawing for explaining the CMP method.

[Explanation of symbols]

2, 12 ... Substrate 4, 14 ... Grooves 3, 13 ...
... Insulating film 5, 15 ... Barrier layer 6, 16 ... Copper thin film 9,
19 ... Copper wiring 7 ', 17' ... Cap layer 34, 44, ... Barrier layer deposition chamber 35, 45 ..
Copper thin film deposition chamber 36,46 ... Etch back chamber 31,41 ..
Substrate transfer chamber 39, 49 ... Substrate transfer robot 30, 40 ...
Copper wiring manufacturing equipment

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Reference number within the agency FI Technical indication location H01L 21/88 M (72) Inventor Makoto Murata 2500 Hagien, Chigasaki City, Kanagawa Japan Vacuum Technology Co., Ltd. (72) Inventor Liu Jinken, 2500 Hagien, Chigasaki City, Kanagawa Prefecture, Japan Vacuum Technology Co., Ltd.

Claims (5)

[Claims] 1. A barrier layer forming step of forming a barrier layer on the surface of an insulating film formed on a substrate and provided with a groove, and a copper thin film is formed on the surface of the barrier layer to form an inside of the groove. A copper filling step of filling with copper, removing the copper thin film leaving copper filled in the groove,
And a wiring forming step of forming a copper wiring in the groove, wherein the wiring forming step comprises a positive divalent copper organic complex gas and an electron-donating neutral catalyst on the surface of the copper thin film. A method of manufacturing a copper wiring, comprising an etchback step of supplying a halogen gas and removing the copper thin film into a positive monovalent copper organic complex. 2. The copper wiring manufacturing method according to claim 1, wherein the wiring forming step includes a cap layer forming step of forming a cap layer on the copper surface left in the groove. 3. An insulating film formed on a substrate, a groove formed in the insulating film, a barrier layer formed in the groove, and a inside of the groove formed on the barrier layer. In a semiconductor device having a copper thin film formed by filling, a copper thin film outside the groove of the copper thin film is positively charged by a positive divalent copper organic complex gas and an electron-donating neutral ligand gas. A semiconductor device, wherein copper wiring is formed in the groove after being converted and removed into a valent copper organic complex. 4. A semiconductor device according to claim 3, wherein a cap layer is provided on the copper wiring. 5. A barrier layer deposition chamber for depositing a barrier layer, a copper thin film deposition chamber for depositing a copper thin film, and an etchback chamber for removing the copper thin film, each chamber being a substrate. In a copper wiring manufacturing apparatus arranged around a substrate transfer chamber in which a transfer robot is placed, each chamber is evacuated, and when the substrate is transferred by the substrate transfer robot and processed in each chamber, the substrate is in the atmosphere. The etchback chamber supplies a positive divalent copper organic complex gas and an electron-donating neutral ligand gas to the surface of the copper thin film formed on the substrate. An apparatus for producing copper wiring, wherein the copper thin film is formed into a positive monovalent copper organic complex, and an unnecessary portion of the copper thin film on the substrate surface is uniformly removed.