JPH08221049A - Character framing device for 'karaoke' - Google Patents

Abstract

PURPOSE: To provide a character framing device for 'KARAOKE' apable of eliminating the necessity having the data for framing a character and reducing memory capacity such as a RAM, etc., in the character framing device for framing the character displayed on a picture. CONSTITUTION: The dot data of the line of the effective character data, the under line from the line and the upper line from the line are read out from a video RAM 5 in order of that by an address counter 11. An OR circuit 6 makes outputs of dot information of the effective character data of one line, the dot information prior one and the dot information behind one and an output of a framing data generation latch circuit 7 inputs. The dot of the line of the effective character data is latched to the latch circuit 8 for the character data. Synchronism is taken by a dot clock, and the latch contents of the latch circuits 7, 8 are transferred to shift registers 9, 10 for the character data and framing. Thus, the framing data corresponding to the dot of the character data are formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a karaoke system, and more particularly to a karaoke character edging device for edging characters displayed on the screen of a karaoke device.

[0002]

2. Description of the Related Art In recent years, karaoke has become popular and karaoke devices have become widespread. On the CRT screen of the karaoke device, lyrics are displayed as telops according to accompaniment. Because the lyrics on this screen are inconspicuous with ordinary characters, shadows and edging are performed to decorate the characters. Also,
When characters of the same color as the background screen are used, edging is performed in order to avoid making it difficult to read because the characters are stuck in the background.

[0003]

In the past, when edging a character, the edging function was realized by software, so that in addition to the character data, data for edging had to be held in advance. Therefore, there is a disadvantage that a large amount of data accompanies the character data and a large amount of memory must be used. SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned drawbacks and to provide a karaoke character edging device which can eliminate the need for having data for character edging and can reduce the capacity of a memory such as a RAM.

[0004]

In order to achieve the above object, a character edging device for karaoke according to the present invention is a character edging device for edging characters displayed on a screen, and a video storing character data. A RAM, an address counter for generating an address of a line of valid character data, an address of a line one line below the line of valid character data, and an address of a line one line above the line of valid character data; By the output of the address counter, the line is read from the video RAM in 1-line units,
For every dot on one line, one dot before and one dot after that dot are consecutive 3
An OR circuit group that receives one dot information and the output of the edging data generation latch circuit, a edging data generation latch circuit group that latches each output of the OR circuit group, and the edging data generation latch circuit group A sigma shift register for outputting the output of the above to serially by a dot clock and outputting edging data for dots of valid character data, and a character data latch circuit group for latching the valid character data read from the video RAM. The output of the character data latch circuit group is composed of a character data shift register for outputting dot information of valid character data by serially outputting the output by a dot clock, and is placed outside the dots forming the outermost contour of the displayed character. It is configured to form edging data.

[0005]

According to the above construction, it is not necessary to store the edging data in the memory corresponding to the character data, and the edging data can be obtained at the time of display.

[0006]

The present invention will be described in more detail with reference to the drawings. FIG. 1A is a diagram showing an example of a character composed of 16 dots × 16 dots. This character is formed only by character data and is not bordered. FIG. 1B shows an example of the edging character 2, and the edging portion 2a is formed outside the outermost portion of the character portion 2b. Conventionally, the data of the border portion 2a has been stored in the memory.

FIG. 2 is a diagram for explaining a portion to be bordered on the character data. b ₀ , b ₁ , b ₂ ...
Corresponds to dots in the horizontal direction, and a ₀ , a ₁ , and a ₂ correspond to dots in the vertical direction. In this example, b ₅ a ₃ , b
₅ a _4, b ₆ a include ₃ and b ₆ a ₄ dots valid _{data, b 4 a 2, b 4} a 3, b 4 a 4, b 4 a 5,
b ₅ a ₂ , b ₅ a ₅ , b ₆ a ₂ , b ₆ a ₅ , b ₇ a ₂ ,
The dot portions of b ₇ a ₃ , b ₇ a ₄ and b ₇ a ₅ are the portion 4 to be bordered. When the effective data line is a ₃ and the character data dot of b ₅ a ₃ is the center,
An example in which one point is on the right and one point is on the left is shown in (b).

FIG. 3 is a circuit block diagram showing an embodiment of the karaoke character edging device according to the present invention. This embodiment is an example of creating edging data of characters composed of 16 dots × 16 dots, and 1 is stored in the video RAM 5.
Character data of 6 dots × 16 dots is stored.
The address counter 11 generates an address of a line one line below and an address of a line one line above the line to be read.

Therefore, 16-dot data of a line having valid character data is read out as parallel data from the video RAM 5, and then 16-dot data of a line one line below the line is further read. The data for 16 dots on the line immediately above is read as parallel data. This read operation is repeated in the vertical direction.

16 of valid character data read first
The dot data is input to each of the 16 OR circuits 6a, 6b ... Each OR circuit receives the information of the dots before and after (dots on the right and left) centering on each dot data and the output of the corresponding edging data generation latch circuits 7a, 7b ... Or inputs. There is no dot data on the right side for the data of the first dot of the line,
Further, since there is no dot data on the left side of the dot at the end of the line, the inputs of the first OR circuit 6a and the 16th OR circuit 6p are the edging data generation latch circuit 7
There are 3 inputs including the outputs of a and 7p.

The next lower line and the next higher line to be read next are similarly input to the OR circuit 6. The output of each OR circuit is latched by the edging data generation latch circuits 7a, 7b, ... On the other hand, the character data latch circuits 8a and 8b
... latches each dot of valid character data of the first read line. The latch outputs of the edging data generation latch circuits 7a, 7b, ... Are synchronized with the dot clock and are sequentially transferred to the edging shift register 9. The edging shift register 9 outputs edging data dot by dot. Latch circuit 8 for character data
Similarly, the latch outputs a, 8b, ... Are also synchronized by the dot clock, and the character data shift register 1
Is transferred to 0. Character data is output from the character data shift register 10 dot by dot.

FIG. 4 is a timing chart for explaining the operation of the circuit of FIG. This example focuses on the character data dot of b ₅ a ₃ as shown in FIG. 2B, and shows the case where the edging data is formed at the positions of b ₅ a ₂ and b ₄ a ₃ with respect to this dot. It is a thing. Based on this example, it is assumed that the OR circuit to which the dot data is input is 6x, the edging data generation latch circuit is 7x, and the character data latch circuit is 8x. to line a _3, address 0, then +1 address, further address -1 is read is specified, the input and the right input of the center of the OR circuit 6x is "1", the left "0" is input to the input. "1" is latched in the edging data generation latch circuit 7x corresponding to the OR circuit 6x.
At this time, "1" is latched in the character data latch circuit 8x.

The "1" of the edging data generation latch circuit 7x synchronized with the dot clock is stored in the edging shift register 9 and the "1" of the character data latch circuit 8x.
Is transferred to the character data shift register 10. Next, the same applies to the line a _{4 and} the line a ₂ . As a result, b ₅ a ₃ dots "1" is output from the shift register 10 for character data (Fig. 4). The edging data is output from the edging shift register 9 as shown in FIG. 4 corresponding to the dots of b ₅ a ₃ .
In the waveform of FIG. 4, the edging data “1” is output at the upper dot position (b ₅ a ₂ ) and the left dot position (b ₄ a ₃ ) with respect to the b ₅ a ₃ dot.

In the above embodiment, an example in which the character structure is 16 dots × 16 dots has been described, but the same applies to 32 dots × 32 dots and other numbers of dots. In this case, the number of OR circuits, the border data generation circuit, and the character data latch circuit is the same as the number of dots in the horizontal direction.

[0015]

As described above, according to the present invention, the video RAM for storing character data, the address of the line of valid character data, the address of the line immediately below the line of valid character data, and the valid line Line 1 of character data
1 from the video RAM by the output of the address counter and the address counter that generates the address of the next higher line
Reads line by line, and inputs, for each dot on each line, three consecutive dot information, one dot ahead and one dot after that dot, and the output of the edging data generation latch circuit. OR circuit group
A edging data generation latch circuit group for latching each output of the OR circuit group, and an edging operation for outputting the output of the edging data generation latch circuit group to a series by a dot clock to output the edging data for a valid character data dot Shift register, character data latch circuit group for latching valid character data read from the video RAM, and output of the character data latch circuit group are serially output by the dot clock to output valid character data dot information. And a shift register for character data, which forms data for edging outside the dots forming the outermost contour of the displayed character. Therefore, it is not necessary to store the data for edging in the memory, and the memory can be saved.

[Brief description of drawings]

FIG. 1 is a diagram illustrating an example of a character that is trimmed from a normal character.

FIG. 2 is a diagram for explaining a portion to be bordered on character data.

FIG. 3 is a circuit block diagram showing an embodiment of a character edging device for karaoke according to the present invention.

FIG. 4 is a timing chart for explaining the operation of the circuit of FIG.

[Explanation of symbols]

 1 ... Character 2 ... Bordering character 2a ... Bordering part 2b ... Character part 3 ... Valid character data 4 ... Bordering part 5 ... Video RAM 6 ... OR circuit group 6a, 6b ...... OR circuit 7 ... Bordering data Generation Latch Circuit Group 7a, 7b ...... Bordering Data Generation Latch Circuit 8 ... Character Data Latch Circuit Group 8a, 8b .... Character Data Latch Circuit 9 ... Bordering Shift Register 10 ... Character Data Shift Register 11 ... Video RAM address counter

Claims (1)

[Claims] 1. A character edging device for edging a character displayed on a screen, comprising a video RAM for storing character data, an address of a line of valid character data, and a line of the valid character data. An address counter for generating the address of the line below and the address of the line one above the line of valid character data, and reading from the video RAM in 1-line units by the output of the address counter. An OR circuit group that receives, for each of the dots, three pieces of dot information in which one dot before and one dot after the dot are continuous and the output of the edging data generation latch circuit are input, and the OR circuit. A group of edging data generation latch circuits for latching each output of the group, and an output of the edging data generation latch circuit group. A shift register for edging, which outputs edging data to the dots of valid character data by a dot clock, and a latch circuit group for character data which latches valid character data read from the video RAM; It consists of a shift register for character data that outputs the output of the data latch circuit group to the series with a dot clock and outputs the dot information of valid character data, and has a border on the outside of the dots forming the outermost contour of the displayed character. A character edging device for karaoke characterized by forming data to be performed.