JPH08203712A - Terminating device - Google Patents

Terminating device

Info

Publication number
JPH08203712A
JPH08203712A JP7009134A JP913495A JPH08203712A JP H08203712 A JPH08203712 A JP H08203712A JP 7009134 A JP7009134 A JP 7009134A JP 913495 A JP913495 A JP 913495A JP H08203712 A JPH08203712 A JP H08203712A
Authority
JP
Japan
Prior art keywords
capacitor
signal
terminating device
electrode
electrode layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP7009134A
Other languages
Japanese (ja)
Inventor
Masaaki Ishizuka
正明 石塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Engineering Ltd
Original Assignee
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Engineering Ltd filed Critical NEC Engineering Ltd
Priority to JP7009134A priority Critical patent/JPH08203712A/en
Publication of JPH08203712A publication Critical patent/JPH08203712A/en
Withdrawn legal-status Critical Current

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  • Logic Circuits (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE: To reduce the size, attain higher density and cut down the cost for design, manufacture and components of a terminating device. CONSTITUTION: A ceramic board 20 is used as a capacitor where an electrode layer 21 is formed thereon. Terminating resistors 221 to 223 are installed on the layer 21, thereby forming terminals 231 to 233 respectively. Since this device is in laminated structure, there is no need for through holes or contacts for connection between elements, which makes it possible to simplify the manufacture, reduce the size and attain higher density as well. Due to a monolithic structure, this construction eliminates the need for a printed board wiring between components and enables a signal to be terminated with a good condition (directly near an input terminal of the next stage IC).

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は信号終端用デバイスに関
し、特にECL(エミッタカップルドロジック)回路の
信号終端に使用される信号終端用デバイスに関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal terminating device, and more particularly to a signal terminating device used for terminating a signal in an ECL (emitter coupled logic) circuit.

【0002】[0002]

【従来の技術】ECL信号の終端のためには抵抗素子が
用いられるが、ノイズ軽減のためコンデンサと併用する
ことにより、ECL信号の終端回路が構成される。この
様なECL信号終端用デバイスにおいては、信号線1本
に対して1個の抵抗と1個のコンデンサとを準備し、E
CL回路の信号終端が必要な箇所にこの1個の抵抗と1
個のコンデンサからなる信号終端用デバイスを夫々設け
ている。
2. Description of the Related Art Although a resistance element is used for terminating an ECL signal, an ECL signal terminating circuit is formed by using it together with a capacitor for noise reduction. In such an ECL signal terminating device, one resistor and one capacitor are prepared for each signal line, and E
This resistor and 1 at the place where the signal termination of the CL circuit is necessary.
A signal terminating device consisting of individual capacitors is provided for each.

【0003】この様な構成において、プリント基板に回
路を実現する場合、高密度実装及び小型化をなすことは
困難であり、また、実装スペースの問題から終端抵抗の
好条件での実装(信号入力端子の直近での終端)が困難
である。
In such a structure, when a circuit is realized on a printed circuit board, it is difficult to achieve high-density mounting and downsizing, and because of a mounting space problem, mounting under a favorable condition of the terminating resistor (signal input). It is difficult to terminate the terminal immediately.

【0004】この様な問題を解決する例として、実開昭
60−121636号公報には、図3,4に示す様な信
号終端用デバイスが開示されている。本デバイス1は、
セラミック基板2の表面両側にパターン3を形成すると
共に、このセラミック基板2内にコンデンサ4を形成し
てなるものである。
As an example for solving such a problem, Japanese Utility Model Laid-Open No. 60-121636 discloses a signal terminating device as shown in FIGS. This device 1
The pattern 3 is formed on both sides of the surface of the ceramic substrate 2, and the capacitor 4 is formed in the ceramic substrate 2.

【0005】パターン3はグランド用電極5と、電源用
電極6と、この電極6に抵抗体71,72,……を介し
て接続される端子取付けパッド81,82,……とから
なっている。
The pattern 3 comprises a ground electrode 5, a power supply electrode 6, and terminal mounting pads 81, 82, ... Connected to the electrode 6 via resistors 71, 72, .... .

【0006】コンデンサ4は、所定間隔を介して交互に
配置された電極9,10よりなり、一方の電極9はブラ
インドスルーホール11を介してグランド用電極5に接
続され、他方の電極10は同じくブラインドスルーホー
ル12を介して電源用電極6に接続されている。
The capacitor 4 is composed of electrodes 9 and 10 which are alternately arranged at a predetermined interval. One electrode 9 is connected to a ground electrode 5 through a blind through hole 11 and the other electrode 10 is the same. It is connected to the power supply electrode 6 through the blind through hole 12.

【0007】図4に図3のデバイスの等価回路を示して
いる。この様に、終端用デバイス1は内部にコンデンサ
を有し、表面には抵抗を形成することで、小型化、高密
度化された構造とすることが可能になる。
FIG. 4 shows an equivalent circuit of the device shown in FIG. In this way, the terminating device 1 has the capacitor inside and the resistor is formed on the surface, so that it is possible to make the structure compact and high-density.

【0008】[0008]

【発明が解決しようとする課題】図3,4に示した従来
の信号終端用デバイス1においては、コンデンサ4の各
電極9,10と抵抗71,72,……やアース端子5及
び電源端子6との接続は、ブラインドスルーホール1
1,12を介して行う必要があり、装置の製造工程が複
雑化してかなり高密度化、小型化を妨げる要因となると
いう欠点がある。
In the conventional signal terminating device 1 shown in FIGS. 3 and 4, the electrodes 9 and 10 of the capacitor 4 and the resistors 71, 72, ..., The ground terminal 5 and the power supply terminal 6 are provided. Blind through hole 1
However, there is a drawback in that the manufacturing process of the device is complicated and the density of the device is considerably increased, which hinders miniaturization.

【0009】本発明の目的は、製造が極めて簡単でかつ
小型、高密度化を可能とした信号終端用デバイスを提供
することである。
An object of the present invention is to provide a signal terminating device which is extremely simple to manufacture, which can be miniaturized and have a high density.

【0010】[0010]

【課題を解決するための手段】本発明による信号終端デ
バイスは、誘電体基板と、この誘電体基板の一主表面上
に形成されたコンデンサ用の第1の電極層と、この第1
の電極層上に形成された複数の抵抗体とを有し、これ等
抵抗体の各々を複数の信号線の終端抵抗素子として使用
するようにしたことを特徴とする。
A signal terminating device according to the present invention includes a dielectric substrate, a first electrode layer for a capacitor formed on one main surface of the dielectric substrate, and a first electrode layer for the capacitor.
And a plurality of resistors formed on the electrode layer, and each of these resistors is used as a termination resistance element of a plurality of signal lines.

【0011】[0011]

【作用】誘電体基板をコンデンサとして利用し、この基
板の一主表面上にコンデンサ電極層を形成し、その上に
複数の終端抵抗素子を形成してなるものであり、こうす
ることにより、極めて簡単な構成で信号終端用デバイス
が実現できる。
A dielectric substrate is used as a capacitor, a capacitor electrode layer is formed on one main surface of the substrate, and a plurality of terminating resistance elements are formed on the capacitor electrode layer. A signal termination device can be realized with a simple configuration.

【0012】[0012]

【実施例】以下、本発明の実施例について図面を用いて
詳述する。
Embodiments of the present invention will be described in detail below with reference to the drawings.

【0013】図1は本発明の実施例の断面図及びその等
価回路図である。図1を参照すると、誘電体のセラミッ
ク基板20の一主表面上にコンデンサの電極となる導電
層を被着形成し、この導電層21上に複数の終端抵抗素
子221,222,223,……を選択的に形成する。
更に各抵抗素子221,222,223,……の直上に
端子231,232,233,……を夫々形成する。
FIG. 1 is a sectional view of an embodiment of the present invention and its equivalent circuit diagram. Referring to FIG. 1, a conductive layer serving as an electrode of a capacitor is formed on one main surface of a dielectric ceramic substrate 20, and a plurality of termination resistance elements 221, 222, 223, ... Are formed on the conductive layer 21. Are selectively formed.
Further, terminals 231, 232, 233, ... Are formed directly above the respective resistance elements 221, 222, 223 ,.

【0014】コンデンサ用の電極層21はセラミック基
板20の左端において、端子24を導出可能な構造とさ
れている。また、コンデンサ用の他方の電極としてセラ
ミック基板20の右端において端子25が付着形成され
ている。
The electrode layer 21 for the capacitor has a structure in which the terminal 24 can be led out at the left end of the ceramic substrate 20. A terminal 25 is attached and formed on the right end of the ceramic substrate 20 as the other electrode for the capacitor.

【0015】図2に図1の構成による信号終端用デバイ
スの等価回路が示されており、各抵抗素子221,22
2,223,……の各一端231,232,233,…
…は図示せぬECL回路の各信号線へ夫々接続されてお
り、各抵抗素子の共通接続端子(コンデンサの上部電極
でもある)24は回路電源(V)へ接続されている。そ
して、コンデンサCの他方の電極端子25は接地(GN
D)されることにより、高周波ノイズの軽減を図る様に
なっている。
FIG. 2 shows an equivalent circuit of the signal terminating device having the configuration of FIG.
2, 223, ... One end 231, 232, 233, ...
Are connected to respective signal lines of an ECL circuit (not shown), and a common connection terminal (also an upper electrode of the capacitor) 24 of each resistance element is connected to a circuit power supply (V). The other electrode terminal 25 of the capacitor C is grounded (GN
By performing D), high frequency noise is reduced.

【0016】尚、コンデンサCの他方の電極25は、誘
電体基板20の他主表面(上部電極層21の形成面とは
反対の面)に被着形成されても良く、また誘電体基板2
0の材料はセラミックに限定されることなく、他の誘電
材料を用いることができる。
The other electrode 25 of the capacitor C may be adhered and formed on the other main surface of the dielectric substrate 20 (the surface opposite to the surface on which the upper electrode layer 21 is formed).
The material of 0 is not limited to ceramic, but other dielectric materials can be used.

【0017】[0017]

【発明の効果】以上述べた様に、本発明によれば、コン
デンサと抵抗体とを一体で構成されているために、実装
スペースが削減され高密度実装が可能となると共に、プ
リント基板の配線設計等の設計コスト、製造や部品コス
トの削減が可能となるという効果がある。
As described above, according to the present invention, since the capacitor and the resistor are integrally formed, the mounting space is reduced, high density mounting is possible, and the wiring of the printed circuit board is provided. There is an effect that it is possible to reduce design costs such as design, manufacturing and component costs.

【0018】また、コンデンサと抵抗との一体形成によ
り、部品間の配線がなくなり、好条件(次段集積回路の
入力端直近)での信号終端が可能となる。
Further, since the capacitor and the resistor are integrally formed, wiring between the parts is eliminated, and the signal can be terminated under favorable conditions (close to the input end of the next-stage integrated circuit).

【0019】更に、各材料を積層構造とするようにした
ので、素子間接続のためのスルーホールやブラインドス
ルーホール等を使用することなく、信号終端用デバイス
が形成できるものである。
Further, since each material has a laminated structure, the signal terminating device can be formed without using through holes or blind through holes for connecting elements.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例の断面図である。FIG. 1 is a sectional view of an embodiment of the present invention.

【図2】図1の等価回路図である。FIG. 2 is an equivalent circuit diagram of FIG.

【図3】従来の信号終端用デバイスの一例を示す斜視図
である。
FIG. 3 is a perspective view showing an example of a conventional signal terminating device.

【図4】図3のデバイスの等価回路図である。FIG. 4 is an equivalent circuit diagram of the device of FIG.

【符号の説明】[Explanation of symbols]

20 セラミック基板 21 電極層 24,25 端子 221〜223 抵抗素子 231〜233 抵抗端子 20 ceramic substrate 21 electrode layers 24 and 25 terminals 221 to 223 resistance element 231 to 233 resistance terminal

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H03K 19/086 // H03K 19/0175 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification number Office reference number FI technical display location H03K 19/086 // H03K 19/0175

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 誘電体基板と、この誘電体基板の一主表
面上に形成されたコンデンサ用の第1の電極層と、この
第1の電極層上に形成された複数の抵抗体とを有し、こ
れ等抵抗体の各々を複数の信号線の終端抵抗素子として
使用するようにしたことを特徴とする信号終端用デバイ
ス。
1. A dielectric substrate, a first electrode layer for a capacitor formed on one main surface of the dielectric substrate, and a plurality of resistors formed on the first electrode layer. A signal terminating device, characterized in that each of these resistors is used as a terminating resistor element for a plurality of signal lines.
【請求項2】 前記誘電体基板にはコンデンサ用の第2
の電極が設けられており、この第2の電極は基準電位点
に接続されていることを特徴とする請求項1記載の信号
終端用デバイス。
2. A second capacitor for capacitor is provided on the dielectric substrate.
2. The signal terminating device according to claim 1, wherein the second electrode is connected to a reference potential point.
【請求項3】 ECL(エミッタカップルドロジック)
回路の信号終端に使用されることを特徴とする請求項1
または2記載の信号終端用デバイス。
3. ECL (Emitter Coupled Logic)
Use as a signal termination of a circuit.
Alternatively, the signal terminating device described in 2.
JP7009134A 1995-01-24 1995-01-24 Terminating device Withdrawn JPH08203712A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7009134A JPH08203712A (en) 1995-01-24 1995-01-24 Terminating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7009134A JPH08203712A (en) 1995-01-24 1995-01-24 Terminating device

Publications (1)

Publication Number Publication Date
JPH08203712A true JPH08203712A (en) 1996-08-09

Family

ID=11712163

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7009134A Withdrawn JPH08203712A (en) 1995-01-24 1995-01-24 Terminating device

Country Status (1)

Country Link
JP (1) JPH08203712A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004096351A (en) * 2002-08-30 2004-03-25 Canon Inc Terminating circuit for differential signal transmission line
JP2004153626A (en) * 2002-10-31 2004-05-27 Canon Inc Center tap terminating circuit, and printed circuit board therewith

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004096351A (en) * 2002-08-30 2004-03-25 Canon Inc Terminating circuit for differential signal transmission line
JP2004153626A (en) * 2002-10-31 2004-05-27 Canon Inc Center tap terminating circuit, and printed circuit board therewith

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20020402