JPH0555013A - Chip-shaped resistance attenuator - Google Patents

Chip-shaped resistance attenuator

Info

Publication number
JPH0555013A
JPH0555013A JP3217674A JP21767491A JPH0555013A JP H0555013 A JPH0555013 A JP H0555013A JP 3217674 A JP3217674 A JP 3217674A JP 21767491 A JP21767491 A JP 21767491A JP H0555013 A JPH0555013 A JP H0555013A
Authority
JP
Japan
Prior art keywords
terminal
attenuator
chip
electrodes
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3217674A
Other languages
Japanese (ja)
Inventor
Takanobu Gidou
孝信 儀同
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3217674A priority Critical patent/JPH0555013A/en
Publication of JPH0555013A publication Critical patent/JPH0555013A/en
Pending legal-status Critical Current

Links

Landscapes

  • Non-Adjustable Resistors (AREA)
  • Attenuators (AREA)
  • Details Of Resistors (AREA)

Abstract

PURPOSE:To obtain an attenuator by a structure wherein electrodes are used as terminals for input use, for output use and for grounding use and the attenuator is formed on one board. CONSTITUTION:Resistors 2 are vapor-deposited and formed to be pi-shaped on a printed-circuit board 1 composed of a ceramic or the like; in addition, electrodes 3A, 3B, 3C for input use, for output use and for grounding use are formed. The electrodes 3A, 3B for terminal use are used as an input terminal and an output terminal, and the electrode 3C for terminal use is used as a grounding terminal. Their shapes are the same shapes as those of terminals of resistances for chip use. As a result, when they are connected to other circuits, leads are not required especially, and a lead inductance, a stray capacitance and the like are not generated. As a result, it is possible to obtain an attenuator wheat high-frequency characteristic is very good. Thereby, it is possible to realize a high-frequency attenuation characteristic in which the stray capacitance and the inductance caused by a lead or an electrode part on a printed-circuit board are small and which is close to an ideal value.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はチップ型抵抗減衰器に関
し、特に高周波帯域用電気部品としてプリント基板上に
形成されるチップ型抵抗減衰器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip resistance attenuator, and more particularly to a chip resistance attenuator formed on a printed circuit board as an electric component for high frequency band.

【0002】[0002]

【従来の技術】従来プリント基板での高周波帯域用の抵
抗減衰器としては、図2に示すように複数のチップ抵抗
5を組み合わせて、ランドパターン6およびスルーホー
ル7でプリント基板4上にパイ形又はT形に形成してい
た。ここで入力部8、出力部9にははんだ付でリード線
を接続していた。又、ほかの型式として図3に示すよう
に、プリント基板1上に抵抗体2をパイ形又はT形に蒸
着し、電極3を取り付けて一つのきょう体状に形成した
ものもあるが、その場合に電極3に取り付けられたリー
ド10が本体から突出した形状となっていた。
2. Description of the Related Art Conventionally, as a resistance attenuator for a high frequency band on a printed circuit board, a plurality of chip resistors 5 are combined as shown in FIG. Or, it was formed into a T shape. Here, lead wires were connected to the input section 8 and the output section 9 by soldering. As another type, as shown in FIG. 3, there is a type in which a resistor 2 is vapor-deposited in a pie shape or a T shape on a printed circuit board 1 and an electrode 3 is attached to form a single body. In this case, the lead 10 attached to the electrode 3 had a shape protruding from the main body.

【0003】[0003]

【発明が解決しようとする課題】上述した従来の高周波
帯域用の抵抗減衰器は、複数のチップ抵抗を用いるの
で、高周波の信号に対しては、部品搭載用のプリント基
板上のランド、抵抗間の電極部それぞれの浮遊容量、イ
ンダクタンス分が無視できなくなり、理論上の減衰値が
得られなくなる欠点があった。また近年、高密度表面実
装の要求が高まるにつれ、他の回路部とのレイアウトの
関係で特にパイ形減衰器においては接地パターンの共有
化が困難になる。また、従来の図3に例示した一体化し
た減衰器も入力,出力,接地端子が本体より突出したリ
ードにて構成されているので、他の回路部レイアウトが
困難となっていた。
Since the above-mentioned conventional resistance attenuator for a high frequency band uses a plurality of chip resistors, a high frequency signal is generated between the land and the resistor on the printed circuit board for mounting components. The stray capacitance and inductance of each of the electrode parts cannot be ignored and the theoretical attenuation value cannot be obtained. Further, in recent years, as the demand for high-density surface mounting has increased, it becomes difficult to share the ground pattern, especially in the pie-type attenuator, due to the layout relationship with other circuit parts. Further, since the input, output, and ground terminals of the conventional integrated attenuator illustrated in FIG. 3 are also configured by leads protruding from the main body, it is difficult to lay out other circuit parts.

【0004】[0004]

【課題を解決するための手段】本発明のチップ型抵抗減
衰器はセラミック等のプリント基板上にパイ形もしくは
T形に抵抗体を形成して蒸着させ、前記入力用,出力
用,接地用の3つの端子を表面実装用チップ抵抗の電極
で形成している。
In the chip-type resistance attenuator of the present invention, a pie-shaped or T-shaped resistor is formed on a printed circuit board made of ceramic or the like and vapor-deposited to obtain the input, output, and ground. Three terminals are formed by the electrodes of the surface mounting chip resistor.

【0005】[0005]

【実施例】次に本発明について図面を参照して説明す
る。
The present invention will be described below with reference to the drawings.

【0006】図1は本発明の一実施例の斜視図である。
図1の実施例はセラミック等のプリント基板1上に抵抗
体2をパイ形に蒸着させて形成し、さらに入力,出力,
接地端子用電極3A,3B,3Cを形成する。図1に示
すように端子用電極3A,3Bは入力,出力端子とな
り、端子用電極3Cは接地端子となる。この形態はチッ
プ用抵抗の端子と同じ形状なので、ほかの回路との接続
には特にリードを必要とせず、リードインダクタンス、
浮遊容量等も発生しないので高周波特性も非常に良い減
衰器が得られる。
FIG. 1 is a perspective view of an embodiment of the present invention.
In the embodiment shown in FIG. 1, a resistor 2 is vapor-deposited in a pie shape on a printed circuit board 1 made of ceramic or the like.
The ground terminal electrodes 3A, 3B, 3C are formed. As shown in FIG. 1, the terminal electrodes 3A and 3B serve as input and output terminals, and the terminal electrode 3C serves as a ground terminal. Since this form has the same shape as the terminal of the chip resistor, no lead is required to connect it to other circuits.
Since no stray capacitance is generated, an attenuator with excellent high frequency characteristics can be obtained.

【0007】[0007]

【発明の効果】以上説明したように本発明は電極と入
力,出力,接地用端子とを兼用して、かつ、減衰器を1
つの基板上に形成した構造としているので、プリント基
板上のランドや電極部分による浮遊容量、インダクタン
スの少ない理想値に近い高周波減衰特性を実現できる。
また、回路実装の省スペース化にも多大な効果を有す
る。
As described above, according to the present invention, an electrode is used as an input, an output, and a ground terminal, and an attenuator is used.
Since the structure is formed on one substrate, it is possible to realize a high frequency attenuation characteristic close to an ideal value with less stray capacitance and inductance due to lands and electrode portions on the printed circuit board.
It also has a great effect on space saving of circuit mounting.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の斜視図である。FIG. 1 is a perspective view of an embodiment of the present invention.

【図2】従来のチップ抵抗による抵抗減衰器の斜視図で
ある。
FIG. 2 is a perspective view of a conventional resistance attenuator using a chip resistor.

【図3】従来の抵抗体による抵抗減衰器の斜視図であ
る。
FIG. 3 is a perspective view of a conventional resistance attenuator using a resistor.

【符号の説明】[Explanation of symbols]

1,4 プリント基板 2 抵抗体 3 電極 3A,3B,3C 端子用電極 5 チップ抵抗 6 ランドパターン 7 スルーホール 8 入力部 9 出力部 10 リード 1,4 Printed circuit board 2 Resistor 3 Electrode 3A, 3B, 3C Terminal electrode 5 Chip resistance 6 Land pattern 7 Through hole 8 Input part 9 Output part 10 Lead

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 セラミック等のプリント基板上にパイ形
もしくはT形に抵抗体を形成して蒸着させ、前記入力
用,出力用,接地用の3つの端子を表面実装用チップ抵
抗の電極で形成していることを特徴とするチップ型抵抗
減衰器。
1. A pie-shaped or T-shaped resistor is formed on a printed circuit board made of ceramic or the like and vapor-deposited, and the three terminals for input, output and ground are formed by electrodes of a surface mounting chip resistor. A chip-type resistance attenuator characterized in that
JP3217674A 1991-08-29 1991-08-29 Chip-shaped resistance attenuator Pending JPH0555013A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3217674A JPH0555013A (en) 1991-08-29 1991-08-29 Chip-shaped resistance attenuator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3217674A JPH0555013A (en) 1991-08-29 1991-08-29 Chip-shaped resistance attenuator

Publications (1)

Publication Number Publication Date
JPH0555013A true JPH0555013A (en) 1993-03-05

Family

ID=16707950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3217674A Pending JPH0555013A (en) 1991-08-29 1991-08-29 Chip-shaped resistance attenuator

Country Status (1)

Country Link
JP (1) JPH0555013A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0629892A2 (en) * 1993-06-15 1994-12-21 Nec Corporation Waveguide-type optical device and impedance matching method thereof
JPH0714604U (en) * 1993-08-06 1995-03-10 横浜電子精工株式会社 Chip type variable temperature fixed attenuator
JP2000182811A (en) * 1998-12-21 2000-06-30 Alps Electric Co Ltd Resistance attenuator
EP2351052A1 (en) * 2008-11-06 2011-08-03 Vishay Intertechnology Inc. Four-terminal resistor with four resistors and adjustable temperature coefficient of resistance
US9824798B2 (en) 2014-12-15 2017-11-21 Samsung Electro-Mechanics Co., Ltd. Resistor element and method of manufacturing the same
CN108520997A (en) * 2018-05-31 2018-09-11 苏州赫斯康通信科技有限公司 Low intermodulation fixed value passive attenuator

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0629892A2 (en) * 1993-06-15 1994-12-21 Nec Corporation Waveguide-type optical device and impedance matching method thereof
EP0629892A3 (en) * 1993-06-15 1995-08-09 Nippon Electric Co Waveguide-type optical device and impedance matching method thereof.
US5572610A (en) * 1993-06-15 1996-11-05 Nec Corporation Waveguide-type optical device and impedance matching method thereof
JPH0714604U (en) * 1993-08-06 1995-03-10 横浜電子精工株式会社 Chip type variable temperature fixed attenuator
JP2544438Y2 (en) * 1993-08-06 1997-08-20 横浜電子精工株式会社 Chip type variable temperature fixed attenuator
JP2000182811A (en) * 1998-12-21 2000-06-30 Alps Electric Co Ltd Resistance attenuator
EP2351052A1 (en) * 2008-11-06 2011-08-03 Vishay Intertechnology Inc. Four-terminal resistor with four resistors and adjustable temperature coefficient of resistance
US9824798B2 (en) 2014-12-15 2017-11-21 Samsung Electro-Mechanics Co., Ltd. Resistor element and method of manufacturing the same
CN108520997A (en) * 2018-05-31 2018-09-11 苏州赫斯康通信科技有限公司 Low intermodulation fixed value passive attenuator

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