JPH08190537A - Multiprocessor system and process scheduling method - Google Patents

Abstract

PURPOSE: To effectively use the data stored in cache memories and to improve the performance of a multiprocessor system. CONSTITUTION: The multiprocessor system consists of processors 11a, 11b and 11c which include the cache memories 11a1, 11b1 and 11c1 respectively. A monitoring device 18 monitors the writing frequency of each processor that carried out a writing operation in every area (page) 14 which is used for the process carried out by each processor. When the device 18 judged that the writing frequency of a certain processor exceeds a prescribed threshold, a written page is used and also the process that has not been carried out by the processor judged by the device 18 is shifted to this processor.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to process scheduling in a multiprocessor system.

[0002]

2. Description of the Related Art Generally, a multiprocessor system is
A cache memory is provided in each processor. When the process executed on the processor accesses the shared memory, it is determined whether the target data exists in the cache, and if the target data exists, the process is executed on the cache memory. As a result, the number of accesses to the shared memory is reduced and the system performance is improved.

By the way, in a multiprocessor system, process scheduling is executed in order to increase the efficiency of the entire system by effectively using a plurality of processors as processes to be executed in the system.

As a process scheduling method of a conventional multiprocessor system, there are many methods of selecting and executing the process having the highest priority among the executable processes. In this method, a process running on one processor can freely move to another processor.

When a process is executed on a processor, the data referenced by the process is stored in a cache provided in the processor. Therefore, when the process is moved to another processor, the data stored in the cache of the processor before the movement and referred to by the process up to that point is wasted. In addition, the moved process executes processing on the data stored in the cache again in the processor of the moving destination. Furthermore, if the same processor stores the same data in the cache of the moved processor if the processor before the movement shared data with other processes, the consistency of the data will be maintained as the process is processed. Processing is required.

[0006]

As described above, in the conventional multiprocessor system, since the process can be freely moved between the processors by the process scheduling, the data stored in the cache of the processor is wasted.

The present invention has been made in consideration of the above circumstances, and an object thereof is to provide a multiprocessor system capable of improving system performance by effectively utilizing data in a cache memory. And

[0008]

According to the present invention, in a multiprocessor system including a plurality of processors each provided with a cache memory, a memory area used by a process executed on the processor is provided for each predetermined memory area. A monitoring unit that monitors the writing frequency of each processor that has written, and the memory that has been written when it is determined by the monitoring unit that the writing frequency by a certain processor is higher than a predetermined threshold value. A process that uses the area and is not executed by the processor determined by the monitoring means,
A scheduling means for moving to the processor is provided.

Further, the system further comprises a process migration recording means for recording a history when a process migrates between processors, and the scheduling means records the history about the process to be migrated recorded by the process migration recording means. Based on the above, the process is not moved when the number of movements between specific processors exceeds a predetermined threshold.

[0010] Further, it further comprises an in-execution process recording means for recording the number of processes executed by each processor,
The scheduling unit moves the target process when it is determined that the processes are concentrated on a specific processor based on the number of processes recorded by the executing process recording unit. Instead, the process is moved from the processor that is executing the most processes to another processor.

[0011]

According to such a configuration, when writing to a certain memory area (page) is performed frequently, that is, when the writing frequency is higher than a certain preset threshold value, the writing is performed. By moving the process that accesses the same memory area to another processor, the processing to maintain data consistency due to the presence of the same data in the cache memory of multiple processors is not required. Since the processing can be executed by a plurality of processes, the number of accesses to the shared memory is reduced. That is,
By appropriately controlling the movement of processes, the data on the cache can be effectively used, and the performance of the entire system can be improved.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a multiprocessor system according to the first embodiment of the present invention. The multiprocessor system shown in FIG.
a, 11b, 11c and the shared memory 12 are connected via a bus 13. Further, the bus 13 is coupled with a monitoring device 18 that monitors writing to the shared memory 12 by the processors 11a, 11b, and 11c.

Each of the processors 11a, 11b, 11c has a cache memory 11a1, 11b1, 1 respectively.
1c1 is provided. In the shared memory 12, an area (address space) 14 allocated to a process executed on the processors 11a, 11b, 11c, a data group 15 used by an operating system (OS),
An area for storing programs such as operating system programs (including a scheduler) and various data is secured. The scheduler uses each processor 11
In a, 11b, and 11c, processing for moving a process between processors is executed.

The area 14 allocated to the process in the shared memory 12 is allocated for each process when the process is generated on the processors 11a, 11b, 11c (areas 14a, 14b, ...), and each area 14a, 14b. ，
... are managed by being divided into units called pages.

The data group 15 used by the operating system includes a write count recording area 16 and a page number storage area 17. The write count recording area 16 is provided for each page (areas 16a, 16b, 16c, 16d, ...) In the area 14 allocated to the process.
This is for recording the number of writings performed on the page for each processor. Details will be described later.

The page number storage area 17 is for storing a page number indicating a corresponding page when the number of times of writing by the processor with respect to the page stored in the write number recording area 16 exceeds a predetermined number. (Areas 17a, 17b, 17c, ...). Details will be described later.

The monitoring device 18 includes processors 11a and 11a.
The writing to the shared memory 12 by b and 11c is monitored, and the writing number is recorded in a predetermined area in the writing number recording area 16 corresponding to the written page for each writing processor (processor ID). Further, the monitoring device 18 uses the write count recording area 16
When the number of writes from the processor is greater than or equal to a predetermined value (exceeds a preset threshold value), an interrupt is issued to the processor with reference to the number of writes recorded in (1).

FIG. 2 is a diagram showing details of the contents recorded in the write count recording area 16. Here, the area 16a corresponding to a certain page is shown. Area 16a
Corresponds to the processor ID indicating each processor,
Areas 21a, 21b, 21 for storing the number of times the processor has written to the page corresponding to the area 16a
,, an area 22 for storing a threshold value for determining that the number of times of writing stored in the areas 21a, 21b, 21c, ... Has exceeded a predetermined number, and a process currently executing processing for this page. An area 23 is prepared for recording a processor ID indicating a processor (interrupt destination by the monitoring device 18) on which is operating.

The write count recording area 16 is initialized with the write count of "0" in advance. Also, the processor ID
In the area 23 for recording, a processor ID indicating a processor that executes a process to which a page corresponding to the area 16a is assigned as an initial value is stored.

FIG. 3 is a diagram showing details of the contents recorded in the page number storage area 17. Page number storage area 17
Are the areas 16a, 16 of the write count recording area 16.
When it is determined that the number of times of writing exceeds the threshold in b, 16c, 16d, ..., The page number indicating the corresponding page is stored in association with the processor ID indicating the processor that has performed the writing exceeding the threshold. Areas 31a, 31b, 31c, ...

Next, the operation of the first embodiment will be described with reference to the flow charts shown in FIGS.
FIG. 4 is a flowchart showing the operation of the monitoring device 18. When an area (a predetermined page in the area 14) is allocated in the shared memory 12 when a process is generated,
In the write count recording area 16 corresponding to the page,
Processor ID indicating the processor on which the process is executed
Is stored in area 23.

When a particular page is written while this process is being executed on a certain processor, the monitoring device 18 executes the write corresponding to the target page of the write count recording area 16. The processor ID of the selected processor is stored, and the value of the write count stored in association with this processor ID is incremented by 1 (step A1). (Already applicable processor ID
Is stored, the write count value is incremented by 1 corresponding to the processor ID).

Further, when another process writes to the same page, the monitoring device 18 similarly causes the processor ID of the processor executing this process.
The number of writes is stored in association with (the number of writes is increased by 1).

There are several ways to create the information shown in FIG. For example, in a general system, when the processor writes to a page, the modified bit is set in the page table entry. At this time, the modified bit is also set, and at the same time, the processor ID of the processor that wrote the page is also set. There is a method of creating information as shown in FIG. 2 by making a record and periodically monitoring it by software.

At this time, if the number of writings to this page by the processor that has performed writing exceeds the preset threshold value stored in the area 22 (step A2), the monitoring device 18 causes the page Number storage area 17
Then, the processor ID and the page number stored in the area 23 of the currently targeted page of the write count recording area 16 are stored in association with each other (step A3).

Finally, the monitoring device 18 issues an interrupt to the processor indicated by the processor ID stored in the area 23 (step A4). That is, the process executing on the processor indicated by the processor ID stored in the area 23 is moved to another processor.

In the page number storage area 17, when the number of times of writing to another page in the number-of-times recording area 16 exceeds the threshold value set for each page, each page number is associated with the processor ID. Stored.

FIG. 5 is a flow chart showing the operation of the processor interrupted by the monitoring device 18. The processor receiving the interrupt from the monitoring device 18 retrieves the processor ID of its own processor from the processor ID stored in the page number storage area 17 of the shared memory 12, and stores the page number stored in association with the corresponding processor ID. Is checked (step B1). That is, it is checked to which page the writing exceeds the threshold value and the interrupt is generated.

The processor that has received the interrupt checks the number of times of writing to the target page recorded in the number-of-times-of-writing recording area 16 in accordance with the page number stored in the page number storage area 17, and finds the largest number in this page. The processor ID of the writing processor is obtained (step B2).

The processor that has received the interrupt compares the processor ID obtained from the write count recording area 16 with its own processor ID and determines whether they match (step B3). That is, it determines whether or not the process running on its own processor is to be moved to another processor. If the processor IDs are the same, the process at the move destination processor is not its own processor.

On the other hand, if the processor IDs are different,
A process for moving the currently executing process to the processor having the largest number of times of writing indicated by the processor ID stored in the number-of-writings recording area 16 is executed (step B4).

Then, the write count stored in the write count recording area 16 corresponding to the processor to which the process is moved is cleared to "0" (step B5).
When the page mapping is changed due to the process switching or the like, the write count recording area 16 corresponding to the page is reinitialized.

In this way, the data stored in the cache memory is effectively used by the scheduling in which the process is moved to the processor that writes a lot to the common page of the shared memory 12 instead of moving it to an arbitrary processor. be able to.

Next, a second embodiment of the present invention will be described. FIG. 6 is a block diagram showing the configuration of a multiprocessor system according to the second embodiment of the present invention. In the multiprocessor system of the second embodiment shown in FIG. 6, a plurality of processors 41a, 41b, 41c and a shared memory 42 are
It is configured to be connected via a bus 43. further,
A monitoring device 48 that monitors writing to the shared memory 42 by the processors 41a, 41b, and 41c is coupled to the bus 43.

The cache memories 41a1, 41b1, 4 are provided in the processors 41a, 41b, 41c, respectively.
1c1 is provided. In the shared memory 42, areas (address space) 44 allocated to processes executed on the processors 41a, 41b, 41c, a data group 45 used by the operating system, and programs such as operating system programs (including a scheduler) And an area for storing various data is secured. The scheduler uses the processors 41a, 41
In b and 41c, processing for moving a process between processors is executed.

The area 44 allocated to the process in the shared memory 42 is allocated for each process when the process is generated on the processors 41a, 41b and 41c (areas 44a, 44b, ...), and the areas 44a and 44b. ，
... are managed by being divided into units called pages.

The data group 45 used by the operating system includes a write count recording area 46, a page number storage area 47, and a processor ID history area 49.

The write count recording area 46 is for each page (areas 46a, 4a) in the area 44 allocated to the process.
6b, 46c, 46d, ...) For recording the number of times writing has been performed on the page for each processor. Details will be described later.

The page number storage area 47 is for storing the page number indicating the corresponding page when the number of times of writing by the processor with respect to the page stored in the number-of-writes recording area 46 exceeds a predetermined number. (Areas 47a, 47b, 47c, ...). Details will be described later.

The processor ID history area 49 is for storing, for each process (areas 49a, 49b, 49c, ...), a history of processor IDs indicating the executed processors, that is, a history of process migration. . The processor ID history area 49 is stored for each process by the operating system by allocating the process to the processor.

The monitoring device 48 includes processors 41a and 41a.
The writing to the shared memory 42 by b and 41c is monitored, and the writing number is recorded in a predetermined area in the writing number recording area 46 corresponding to the written page for each processor (processor ID) that has performed the writing. Further, the monitoring device 48 uses the write count recording area 46.
When the number of writes from the processor is greater than or equal to a predetermined value (exceeds a preset threshold value), an interrupt is issued to the processor with reference to the number of writes recorded in (1).

Next, the operation of the second embodiment will be described with reference to the flowchart shown in FIG. The operation of the monitoring device 48 is the same as that of the above-described first embodiment (flowchart shown in FIG. 4), and description thereof will be omitted. FIG. 7 is a flowchart showing the operation of the processor interrupted by the monitoring device 48.

The processor receiving the interrupt from the monitoring device 48 retrieves the processor ID of its own processor from the processor ID stored in the page number storage area 47 of the shared memory 42, and stores it in association with the corresponding processor ID. Check the page number (step C1). That is, it is checked to which page the writing exceeds the threshold value and the interrupt is generated.

The processor that has received the interrupt checks the number of times of writing to the target page recorded in the number-of-times-of-writing recording area 46 according to the page number stored in the page number storage area 47, and finds the largest number in this page. The processor ID of the writing processor is obtained (step C2).

The processor that has received the interrupt compares the processor ID obtained from the write count recording area 46 with its own processor ID and determines whether or not they match (step C3). That is, it determines whether or not the process running on its own processor is to be moved to another processor. If the processor IDs are the same, the process at the move destination processor is not its own processor.

On the other hand, if the processor IDs are different,
With reference to the processor ID history area 49, the history of the processor in which the target process is executed, that is, the history of process migration is checked (step C4).

The movement between specific processors is
It is determined whether or not the number of movements exceeds a preset threshold value (step C5). In other words, if processes are repeatedly moved between specific processors, the effects of the process movement will not be fully obtained, and only the load required for process movement will increase, so the processes will be moved. Try not to let me.

On the other hand, when the movement between the specific processors does not exceed the threshold value, the currently executing process is assigned to the processor with the largest number of times of writing indicated by the processor ID stored in the writing number recording area 46. A process for moving is executed (step C6).

Then, the number of writes, which is stored in the number-of-writes recording area 46 and corresponds to the processor to which the process is moved, is cleared to "0" (step C7).
When the page mapping is changed due to the process switching or the like, the write count recording area 46 corresponding to the page is reinitialized.

In this way, in addition to the effect of the first embodiment described above, when movement between specific processors frequently occurs, which is not sufficient effect due to movement of the process, the process is It is possible to prevent the system performance from degrading by not moving.

Next, a third embodiment of the present invention will be described. FIG. 8 is a block diagram showing the configuration of a multiprocessor system according to the third embodiment of the present invention. As shown in FIG. 8, the multiprocessor system of the third embodiment is
A plurality of processors 51a, 51b, 51c and a shared memory 52 are connected via a bus 53.
Further, the bus 53 includes processors 51a, 51b, 5
A monitoring device 58 is connected to monitor writing to the shared memory 52 by 1c.

The processors 51a, 51b, 51c have cache memories 51a1, 51b1, 5 respectively.
1c1 is provided. In the shared memory 52, an area (address space) 54 allocated to a process executed on the processors 51a, 51b, 51c, a data group 55 used by the operating system, and programs such as an operating system program (including a scheduler) And an area for storing various data is secured. The scheduler uses the processors 51a, 51
In b and 51c, processing for moving a process between processors is executed.

The area 54 assigned to the process in the shared memory 52 is assigned to each process when the process is generated on the processors 51a, 51b, 51c (areas 54a, 54b, ...), and the respective areas 54a, 54b. ，
... are managed by being divided into units called pages.

The data group 55 used by the operating system includes a write count recording area 56, a page number storage area 57, a processor ID history area 59, and an executing process count area 5A.

The write count recording area 56 is provided for each page (areas 56a, 5a) in the area 54 allocated to the process.
6b, 56c, 56d, ...) for recording the number of times of writing to the page for each processor. Details will be described later.

The page number storage area 57 is for storing the page number indicating the corresponding page when the number of times of writing by the processor with respect to the page stored in the number-of-writes recording area 56 exceeds a predetermined number. (Areas 57a, 57b, 57c, ...). Details will be described later.

The processor ID history area 59 is for storing the history of the processor ID indicating the executed processor, that is, the history of process migration, for each process (areas 59a, 59b, 59c, ...). . The processor ID history area 59 is stored for each process by the operating system by allocating the process to the processor.

The number of executing processes area 5A indicates the number of processes executed by each processor 51a, 51b, 51c for each processor (areas 5Aa, 5Ab, 5Ac).
Is an area for storing in. Number of running processes area 5
In A, the number of processes being executed is updated for each processor by the operating system due to movement of processes between processors.

The monitoring device 58 includes processors 51a and 51a.
The writing to the shared memory 52 by b and 51c is monitored, and the number of writing is recorded in a predetermined area in the number-of-writing recording area 56 corresponding to the written page for each processor (processor ID) that has performed the writing. Further, the monitoring device 58 uses the write count recording area 56.
When the number of writes from the processor is greater than or equal to a predetermined value (exceeds a preset threshold value), an interrupt is issued to the processor with reference to the number of writes recorded in (1).

Next, the operation of the third embodiment will be described with reference to the flow chart shown in FIG. The operation of the monitoring device 58 is the same as that of the first embodiment described above (the flowchart shown in FIG. 4), and the description is omitted. FIG. 9 is a flowchart showing the operation of the processor interrupted by the monitoring device 58.

The processor receiving the interrupt from the monitoring device 58 retrieves the processor ID of its own processor from the processor ID stored in the page number storage area 57 of the shared memory 52, and stores it in association with the corresponding processor ID. Check the page number (step D1). That is, it is checked to which page the writing exceeds the threshold value and the interrupt is generated.

The processor that has received the interrupt checks the number of times of writing to the target page recorded in the number-of-times-of-writing recording area 56 according to the page number stored in the page number storage area 57, and finds the largest number of times in this page. The processor ID of the writing processor is obtained (step D2).

The processor that has received the interrupt compares the processor ID obtained from the write count recording area 56 with its own processor ID and determines whether they match (step D3). That is, it determines whether or not the process running on its own processor is to be moved to another processor. If the processor IDs are the same, the process at the move destination processor is not its own processor.

On the other hand, if the processor IDs are different,
The number of processes being executed in each processor is compared by referring to the number of processes in execution area 5A (step D4).
Then, it is determined whether the difference between the maximum number and the minimum number of processes exceeds a preset threshold value for the number of processes (step D5).

In other words, as a result of the process movement, the processes are concentrated on a specific processor, the number of processes executed by the processors is biased, and when the number of processes exceeds a certain threshold, Do not move the currently targeted process. Further, processing for moving a process having a low priority from a processor executing the most processes to a processor having a small number of executions of other processes is executed (step D).
6). Therefore, until the difference in the number of processes falls below the threshold,
The process of moving a process from the processor that is most executing the process to another processor is repeatedly executed.

On the other hand, when the difference between the maximum number and the minimum number of processes executed by the processor does not exceed the threshold value, the processor ID history area 59 is referred to, and the history of the processor in which the target process is executed, That is, the history of process movements is checked (step D7).

The movement between specific processors is
It is determined whether or not the number of movements exceeds a preset threshold value (step D8). In other words, if processes are repeatedly moved between specific processors, the effects of the process movement will not be fully obtained, and only the load required for process movement will increase, so the processes will be moved. Try not to let me.

On the other hand, when the movement between the specific processors does not exceed the threshold value, the currently executing process is assigned to the processor with the largest number of times of writing indicated by the processor ID stored in the writing number recording area 56. A process for moving is executed (step D9).

Then, the number of writes, which is stored in the number-of-writes recording area 56 and corresponds to the processor to which the process is moved, is cleared to "0" (step D1).
0). When the page mapping is changed due to the process switching or the like, the write count recording area 56 corresponding to the page is reinitialized.

In this way, in addition to the effects of the first and second embodiments described above, when processes are further concentrated in a specific processor due to process migration, the migration of the target process is stopped. However, by moving the process from the processor that is executing the most processes to another processor, it is possible to average the load on each processor and prevent performance degradation of the entire system.

[0071]

As described above in detail, according to the present invention, a memory area used by a process is monitored, and a process is frequently written to a processor which frequently writes based on the number of times the processor writes to this margin area. By moving the data, the cache data can be effectively used and the system performance can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a multiprocessor system according to a first embodiment of the present invention.

FIG. 2 is a write count recording area 16 in the first embodiment.
The figure which shows the detail of the content recorded on.

FIG. 3 is a diagram showing details of contents recorded in a page number storage area 17 in the first embodiment.

FIG. 4 is a flowchart showing the operation of the monitoring device 18 in the first embodiment.

FIG. 5 is a flowchart showing the operation of the processor which is interrupted by the monitoring device 18 in the first embodiment.

FIG. 6 is a block diagram showing the configuration of a multiprocessor system according to a second embodiment of the present invention.

FIG. 7 is a flowchart showing the operation of the processor which is interrupted by the monitoring device 48 in the second embodiment.

FIG. 8 is a block diagram showing the configuration of a multiprocessor system according to a third embodiment of the present invention.

FIG. 9 is a flowchart showing the operation of the processor which is interrupted by the monitoring device 58 in the third embodiment.

[Explanation of symbols]

11a, 11b, 11c, 41a, 41b, 41c, 5
1a, 51b, 51c ... Processor, 12, 42, 52
... shared memory, 14, 44, 54 ... area allocated to process, 15, 45, 55 ... data group used by operating system, 16, 46, 56 ... write count recording area, 17, 47, 57 ... page number storage Area, 49, 59 ... Processor ID history area, 5A ... Execution process number area.

Claims (6)

[Claims] 1. In a multiprocessor system composed of a plurality of processors each provided with a cache memory, each processor that writes data in a predetermined memory area in a memory area used by a process executed on the processor. Monitoring means for monitoring the writing frequency of the memory, and when the monitoring means determines that the frequency of writing by a processor is higher than a predetermined threshold value, the memory area in which the writing is performed is used, and the monitoring is performed. A multiprocessor system comprising: scheduling means for migrating a process, which is not executed by the processor determined by the means, to the processor. 2. A process migration recording means for recording a history when a process migrates between processors, wherein the scheduling means records history concerning a process to be migrated recorded by the process migration recording means. 2. The multiprocessor system according to claim 1, wherein, based on the above, the process is not moved when the number of movements between specific processors exceeds a predetermined threshold value. 3. A specific processor based on the number of processes recorded by said active process recording means, further comprising active process recording means for recording the number of processes executed by each processor. When it is determined that the processes are concentrated in the process, the target process is not moved and the process is moved from the processor that is executing the most processes to another processor. Multiprocessor system to do. 4. A multiprocessor system including a plurality of processors provided with a cache memory, wherein each memory area used by a process executed on the processor is written in every predetermined memory area. The write frequency of a certain processor, and when the write frequency by a certain processor is higher than a predetermined threshold value, the process that uses the memory area where the write is performed and is not executed by the processor determined by the monitoring means A process scheduling method comprising: moving a processor to the processor. 5. In a multiprocessor system composed of a plurality of processors provided with a cache memory, each processor that writes data in a predetermined memory area in a memory area used by a process executed on the processor. Monitoring the write frequency of a certain processor, and when the write frequency by a certain processor exceeds a predetermined threshold, the number of movements between the specific processors of the process to be moved exceeds the predetermined threshold. Does not move the process, and moves the process to the processor when the predetermined threshold is not exceeded. 6. A multiprocessor system including a plurality of processors provided with a cache memory, wherein each memory area used by a process executed on the processor is written in every predetermined memory area. Monitor the write frequency of a certain processor, and if the write frequency by a processor exceeds a specified threshold, move the target process to that processor if the process is not concentrated on that processor, If it is determined that the process is concentrated on the other processor, the target process is not moved, and the process that moves the most processes is moved to another processor. Characteristic process scheduling method.