JPH08130107A - Manufacture of ceramic substrate for chip-type electronic component and chip-type electronic component - Google Patents

Manufacture of ceramic substrate for chip-type electronic component and chip-type electronic component

Info

Publication number
JPH08130107A
JPH08130107A JP7199768A JP19976895A JPH08130107A JP H08130107 A JPH08130107 A JP H08130107A JP 7199768 A JP7199768 A JP 7199768A JP 19976895 A JP19976895 A JP 19976895A JP H08130107 A JPH08130107 A JP H08130107A
Authority
JP
Japan
Prior art keywords
chip
ceramic substrate
slits
slit
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7199768A
Other languages
Japanese (ja)
Inventor
Shigeru Kanbara
滋 蒲原
Masato Doi
眞人 土井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP7199768A priority Critical patent/JPH08130107A/en
Publication of JPH08130107A publication Critical patent/JPH08130107A/en
Pending legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Adjustable Resistors (AREA)

Abstract

PURPOSE: To provide methods for manufacturing a ceramic substrate for a chip-type electronic component wherein a flat division face is ensured so that there may be no trouble forming side face electrode layers of a chip-type electronic component and for manufacturing a chip-type electronic component. CONSTITUTION: On an unbaked ceramic sheet, a plurality of through hole pairs 2 are formed and nearly-through slits 3 are formed between the through hole pairs and then a plurality of slits 4 are so formed as to cross at right angles with the nearly- through slits 3. After that, this ceramic sheet is heated and baked and thereby a ceramic substrate 1' is obtained. Nextly, a resistor layer 5 and a surface electrode layer 6 are formed for each of unit regions which are partitioned by the nearly-through slits 3 and the slits 4. Then, the resistor layer 5 and the surface electrode layers 6 are trimmed to regulate resistance values and then protection layers 7 to cover the resistor layers 5 are formed. After that, the ceramic substrate 1' is cut along the slits 4' at both remote ends and the nearly-through slits 3 and is divided into bar-like sections. After that, side face electrode layers are formed at both side faces in the longitudinal direction of each bar section and then each bar section is cut along the transverse slits 4 and is divided into chip-type resistors.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、チップ抵抗器、チ
ップコンデンサ等のチップ状電子部品の製造に用いられ
るセラミック基板の製造方法及びそのセラミック基板を
用いたチップ抵抗器、チップコンデンサ等のチップ状電
子部品の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a ceramic substrate used for manufacturing chip-shaped electronic components such as chip resistors and chip capacitors, and chip resistors such as chip resistors and chip capacitors using the ceramic substrate. The present invention relates to a method of manufacturing an electronic component.

【0002】[0002]

【従来の技術】従来、チップ状電子部品用セラミック基
板及び当該基板を用いたチップ状電子部品の一つである
チップ抵抗器は、例えば次のような方法で製造される。
まず、図6(1)乃至図6(3)に示すように、未焼成
セラミックシート上に、縦横のスリット溝22及び23
を金型による型押しで形成した後、この未焼成セラミッ
クシートを焼成してセラミック基板21を得る。この場
合、縦横のスリット溝22、23のいずれか一方のスリ
ット溝の両端の溝はセラミック基板の端部にまで達する
ように形成しておく。また、縦横のスリット溝22、2
3はセラミック基板の上面のみだけでなく、その裏面の
所定の位置にも形成される場合もある(図6(4)参
照)。
2. Description of the Related Art Conventionally, a ceramic substrate for a chip-shaped electronic component and a chip resistor, which is one of the chip-shaped electronic components using the substrate, are manufactured by the following method, for example.
First, as shown in FIGS. 6 (1) to 6 (3), vertical and horizontal slit grooves 22 and 23 are formed on an unfired ceramic sheet.
Is formed by embossing with a die, and then the unfired ceramic sheet is fired to obtain a ceramic substrate 21. In this case, the slits at both ends of either one of the vertical and horizontal slit grooves 22 and 23 are formed so as to reach the end portion of the ceramic substrate. In addition, vertical and horizontal slit grooves 22, 2
3 may be formed not only on the upper surface of the ceramic substrate but also on a predetermined position on the back surface thereof (see FIG. 6 (4)).

【0003】この後、図7(1)に示すように、セラミ
ック基板21上の縦横のスリット溝22及び23で区画
された任意の各単位領域毎に、抵抗体層24及び表面電
極層25を形成、トリミングして抵抗値調整した後、抵
抗体層24を覆う保護層26を形成する。次いで図7
(2)に示すように、まず縦横のスリット溝22、23
のうちの各々の両端の溝に沿って基板を分割した後、図
8(1)に示すように表面電極層25が形成された側の
スリット溝22に沿って分割してセラミック基板21を
複数の棒状片21’とする。そして、図8(2)に示す
ように棒状片21’の長手方向両側面に側面電極層27
を形成し、最後に棒状片21’の横スリット溝23に沿
って分割することによりチップ状とするという方法によ
り行われる。
Thereafter, as shown in FIG. 7 (1), a resistor layer 24 and a surface electrode layer 25 are formed in each arbitrary unit area defined by vertical and horizontal slit grooves 22 and 23 on the ceramic substrate 21. After forming, trimming and adjusting the resistance value, a protective layer 26 covering the resistor layer 24 is formed. Then FIG.
As shown in (2), first, the slit grooves 22 and 23 in the vertical and horizontal directions are formed.
After dividing the substrate along the grooves on both ends of each of the above, the ceramic substrate 21 is divided into plural pieces along the slit groove 22 on the side where the surface electrode layer 25 is formed as shown in FIG. 21 '. Then, as shown in FIG. 8 (2), the side surface electrode layers 27 are formed on both side surfaces in the longitudinal direction of the rod-shaped piece 21 '.
Is formed, and finally, the rod-shaped piece 21 ′ is divided along the lateral slit groove 23 to obtain a chip shape.

【0004】しかしながら、上記方法による場合、セラ
ミック基板21を表面電極層25が形成された側のスリ
ット溝22に沿って棒状片21’に分割する際、棒状片
21’の側面が平坦に分割されないという問題が生じ
る。これは、スリット溝22が形成されている以外の箇
所22’は、セラミック基板を割ることによって分割し
なければならないからである。例えば、スリット溝22
が上面にのみ形成されているセラミック基板を分割した
場合は、図9(a)に示すように、分割側面22’が平
坦にならないばかりか、スリット溝22が形成されてい
る側の反対側の端部にバリ28や欠け28’が発生する
ことがある。また、スリット溝22が両面に形成された
セラミック基板の場合であっても、やはりスリット溝が
形成されていない部分22’が図9(b)に示すように
平坦には分割されない。分割面が平坦にならなければ側
面電極層を形成する際の密着性が悪くなり、側面電極層
が形成できなかったり、あるいは一旦形成された側面電
極層が剥離してしまう、更には外観不良等の問題が生じ
る。
However, according to the above method, when the ceramic substrate 21 is divided into the rod-shaped pieces 21 'along the slit groove 22 on the side where the surface electrode layer 25 is formed, the side surfaces of the rod-shaped pieces 21' are not divided flatly. The problem arises. This is because the portion 22 'other than where the slit groove 22 is formed must be divided by breaking the ceramic substrate. For example, the slit groove 22
When the ceramic substrate formed only on the upper surface is divided, as shown in FIG. 9A, not only the divided side surface 22 ′ becomes flat but also the side opposite to the side where the slit groove 22 is formed is formed. Burrs 28 and chips 28 'may occur at the ends. Even in the case of the ceramic substrate having the slit grooves 22 formed on both sides, the portion 22 'where the slit grooves are not formed is not flatly divided as shown in FIG. 9B. If the divided surface is not flat, the adhesion at the time of forming the side surface electrode layer becomes poor, and the side surface electrode layer cannot be formed, or the side surface electrode layer once formed is peeled off, and the appearance is poor. Problem arises.

【0005】このような問題を解消するためには、側面
電極層を形成する側のスリット溝22の深さを予めでき
るだけ深く形成しておき、平坦な分割面を確保しておく
ことが望ましく、最も望ましくは、特願平5ー2825
62号に開示され、図10に示すように、スリット溝2
2をセラミック基板の表面から裏面に達するような略貫
通のスリット22aとしておくと良い。
In order to solve such a problem, it is desirable that the slit groove 22 on the side where the side surface electrode layer is formed be formed as deep as possible in advance to secure a flat division surface. Most preferably, Japanese Patent Application No. 5-2825
No. 62, and as shown in FIG.
It is preferable that the slit 2a is a penetrating slit 22a that extends from the front surface to the back surface of the ceramic substrate.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、上記の
ように、略貫通スリット22aを形成する場合において
は、次のような別の問題点が生じる。この場合、略貫通
スリット22aは、金型の型押しにより形成される。す
なわち、図11(1)に示すように、略貫通のスリット
22aを形成するための金型の刃部31を未焼成セラミ
ックシート21”の上面から押し付けて、略貫通スリッ
ト22aが形成される。この際、貫通スリット22aを
形成するための金型の刃部31は未焼成セラミックシー
ト21”の表面から裏面にかけて略貫通することとなる
が、この時の金型の刃部31の押し付けによる力がセラ
ミックシートの端部21aの方向に向かっても働き、そ
の結果、図11(2)に示すように、本来形成されるべ
き略貫通スリット22aの端部22a’から未焼成セラ
ミックシートの部21aに向かって内部歪40が生じる
ことがある。この状態で未焼成セラミックシート21”
を焼成すると内部歪40が生じた箇所で基板に亀裂が生
じて割れてしまう。また、焼成時には基板が割れないと
しても、できあがったセラミック基板は非常に強度の弱
いものとなり、当該基板からチップ状抵抗器を製造して
いる過程において当該基板が割れてしまうという問題点
があった。
However, in the case of forming the substantially penetrating slit 22a as described above, the following another problem occurs. In this case, the substantially through slit 22a is formed by pressing the die. That is, as shown in FIG. 11 (1), the blade portion 31 of the die for forming the substantially penetrating slit 22a is pressed from the upper surface of the unfired ceramic sheet 21 ″ to form the substantially penetrating slit 22a. At this time, the blade portion 31 of the die for forming the through slit 22a substantially penetrates from the front surface to the back surface of the unfired ceramic sheet 21 ″, but the force due to the pressing of the blade portion 31 of the die at this time. Also works toward the end 21a of the ceramic sheet, and as a result, as shown in FIG. 11B, from the end 22a 'of the substantially through slit 22a to be originally formed to the part 21a of the unfired ceramic sheet. Internal strain 40 may occur toward the. Unfired ceramic sheet 21 "in this state
When is fired, the substrate is cracked at a portion where the internal strain 40 is generated and the substrate is broken. Further, even if the substrate does not break during firing, the resulting ceramic substrate has a very weak strength, and there is a problem that the substrate breaks during the process of manufacturing a chip resistor from the substrate. .

【0007】本発明は、これらの問題を解消できるよう
にしたチップ状電子部品用セラミック基板及びチップ状
電子部品の製造方法を提供することを技術的課題とする
ものである。
It is a technical object of the present invention to provide a ceramic substrate for a chip-shaped electronic component and a method for manufacturing a chip-shaped electronic component, which can solve these problems.

【0008】[0008]

【課題を解決するための手段】上記技術的課題を解決す
るため、本願発明では次の技術的手段を講じている。す
なわち、本願の請求項1に記載したチップ状電子部品用
セラミック基板の製造方法は、未焼成セラミックシート
に、対向する一対の貫通孔を複数設ける工程と、前記一
対の貫通孔間に略貫通のスリットを設ける工程と、前記
略貫通のスリットに直交する複数のスリット溝を設ける
工程と、前記未焼成のセラミックシートを焼成してセラ
ミック基板とする工程と、を有することを特徴としてい
る。
In order to solve the above technical problems, the present invention takes the following technical measures. That is, the method for manufacturing a ceramic substrate for a chip-shaped electronic component according to claim 1 of the present application includes a step of providing a plurality of a pair of through holes facing each other on an unfired ceramic sheet, and a step of substantially penetrating between the pair of through holes. The method is characterized by including a step of providing slits, a step of providing a plurality of slit grooves orthogonal to the slits that are substantially penetrating, and a step of firing the unfired ceramic sheet to form a ceramic substrate.

【0009】また、本願請求項2に記載したチップ状電
子部品の製造方法は、請求項1記載の方法によって製造
された前記セラミック基板上の前記略貫通のスリット及
び前記スリット溝で区画された任意の各単位領域毎に、
少なくとも一つの受動素子層及び表面電極層を形成する
工程と、前記略貫通のスリットに沿って前記セラミック
基板を分割する工程と、前記分割による分割面に側面電
極部を設ける工程と、を有することを特徴としている。
Further, in the method of manufacturing the chip-shaped electronic component according to claim 2 of the present application, any of the substantially slits and the slit grooves formed on the ceramic substrate manufactured by the method of claim 1 is used. For each unit area of
A step of forming at least one passive element layer and a surface electrode layer, a step of dividing the ceramic substrate along the substantially penetrating slit, and a step of providing a side surface electrode portion on a division surface by the division. Is characterized by.

【0010】以上のような手段を講じることにより、請
求項1記載の発明によれば、未焼成のセラミックシート
に金型で型押しして貫通スリットを設ける際、当該貫通
スリットの両端部には貫通孔が設けられているので、金
型刃部の押し付けによる応力が当該貫通孔により吸収さ
れてしまい、その結果、当該貫通孔よりセラミック基板
端部側に内部歪が生じることはない。
By taking the above-mentioned means, according to the invention of claim 1, when the through-slit is formed by pressing the unfired ceramic sheet with the die, the both ends of the through-slit are provided. Since the through hole is provided, the stress due to the pressing of the die blade portion is absorbed by the through hole, and as a result, internal strain does not occur on the ceramic substrate end side from the through hole.

【0011】従って、本発明によれば、セラミックシー
トの焼成中や製造工程中においてセラミック基板に亀裂
が生じるのを防止し、必要最小限の強度を保持したセラ
ミック基板を得ることができる。また、このようなセラ
ミック基板を用いて電子部品を製造すれば、製造工程中
に基板が割れるという問題は生じない。しかも、側面電
極層を形成すべき基板側面は予め略貫通スリットとして
いるので、基板分割の際、基板側面にバリや欠けが発生
することはなく、品質の優れた電子部品を製造すること
ができる。
Therefore, according to the present invention, it is possible to prevent the ceramic substrate from cracking during firing of the ceramic sheet or during the manufacturing process, and to obtain a ceramic substrate having a required minimum strength. Moreover, when an electronic component is manufactured using such a ceramic substrate, the problem that the substrate is cracked during the manufacturing process does not occur. Moreover, since the side surface of the substrate on which the side surface electrode layer is to be formed is substantially a through slit in advance, burrs and chips are not generated on the side surface of the substrate when the substrate is divided, and an electronic component with excellent quality can be manufactured. .

【0012】[0012]

【発明の実施の形態】以下、本発明の第一の実施例を図
面を参照して説明する。まず、図1(1)に示すよう
に、未焼成のセラミックシート1に対向する一対の貫通
孔2を複数設け、次に、図1(2)に示すように、貫通
孔2間に貫通スリット3を金型の型押しにより形成す
る。この際、略貫通のスリット3は、図1(3)に示す
ように、未焼成セラミックシート1の表面から裏面に略
達するように金型15の刃部15’を未焼成セラミック
シート1の上面から押し当てて形成しても良いし、ま
た、その逆でも良い。更に、図1(4)に示すように、
未焼成セラミックシート1の上面及び裏面の両方から上
金型15の刃部15’、下金型16の刃部16’を押し
当てて形成するようにしても良い。なお、この場合、金
型の刃部の摩耗、欠け等を防止するため、スリット3を
完全に貫通させてしまうのではなく、未焼成セラミック
シートの一部1aを余して略貫通となるように形成す
る。
BEST MODE FOR CARRYING OUT THE INVENTION A first embodiment of the present invention will be described below with reference to the drawings. First, as shown in FIG. 1 (1), a plurality of pairs of through holes 2 facing the unsintered ceramic sheet 1 are provided, and then, as shown in FIG. 1 (2), through slits are provided between the through holes 2. 3 is formed by pressing the die. At this time, as shown in FIG. 1 (3), the substantially penetrating slit 3 is provided with the blade portion 15 'of the mold 15 so as to substantially reach the back surface from the front surface of the unfired ceramic sheet 1. It may be formed by pressing from above or vice versa. Furthermore, as shown in FIG. 1 (4),
Alternatively, the blade portion 15 ′ of the upper die 15 and the blade portion 16 ′ of the lower die 16 may be pressed against both the upper surface and the back surface of the unfired ceramic sheet 1. In this case, in order to prevent wear and chipping of the blade of the mold, the slit 3 is not completely penetrated, but a part 1a of the unfired ceramic sheet is left over so as to be substantially penetrated. To form.

【0013】次に、これも金型の型押しにより、略貫通
のスリット3に対し直交する方向にスリット溝4を形成
し、この後、前記未焼成セラミックシート1を加熱、焼
成して、図2に示すようなセラミック基板1’を得る。
このとき、スリット溝4の両端の溝4’は、セラミック
基板の端部にまで達するように形成する。なお、本実施
例においては、貫通孔2、略貫通スリット3、スリット
溝4の順序で形成する例を示したが、この順序に限定さ
れる必要はなく、スリット溝4、貫通孔2、略貫通スリ
ット3の順に形成する方法、貫通孔2、スリット溝4、
略貫通スリット3の順で形成する方法、あるいは、略貫
通スリット3とスリット溝4を同時に形成する方法等で
も良い。また、略貫通スリット3及びスリット溝4を形
成する際には、セラミック基板1’の強度が最小必要限
度の範囲で保持されるよう、余白部3a,4aを確保す
る。
Next, also by pressing the die, a slit groove 4 is formed in a direction orthogonal to the substantially penetrating slit 3, and then the unfired ceramic sheet 1 is heated and fired, A ceramic substrate 1'as shown in 2 is obtained.
At this time, the grooves 4'at both ends of the slit groove 4 are formed so as to reach the ends of the ceramic substrate. In addition, in the present embodiment, an example in which the through hole 2, the substantially through slit 3, and the slit groove 4 are formed in this order is shown, but the order is not limited to this order, and the slit groove 4, the through hole 2, Method of forming through slit 3 in order, through hole 2, slit groove 4,
A method of forming the substantially through slits 3 in this order, or a method of simultaneously forming the substantially through slits 3 and the slit grooves 4 may be used. Further, when forming the substantially through slit 3 and the slit groove 4, the margin portions 3a and 4a are secured so that the strength of the ceramic substrate 1'is maintained within the minimum required range.

【0014】次に、図3(1)に示すように、前記方法
で作成されたセラミック基板1’上の、略貫通スリット
3及びスリット溝4によって区画された任意の各単位領
域毎に、抵抗体層5及び表面電極層6を形成、トリミン
グして抵抗値調整した後、抵抗体層5を覆う保護層7を
形成する。次いで、図3(2)に示すように、両端のス
リット溝4’及び各々の略貫通スリット3に沿ってセラ
ミック基板1’を複数の棒状片1”とし、図4(1)に
示すように、棒状片1”の長手方向両側面に側面電極層
8を形成、最後に棒状片1”の横スリット溝4に沿って
図4(2)に示すようなチップ状の抵抗器に分割する。
Next, as shown in FIG. 3 (1), the resistance is set for each arbitrary unit area defined by the substantially through slit 3 and the slit groove 4 on the ceramic substrate 1'formed by the above method. After the body layer 5 and the surface electrode layer 6 are formed and trimmed to adjust the resistance value, the protective layer 7 that covers the resistor layer 5 is formed. Then, as shown in FIG. 3 (2), the ceramic substrate 1'is formed into a plurality of rod-shaped pieces 1 "along the slit grooves 4'at both ends and each of the substantially through slits 3, and as shown in FIG. 4 (1). Then, the side surface electrode layers 8 are formed on both side surfaces in the longitudinal direction of the rod-shaped piece 1 ″, and finally divided along the lateral slit groove 4 of the rod-shaped piece 1 ″ into chip-shaped resistors as shown in FIG.

【0015】なお、上記実施例では、単体のチップ状抵
抗器の製造方法について説明したが、図5に示すように
ネットワークタイプの抵抗器の製造も可能である。図5
に付された符号は、前述の実施例に付されている符号と
同一の関係を示す。ただし、図5における符号9は、略
貫通スリット3及びスリット溝4によって区画された任
意の各単位領域毎に、複数の抵抗体層5及び表面電極層
6を形成する際、互いに隣接する表面電極層6が短絡し
てしまうのを防止するために設けられた貫通孔である。
In the above embodiment, the method of manufacturing a single chip resistor has been described, but it is also possible to manufacture a network type resistor as shown in FIG. Figure 5
The reference numerals attached to indicate the same relationships as the reference numerals attached to the above-described embodiments. However, reference numeral 9 in FIG. 5 is a surface electrode which is adjacent to each other when the plurality of resistor layers 5 and the surface electrode layer 6 are formed in each arbitrary unit region partitioned by the substantially through slit 3 and the slit groove 4. This is a through hole provided to prevent the layer 6 from being short-circuited.

【0016】上記の通り、本願発明に従えば、必要最小
限の強度が保持された略貫通のスリットを有するチップ
状電子部品用のセラミック基板を得ることができる。ま
た、このようなセラミック基板を用いることにより、平
坦な基板分割面を確保することができ、その結果、側面
電極層形成不良や側面電極層剥離、あるいは外観不良等
の問題が生じない良質のチップ状電子部品を得ることが
可能となる。
As described above, according to the present invention, it is possible to obtain the ceramic substrate for the chip-shaped electronic component having the substantially penetrating slit in which the necessary minimum strength is maintained. Further, by using such a ceramic substrate, it is possible to secure a flat substrate dividing surface, and as a result, a high quality chip that does not cause problems such as defective formation of side electrode layers, peeling of side electrode layers, or defective appearance. It becomes possible to obtain the electronic components.

【0017】本発明は、上述の形状及び材料等の構成に
特に限定されるものではない。
The present invention is not particularly limited to the configurations such as the shapes and materials described above.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第一の実施例の説明する一部工程図で
ある。
FIG. 1 is a partial process diagram illustrating a first embodiment of the present invention.

【図2】本発明の第一の実施例の説明する図1の工程に
続く一部工程図である。
FIG. 2 is a partial process diagram that follows the process of FIG. 1 for explaining the first embodiment of the present invention.

【図3】本発明の第一の実施例の説明する図2の工程に
続く一部工程図である。
FIG. 3 is a partial process diagram that follows the process of FIG. 2 for explaining the first embodiment of the present invention.

【図4】本発明の第一の実施例の説明する図3の工程に
続く一部工程図である。
FIG. 4 is a partial process diagram that follows the process of FIG. 3 for explaining the first embodiment of the present invention.

【図5】本発明の第二の実施例の一部を示す図である。FIG. 5 is a diagram showing a part of a second embodiment of the present invention.

【図6】従来例を示す一部工程図である。FIG. 6 is a partial process diagram showing a conventional example.

【図7】従来例を示す図6の工程に続く一部工程図であ
る。
FIG. 7 is a partial process diagram following the process of FIG. 6 showing a conventional example.

【図8】従来例を示す図7の工程に続く一部工程図であ
る。
FIG. 8 is a partial process diagram that follows the process of FIG. 7 showing a conventional example.

【図9】従来の方法で作成されたセラミック基板の棒状
片の断面図である。
FIG. 9 is a cross-sectional view of a rod-shaped piece of a ceramic substrate manufactured by a conventional method.

【図10】従来の未焼成セラミックシートを示す断面図
である。
FIG. 10 is a cross-sectional view showing a conventional unfired ceramic sheet.

【図11】従来の金型及び未焼成セラミックシートを示
す説明図である。
FIG. 11 is an explanatory view showing a conventional mold and unfired ceramic sheet.

【符号の説明】[Explanation of symbols]

1 未焼成セラミックシート 1’ セラミック基板 1” セラミック基板棒状片 2 貫通孔 3 略貫通スリット 4 スリット溝 5 抵抗体層 6 表面電極層 7 保護層 8 側面電極層 1 Unfired Ceramic Sheet 1'Ceramic Substrate 1 "Ceramic Substrate Rod 2 Through Hole 3 Substantially Through Slit 4 Slit Groove 5 Resistor Layer 6 Surface Electrode Layer 7 Protective Layer 8 Side Electrode Layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】未焼成セラミックシートに、対向する一対
の貫通孔を複数設ける工程と、前記一対の貫通孔間に略
貫通のスリットを設ける工程と、前記略貫通のスリット
に直交する複数のスリット溝を設ける工程と、前記未焼
成のセラミックシートを焼成してセラミック基板とする
工程と、を有することを特徴とするチップ状電子部品用
セラミック基板の製造方法。
1. A step of forming a plurality of pairs of through holes facing each other in an unfired ceramic sheet, a step of forming a slit of a substantially penetrating hole between the pair of through holes, and a plurality of slits orthogonal to the slit of the substantially penetrating hole. A method of manufacturing a ceramic substrate for a chip-shaped electronic component, comprising: a step of providing a groove; and a step of firing the unfired ceramic sheet to form a ceramic substrate.
【請求項2】請求項1記載の方法によって製造された前
記セラミック基板上の前記略貫通のスリット及び前記ス
リット溝で区画された任意の各単位領域毎に、少なくと
も一つの受動素子層及び表面電極層を形成する工程と、
前記略貫通のスリットに沿って前記セラミック基板を分
割する工程と、前記分割による分割面に側面電極層を設
ける工程と、を有することを特徴とするチップ状電子部
品の製造方法。
2. At least one passive element layer and a surface electrode for each unit area defined by the slit and the slit groove on the ceramic substrate manufactured by the method according to claim 1. Forming a layer,
A method for manufacturing a chip-shaped electronic component, comprising: a step of dividing the ceramic substrate along the substantially penetrating slit; and a step of providing a side surface electrode layer on a division surface obtained by the division.
JP7199768A 1994-09-09 1995-08-04 Manufacture of ceramic substrate for chip-type electronic component and chip-type electronic component Pending JPH08130107A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7199768A JPH08130107A (en) 1994-09-09 1995-08-04 Manufacture of ceramic substrate for chip-type electronic component and chip-type electronic component

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP21585694 1994-09-09
JP6-215856 1994-09-09
JP7199768A JPH08130107A (en) 1994-09-09 1995-08-04 Manufacture of ceramic substrate for chip-type electronic component and chip-type electronic component

Publications (1)

Publication Number Publication Date
JPH08130107A true JPH08130107A (en) 1996-05-21

Family

ID=26511737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7199768A Pending JPH08130107A (en) 1994-09-09 1995-08-04 Manufacture of ceramic substrate for chip-type electronic component and chip-type electronic component

Country Status (1)

Country Link
JP (1) JPH08130107A (en)

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