JPH0797855B2 - Magnetic recording / playback device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a magnetic recording / reproducing apparatus having a function of, for example, a function of prohibiting recording of a video signal added with a recording prohibition signal, such as a function of prohibiting dubbing.

[Conventional technology]

Along with the spread of magnetic recording and reproducing devices for home use, the market for soft tapes on which movies and the like are recorded and marketed is expanding, and along with this, there is a problem with copyrights relating to soft tapes. That is, the copyright is infringed by the duplication of the soft tape, but in the past, the dubbing of the soft tape could be easily performed in a general household. However, its scale cannot be grasped.

As a method of this measure, it is sufficient to prevent the video signal reproduced from the soft tape from being recorded by the magnetic recording / reproducing apparatus. One specific example is a copy guard signal during the vertical blanking period of the video signal. There has been proposed a device to which a recording prohibition signal referred to as is added (for example, Japanese Patent Laid-Open No. 61-288582). According to this conventional technique, a plurality of pairs of a pseudo sync signal having the same polarity as the horizontal sync signal and a pulse having the different polarity from the horizontal sync signal are added as a pair within the vertical blanking period of the video signal, and this is used as a copy guard signal. In a magnetic recording / playback device,
The AGC (automatic gain control) circuit provided in the recording system malfunctions due to this copy guard signal, and the input video signal added with such copy guard signal is set to a very low level and satisfactory recording and reproduction cannot be performed. To do so.

[Problems to be solved by the invention]

By the way, when a video signal with the above-mentioned copy guard signal is input to the magnetic recording / reproducing apparatus, the recording system AGC circuit responds to this copy guard signal in order to prevent the video signal from being recorded. And then have to malfunction. In the above-mentioned conventional technique, it is premised that the characteristics of the AGC circuit are left as they are and that the AGC circuit malfunctions in response to the copy guard signal.

However, the actual AGC circuit is designed so that it does not respond to pulses with a pulse width narrower than the normal horizontal sync signal in consideration of weak electric field characteristics, malfunction prevention due to spike noise, and the dynamic range of the AGC detection circuit. It is generally done. However, in the above conventional technique, the pulse width of the pseudo sync signal of the copy guard signal is set narrower than the pulse width of the horizontal sync signal, and the actual AGC circuit does not respond to this pseudo sync signal. Then, there was a problem that the desired effect of prohibiting recording could not be obtained.

An object of the present invention is to solve such a problem and to provide a magnetic recording / reproducing apparatus which surely performs favorable recording / reproduction and recording prohibition according to the presence or absence of a recording prohibition signal.

[Means for solving problems]

In order to achieve the above object, the present invention provides an AGC circuit for setting an input video signal to an optimum level, a means for detecting a recording inhibit signal added to an input video signal, and a detection output of the means. And means for setting the gain of the AGC circuit to be sufficiently small.

[Action]

When the recording prohibition signal is not detected, the AGC circuit performs a normal AGC operation and sets the input video signal to the optimum level. When the recording prohibition signal is added to the input video signal, this is detected and the gain of the AGC circuit becomes very small. Therefore, the level of the input video signal is sufficiently suppressed. Therefore, even if this is recorded, an abnormal reproduced image that can hardly be monitored can be obtained.

〔Example〕

 Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a magnetic recording / reproducing apparatus according to the present invention, in which 1 is an input terminal, 2 is an automatic gain control amplifier (hereinafter referred to as AGC amplifier), and 3 is a luminance signal and a color signal. Separation circuit (hereinafter referred to as Y / C separation circuit), 4,5
Is an output terminal, 6 is a sync separation circuit, 7 is a pulse generation circuit,
Reference numeral 8 is an AGC detection circuit, 9 is an adder, 10 is a capacitor, 11 is a gate pulse generation circuit, 12 is a switch, 13 is a sub-pulse generation circuit, and 14 is a sub-AGC detection circuit.

In the figure, AGC amplifier 2, AGC detection circuit 8, capacitor 1
The loop consisting of 0, the sync separation circuit 6 and the pulse generation circuit 7 constitutes a conventional keyed AGC circuit. First, the operation of the part constituting the conventional keyed AGC circuit will be described.

A color video signal is input to the input terminal 1 and is supplied to the Y / C separation circuit 3 through the AGC amplifier 2. The Y / C separation circuit 3 separates the color video signal into a luminance signal Y and a color signal C. The luminance signal Y is output from an output terminal 5 to a luminance signal recording processing circuit (not shown), and the color signal C is output from an output terminal 4. Not supplied to the respective color signal recording processing circuits.

The luminance signal Y output from the Y / C separation circuit 3 is also AGC.
It is supplied to the detection circuit 8 and the sync separation circuit 6. In the sync separation circuit, the composite sync signal CS is separated from the luminance signal, which is supplied to the pulse generation circuit 7 to form a key pulse having a pulse width of approximately 2 μsec, which is delayed by approximately 1 μsec from the trailing edge of the horizontal sync signal. In the AGC detection circuit 8, the pulse generation circuit 7
A part of the horizontal blanking period of the luminance signal from the Y / C separation circuit 3 is amplified at the timing of this key pulse from. Therefore, the amplified portion has a pulse shape, which is equivalent to the pulse added during the horizontal blanking period. AGC
In this way, the detection circuit 8 adds the pulse for the horizontal blanking period at the timing of the key pulse and detects the peak value of this additional pulse.

Here, when the amplification factor of the portion amplified by the key pulse in the horizontal blanking period is K, this amplification factor K is given by assuming that the above pulse is added to the luminance signal at the optimum level by the key pulse. The values are set so that the peak value is at 100% white level. Therefore, when the level of the luminance signal deviates from the optimum level, the peak of the pulse added to this luminance signal also deviates from the white level of 100%, and the AGC detection circuit 8 changes the peak value of this pulse. The deviation from the white level is detected. The signal representing the peak value of the pulse detected by the AGC detection circuit 8 is accumulated in the capacitor 10 through the adder 9, and the amplification factor of the AGC amplifier 2 is adjusted by the charging voltage of this capacitor 10 to obtain the luminance signal Y. The gain is controlled so that the level of is the optimum level.

Next, the operation of the part constituting the above-mentioned conventional keyed AGC circuit when a color video signal added with a copy guard signal for prohibiting recording is input to the input terminal 1 will be described. Here, the copy guard signal is, for example,
It is added within 7 horizontal scanning periods after the equalizing pulse period following the vertical synchronizing signal in the vertical retrace line period of the color video signal, and in these horizontal scanning periods, as shown in FIG. It consists of 5 combinations of pseudo sync signal 16 and 100% white level pulse immediately following it (hereinafter referred to as 100% white signal). The pulse width of pseudo sync signal 16 is about 2μ.
sec, the pulse width of the 100% white signal 17 is about 4 μsec, and their repetition period is about 8 μsec. In addition, 15 is a horizontal synchronizing signal.

In FIG. 1, the color video signal to which the copy guard signal is added is passed through the AGC amplifier 2 to the Y / C separation circuit 3
And are divided into a color signal C and a luminance signal Y. The luminance signal Y is supplied to the AGC detection circuit 8 and the sync separation circuit 6, and the sync separation circuit 6 separates the composite sync signal and the pseudo sync signal 16 (FIG. 2 (a)) of the copy guard signal into pulses. It is supplied to the generation circuit 7.

By the way, as shown in FIG. 2 (c), the pulse generation circuit 7 outputs this for each horizontal sync signal 15 in FIG. 2 (a) along with the key pulse 18 delayed by about 1 μsec from this for each pseudo sync signal 16. By forming a similar key pulse 19 which is delayed by about 1 μsec from the above, in the AGC detection circuit 8, the 100% white signal 17 of the copy guard signal shown in FIG. 2 (a) is amplified by the amplification factor K by each key pulse. To be done. The peak value of the 100% white signal 17 thus amplified is the horizontal sync signal 15
The peak value is sufficiently larger than the peak value of the previous pulse by the key pulse 18 formed from FIG. 2 (a), this peak value is detected, and this detection signal is also output and stored in the capacitor 10. Therefore, the charging voltage of the capacitor 10 becomes higher than that without the copy guard signal, and the AGC amplifier 2
The amplification level of is extremely small and its output level is sufficiently suppressed. As a result, the level of the signal to be recorded and reproduced becomes very low, a normal reproduced image cannot be obtained, and it is equivalent to the prohibition of recording.

However, it is also necessary that the pulse generation circuit 7 does not generate an erroneous key pulse due to noise. For this reason, it also has a noise removal function. Whether or not the input pulse is noise is determined based on the pulse width of this pulse. In the conventional keyed AGC circuit, the pulse generation circuit 7 has a pulse width larger than that of the normal horizontal synchronizing signal. The narrow input pulse is cut as noise so that the key pulse is not generated.

Therefore, the pulse width of the pseudo sync signal 16 in FIG. 2 (a) is 1/2 of the pulse width of the normal horizontal sync signal 15 of about 4.5 μsec.
Since it is below (about 2 μsec), the pulse generation circuit 7 cuts the pseudo synchronization signal 16 as noise, and as shown in FIG. 2 (b), it is horizontal to the color video signal to which the copy guard signal is added. The key pulse 18 is generated only when the synchronizing signal 15 is input. For this purpose, AG
The C detection circuit 8 detects the pulse immediately after the horizontal synchronizing signal added by the key pulse 18 and the peak value of the 100% white signal 17 as input as shown in FIG. With the charging voltage of the capacitor 10 according to the result
The amplification factor of the AGC amplifier 2 will be adjusted. Therefore, the color video signal output from the AGC amplifier 2 has a sufficient level, and the recording prohibition is not performed.

FIG. 3 is a circuit diagram showing a specific example of the pulse generating circuit 7 in FIG. 1, in which 20 is an input terminal, 21 to 25 are current sources, 26 to 32 are transistors, 33 to 35 are capacitors, 36
Is an output terminal.

Hereinafter, using FIG. 4 showing the voltage waveforms of the respective parts of FIG. 3,
The operation of this specific example will be described. In addition, in FIG.
The same reference numerals are given to the voltages corresponding to the figures.

Normally, the base voltage E ₁ of the transistor 26 is “H” (high level), and the transistor 26 is in the ON state. Because of this, capacitor 33 is in the discharged state and transistor 27
The base voltage E ₂ of the
27 is off. The capacitor 34 is fully charged by the current source 22, the base voltage E ₃ of the transistors 28 and 29 is sufficiently high, and the transistors 28 and 29 are on. Therefore, the base voltage E ₄ of the transistors 30 and 31 is "L".
In the OFF state, the capacitor 35 is charged by the current source 24. Therefore, the transistor 32 is in the ON state due to its high base voltage E ₅ .

Thus, normally, the transistor 30 is off and the transistor 32 is on, the current of the current source 25 flows into the transistor 32, and the output voltage E ₆ of the output terminal 36 is “L”.
Is.

In this state, when a negative pulse is input from the input terminal 20, the falling edge of the pulse causes the base voltage E ₁ of the transistor 26 to be “L”, which is turned off, and the capacitor 33 receives the current from the current source 21. Charging is started by the electric current. Therefore, the base voltage E ₂ of the transistor 27 gradually rises, but when the base voltage E ₂ becomes equal to or higher than the base-emitter voltage V _{BE of the} transistor 27, the transistor 2
7 turns on.

Thus, when the pulse width of the input pulse to the input terminal is longer than the charging time to the charging voltage V _BE of the capacitor 33, the transistor 27 is inverted from the off state to the on state, but the pulse width of the input pulse is this charge. When it is shorter than the time, the state inversion of the transistor 27 does not occur. As a result, a pulse having a pulse width shorter than this charging time can be cut. Therefore, the pulse width of the input pulse cut by the capacitor 33 and the current value of the current source 21 is determined.

Next, when the transistor 27 is turned on, the capacitor 34 is discharged through the transistor 27, and the base voltages E _{3 of the} transistors 28 and 29 are lowered to turn them off. As a result, the transistors 30 and 31 have their base voltages E ₄ and E ₄ ′ at “H”.
Then, it is turned on. When the transistor 31 turns on, the capacitor 35
Discharged through the transistor 32, its base voltage E ₅
Is decreased, the state becomes an off state.

As described above, since the transistor 27 is turned on, the current flow of the current source 25 changes from the transistor 32 to the transistor 32.
Switching to 30, the output voltage E ₆ is still held at "L". This is the start operation when a pulse having a pulse width longer than the charging time to the charging voltage V _BE of the capacitor 33 is input.

When the transistor 26 turns on at the rising edge of the input pulse in which the base voltage E ₁ of the transistor 26 is inverted from “L” to “H”, the capacitor 33 is discharged through the transistor 26,
The transistor 27 is turned off when its base voltage E ₂ drops. Therefore, the transistor 34 starts to be charged by the current source 22 from the rising edge (trailing edge) of the input pulse, and the base voltage E ₃ of the transistors 28 and 29 rises. Then, this base voltage E ₃ is applied to the transistor 2
When the base-emitter voltage of 8,29 or more is exceeded, the transistors 28,29 are turned on, and therefore the transistors 30,31 are turned off when their base voltages E ₄ , E ₄ ′ are “L”. It becomes a state. At this time, since the capacitor 35 is not charged, the base voltage E ₅ of the transistor 32 is sufficiently low and the transistor 32 is in the off state.

In this way, when the transistors 28 and 29 are turned on, the transistors 30 and 32 are both turned off.
The current of the current source 25 flows into the output terminal 36, and the output voltage E ₆ rises from “L” to “H”. The “H” part of this output voltage is the key pulse, and the leading edge (rising edge) of this key pulse is delayed from the trailing edge of the input pulse by the charging time until the charging voltage of the capacitor 34 reaches V _BE. . This charging time is the delay time τ _d shown in FIG. Therefore, this delay time τ _d is determined by the capacity of the capacitor 34 and the current of the current source 22.

When the transistor 31 turns off as described above, the capacitor
35 is charged by the current source 24, and the base voltage E ₅ of the transistor 32 rises. Then, when the base voltage E ₅ becomes equal to or higher than the base-emitter voltage V _{BE of the} transistor 32, the transistor 32 is turned on, and the current of the current source 25 flows into the transistor 32. With this, the state before the input of the input pulse is restored, and the output voltage E ₆ is “H”.
To "L".

Therefore, the pulse width of the key pulse obtained at the output terminal 36 is equal to the time from the turning on of the transistors 30 and 31 to the turning off of the transistor 32, and the capacitance of the capacitor 35 and the current source. It is determined by the current value of 24.

In the pulse generating circuit 7 having such a configuration, the noise to be cut can be determined by the current value of the current source 21 or the capacitance of the capacitor 33, as described above. Conventionally, the current value of the current source 21 and the capacity of the capacitor 33 are set so as to cut noise having a pulse width narrower than that of the horizontal synchronizing signal having a pulse width of about 4.5 μsec. Pseudo sync signal of width copy guard signal 1
6 (Fig. 2 (a)) is regarded as noise and cut,
Do not respond to this. In order to prevent the pseudo sync signal 16 from being cut, the capacitance value of the capacitor 33 may be reduced or the current value of the current source 21 may be increased. If you try to respond to a pseudo sync signal with a pulse width of 2 or less, the keyed AGC circuit malfunctions due to noise in response to noise.

Therefore, in FIG. 1, the pulse generation circuit 7 is prevented from responding to a pulse having a pulse width narrower than the normal horizontal synchronizing signal, and the gate pulse generation circuit 11, switch 12, sub-pulse generation circuit 13, Sub-AGC detection circuit 1
A sub-loop consisting of 4 and adder 9 is added so that the keyed AGC circuit performs the recording inhibition operation in response to the copy guard signal.

That is, the composite sync signal output from the sync separation circuit 6
The CS is extracted by the switch 12 controlled by the gate pulse output from the gate pulse generation circuit 11 for a predetermined period to which the copy guard signal after the vertical synchronizing signal in the vertical retrace period is added, It is supplied to the pulse generation circuit 13. The sub-pulse generation circuit 13 has the same configuration as the pulse generation circuit 7, but the characteristics are set so as to respond to the pseudo sync signal of the copy guard signal. From the circuit 13, as shown in FIG. 2 (c), the pseudo sync signal 16 (FIG. 2 (a))
A pulse 19 having a key pulse width of about 2 μsec, which is delayed by about 1 μsec from the trailing edge, is output.

In the sub-AGC circuit 14, the key pulse 19 causes the pulse to precede the 100% white signal 17 (FIG. 2 (a)) of the copy guard signal added to the luminance signal Y supplied from the Y / C separation circuit 3. As described above, the peak value is detected by duplication. The signal representing this peak value is supplied to the capacitor 10 via the adder 9, whereby the AGC amplifier 2
The amplification factor is sufficiently reduced, and the level of the output signal is sufficiently suppressed. Therefore, the recording is prohibited.

FIG. 5 is a block diagram showing a specific example of the gate pulse generation circuit 11 in FIG. 1, in which 37 and 38 are input terminals and 39
Is a pulse counter and 40 is an output terminal.

In the figure, the input terminal 37 is connected to the sync separation circuit 6 (first
The vertical synchronizing signal VD of the composite synchronizing signal CS output by the drawing) is input, and the horizontal synchronizing signal HD is also input to the input terminal 38. The vertical synchronizing signal VD is supplied to the pulse counter 39 as a reset signal and the horizontal synchronizing signal HD is supplied to the pulse counter 39 as a clock signal. The pulse counter 39 sets its output to "H" (high level) when reset by the trailing edge of the vertical synchronizing signal VD, starts counting the horizontal synchronizing signal HD from the trailing edge of the vertical synchronizing signal VD, and outputs 14 pulses. Horizontal sync signal HD
When counting, the output is set to "L" (low level). Therefore, at the output terminal 40, a signal which becomes "H" for approximately 14 horizontal scanning periods is obtained from the trailing edge of the vertical synchronizing signal VD,
This signal is supplied as a control signal to the switch 12 (Fig. 1), and the switch 12 is closed during the "H" period of the control signal.

As described above, in this embodiment, when the color video signal to which the copy guard signal is not added is input, the keyed AGC circuit performs the normal AGC operation and the normal recording is possible, and the copy guard signal is added. When the input color video signal is input, the keyed AGC circuit significantly reduces the gain in response to the copy guard signal, and the recording is prohibited properly.

FIG. 6 is a block diagram showing another embodiment of the magnetic recording and reproducing apparatus according to the present invention, in which 41 is a detection circuit and 42 is a switch, and the parts corresponding to those in FIG. The description will be omitted.

In the figure, the composite sync signal CS output from the sync separation circuit 6 is directly supplied to the sub-pulse generation circuit 13, and the switch 12 causes the copy guard signal from the trailing edge of the vertical sync signal as in FIG. The part of the predetermined period including the additional period of is extracted and supplied to the detection circuit 41. Detection circuit
Reference numeral 41 detects whether or not the input signal has a pseudo sync signal 16 (FIG. 2 (a)) which is a copy guard signal.
When 16 is not detected, the switch 42 is closed to the A side, and when the pseudo sync signal 16 is detected, the switch 42 is closed to the B side.

Similar to FIG. 1, the pulse generator 7 does not respond to the pseudo sync signal in response to the horizontal sync signal,
13 also responds to the pseudo sync signal. When the copy guard signal is not added to the color video signal input to the input terminal 1, the switch 42 is closed to the A side by the detection circuit 41, and the amplification factor of the AGC amplifier 2 becomes the detection signal of the AGC detection circuit 8. Accordingly, the recording operation is performed normally. On the other hand, when the copy guard signal is added to the color video signal input to the input terminal 1, the detection circuit 41
Accordingly, the switch 42 is closed to the B side, the amplification factor of the AGC amplifier 2 is set sufficiently small by the detection signal of the sub-AGC detection circuit 14, and the recording is prohibited.

FIG. 7 is a block diagram showing a specific example of the detection circuit 41 in FIG. 6, in which 43 is a pulse counter, 44 is an output terminal, and 45, 46, 47 are input terminals.

In the figure, the input terminal 45 is connected to the sync separation circuit 6 (the fifth
The composite synchronizing signal CS output by the figure) is input and supplied to the pulse counter 43 as a clock signal. Further, the horizontal synchronizing signal HD separated from the composite synchronizing signal CS is inputted to the input terminal 46, and is inputted to the pulse counter as a reset signal.
Supplied to 43. The pulse counter 43 has a horizontal sync signal HD.
After the reset by, the input pulse becomes ready for counting, but after the reset is released, the pseudo sync signal 16 is input and when this is counted by a predetermined number (for example, 2),
The output level is inverted from "L" to "H". The pulse counter 43 is also provided with a holding means, and the output level thereof is held. The resetting of the hold means is performed by the vertical synchronizing signal VD input to the input terminal 47.

Therefore, when the composite sync signal CS does not include the pseudo sync signal 16 (FIG. 2A) of the copy guard signal, the level of the signal obtained at the output terminal 44 is "L". When the pseudo sync signal 16 is included in CS, the level of this signal becomes "H", whereby the switch 42 (Fig. 6) can be controlled.

FIG. 8 is a block diagram showing another specific example of the detection circuit 41 in FIG. 6, in which 48 is a reference voltage source, 49 is a mono-multivibrator, 50 is a voltage comparator, and corresponds to FIG. The parts are given the same reference numerals.

In the figure, the mono multivibrator 49 has an input terminal 46.
It is triggered by the trailing edge of the horizontal synchronizing signal HD from and outputs a pulse having a pulse width of, for example, about 20 μsec from the trailing edge. The voltage comparator 50 compares the amplitude of the composite synchronizing signal CS from the input terminal 45 with the reference voltage E _s from the reference voltage source 48 during this pulse.

This reference voltage E _s is set to about the intermediate level of the pseudo sync signal 16 (FIG. 2 (a)), and when the copy guard signal is added to the input color video signal,
Within the period of the pulse from the mono multivibrator 49,
There are two pseudo sync signals 16 in the composite sync signal CS from the input terminal 45.

Therefore, when the copy guard signal is not added to the input video signal, the comparison output level of the voltage comparator 50 is always "L", but when the copy guard signal is added to the input video signal, the pseudo sync signal is The comparison output level of the 16-period voltage comparator 50 becomes "H". This comparison output level is held by the holding means in the voltage comparator 50,
This hold voltage is supplied as a control signal from the output terminal 44 to the switch 42 (Fig. 6).

FIG. 9 is a block diagram showing still another embodiment of the magnetic recording / reproducing apparatus according to the present invention. Reference numeral 51 is a capacitor, parts corresponding to those in FIG. To do.

This embodiment differs from the embodiment shown in FIG. 6 in that
In the figure, the AGC detection circuit 8 and the pulse generation circuit 7 can be used both when the input color video signal is added with the copy guard signal and when it is not added. The generation circuit 7 is configured so that the characteristics can be switched according to the output level of the detection circuit 41, the capacitor 51 is provided in addition to the capacitor 10, and the switch 42 is controlled by the output signal of the detection circuit 41 Switch and select 10,51. Here, the capacity of the capacitor 51 is sufficiently smaller than the capacity of the capacitor 10.

When the copy guard signal is not added to the color video signal input to the input terminal 1, the pulse generation circuit 7 responds to a pulse having a pulse width narrower than the pulse width of the horizontal synchronization signal by the output signal of the detection circuit 41. The characteristic that is not set is set, and the switch 42 is closed to the A side to select the capacitor 10 having a large capacitance. As a result, the amplification factor of the AGC amplifier 2 is adjusted according to the output level of the AGC detection circuit 8 and recording is performed at the optimum level, as in the previous embodiment.

On the other hand, when a copy guard signal is added to the color video signal input to the input terminal 1, the pulse generator circuit 7 outputs the copy guard signal pseudo sync signal 16 (second The characteristics are set so as to respond also to FIG. 7A, and the switch 42 is closed to the B side to select the capacitor 51 having a small capacitance. As a result, similar to the previous embodiment, the AGC detection circuit 8 superimposes a pulse on the 100% white signal of the copy guard signal by a key pulse to detect its peak value, and reduces the signal corresponding to this peak value. Since it is stored in the capacitor 51 having a capacity, the amplification factor of the AGC amplifier 2 becomes sufficiently small, and thus the recording is prohibited.

The pulse generation circuit 7 in FIG. 9 can have the configuration shown in FIG. 3, and in this case, the current value of the current source 21 and the capacitance value of the capacitor 33 are switched according to the output signal of the detection circuit 41. As a result, the characteristics can be switched as described above.

〔The invention's effect〕

As described above, according to the present invention, when the copy guard signal is added to the input video signal, the AG is set so as to surely detect the copy guard signal and prohibit the recording.
The characteristics of the C circuit can be set, and when a copy guard signal is not added to the input video signal, malfunctions due to noise of the AGC circuit and deterioration of the operating characteristics at the time of a weak electric field are prevented, and The video signal can be set to the optimum level, and the excellent effect that the recording at the optimum level and the prohibition of the recording by the copy guard signal can be performed without error is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a magnetic recording / reproducing apparatus according to the present invention, and FIG. 2 is a waveform diagram showing a copy guard signal and output signals of a pulse generating circuit and a sub-pulse generating circuit in FIG. FIG. 3 is a circuit diagram showing a specific example of the pulse generation circuit and sub-pulse generation circuit in FIG. 1, FIG. 4 is an operation explanatory view of this specific example, and FIG. 5 is a gate pulse generation circuit in FIG. Block diagram showing an example,
FIG. 6 is a block diagram showing another embodiment of the magnetic recording / reproducing apparatus according to the present invention, FIGS. 7 and 8 are block diagrams showing specific examples of the detection circuit in FIG. 6, and FIG. 9 is the present invention. FIG. 11 is a block diagram showing still another embodiment of the magnetic recording / reproducing apparatus according to the present invention. 1 …… input terminal, 2 …… AGC amplifier, 5 …… output terminal,
6 ... Synchronous separation circuit, 7 ... Pulse generation circuit, 8 ... AG
C detection circuit, 9 ... adder, 10 ... capacitor, 11 ...
Gate pulse generator, 12 ... Switch, 13 ... Sub
Pulse generator circuit, 14-sub-AGC detection circuit, 41-detection circuit, 42-switch, 51-condenser.

 ─────────────────────────────────────────────────── ─── Continuation of front page (56) Reference JP-A-61-288582 (JP, A) JP-A-57-28485 (JP, A) JP-A-53-78819 (JP, A) JP-A-63- 236488 (JP, A) JP 63-232586 (JP, A) JP 63-234681 (JP, A) JP 61-12435 (JP, B2)

Claims (1)

[Claims] 1. An automatic gain control amplifier to which an input video signal is supplied during recording and a horizontal sync signal of the output video signal in response to the horizontal sync signal of the output video signal of the automatic gain control amplifier. A first detection means for generating a detection output according to the level immediately after, and prohibiting the response to a pulse shorter than 1/2 of the time width according to the standard of the horizontal synchronization signal, and the automatic gain control In the magnetic recording / reproducing apparatus in which the gain of the automatic gain control amplifier is controlled in accordance with the detected output so that the output video signal of the amplifier for video becomes the optimum level, the horizontal synchronizing signal is added to the input video signal. Pseudo-synchronization signal shorter than 1/2 of the time width according to the standard, and sufficiently higher than the level of the output video signal of the automatic gain control amplifier detected by the first detection means immediately after the pseudo-synchronization signal. High level recording When an image inhibition signal is added, at least in response to the pseudo sync signal of the output video signal of the automatic gain control amplifier, at least according to the level of the recording inhibition signal added to the output video signal. For controlling the gain of the automatic gain control amplifier according to the sum of the second detection means for generating the detected output and the detection outputs of the first and second detection means. When the signal does not have the recording prohibition signal, the gain of the automatic gain control amplifier is controlled mainly in accordance with the detection output of the first detection means so that the output video signal of the automatic gain control amplifier has an optimum level. When the input video signal has the recording inhibition signal, the gain of the automatic gain control amplifier is controlled mainly in accordance with the detection output of the second detection means to output the automatic gain control amplifier. Image There is provided a control means to ensure a sufficiently low level, the magnetic recording and reproducing apparatus characterized by being configured to be able to disable the recording of the input video signal 該録 image prohibiting signal is added.