JP3132252B2 - Digital video signal recording device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital video signal recording apparatus suitable for use in digital recording equipment such as a digital VTR for digitizing and recording a video signal.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram of a conventional video signal recording system for digital video. A video signal is inputted from an input 10 and an AGC circuit 11 controls a signal level so that the signal level automatically becomes a desired value. Receiving the automatic gain control (hereinafter abbreviated as AGC), performs a sync separation in the sync separation circuit 13 using the video signal subjected to the AGC processing and the gate signal output from the gate signal generation circuit 12, and The synchronization separated as the reference signal is used as the reference signal.
The C-processed video signal is recorded by the magnetic recording circuit 14.

In FIG. 3A, a gate signal is generated by delaying the falling edge of the synchronization part and the rising edge of the synchronization part of the input signal using a monomultivibrator for a normal input signal to which no pseudo synchronization pulse is added. This is a timing chart showing that, when the input signal is Lo and the gate signal is Hi, by setting the separation synchronization signal to Lo, the synchronization is accurately separated even when the equalization pulse appears in the input signal. As described above, the pulse of the half cycle is correctly removed.

A video signal includes a pulse having a half cycle of a horizontal cycle such as an equalizing pulse. This mono-multi vibrator is for removing these 1 / 2-period pulses.

[0005]

FIG. 3B shows an input signal to which a pseudo-sync pulse is added, using a monomultivibrator to generate a gate signal in which the synchronous fall and the synchronous rise of the input signal are delayed, and When the signal is Lo and the gate signal is Hi, the separation synchronization signal is set to Lo, so that the synchronization is accurately separated when the equalization pulse appears in the input signal, but the equalization is performed while the pseudo synchronization pulse is 1H. 9 is a timing chart showing that a malfunction of synchronization separation occurs when the number of pulses is larger than the number of pulses.

When an input signal shown in FIG. 3A is input, an AGC process of the input signal is performed, and then the sync separation circuit 1
The synchronization signal subjected to synchronization separation by the magnetic recording circuit 1
4 and the input signal is recorded by the magnetic recording circuit 14 on the basis of the reference signal. After the AGC process is performed on the input signal to which the pseudo-sync pulse shown in FIG. If synchronization separation is performed by the synchronization separation circuit 13, correct synchronization separation becomes difficult. As a result, if an input signal is recorded in the magnetic recording circuit 14 using the synchronization signal subjected to synchronization separation in FIG. Is not recorded.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional problems and to provide a digital video signal recording apparatus which enables normal recording even in the presence of a pseudo sync pulse. It is provided with.

[0008]

According to the present invention, there is provided a digital video signal recording apparatus, comprising: a sync separation means for extracting a synchronization signal from an input video signal; and processing the input video signal based on the separated synchronization signal. Video recording means comprising recording means for recording, wherein a pseudo-sync pulse detection means for detecting a pseudo-sync pulse during a blanking interval of the input video signal, and a pseudo-sync pulse detected by the pseudo-sync pulse detection means. In the case where a false sync pulse is detected, the level of the pseudo sync pulse is converted to a pedestal level or more and sent to the sync separation means. If not detected, an input video signal is sent to the sync separation means as it is.

[0009]

According to the present invention, when a video signal mixed with a pseudo sync pulse is input to a digital VTR, the pseudo sync pulse detector detects the pseudo sync pulse and deletes or removes the pseudo sync pulse. A normal gate signal is generated by setting the negative value of the pulse to the pedestal level, normal sync separation is performed from the video signal from which the gate signal and the pseudo sync signal have been deleted, and the digital VTR is supplied to the digital VTR based on the normal sync obtained from the sync separation. Video signals can be recorded normally.

[0010]

FIG. 1 is a block diagram showing the configuration of a digital video signal recording apparatus according to an embodiment of the present invention. FIG.
First, a video signal is input to the input 1. The input video signal is judged by the pseudo sync pulse detection circuit 2 as to whether or not a pseudo sync pulse is mixed. First, when the pseudo sync pulse is not detected from the input signal by the pseudo sync pulse detection circuit 2, the selector 3 outputs the video signal as it is. Second, when a pseudo sync pulse is detected, a video signal is output in which the negative value of the pseudo sync pulse in the video signal is set to a pedestal level. In this way, the negative value of the pseudo sync pulse is deleted from the video signal, and the video signal free of the pseudo sync pulse is passed through the AGC circuit 4 to perform the AGC process. In addition, the delay circuit 5 delays the input signal in order to reflect the time required for pseudo-sync pulse detection performed on the input signal and the time required for the AGC processing to the input video signal. And A
In accordance with the gain obtained by the GC circuit 4, the output of the delay circuit 5, that is, the input video signal in which the pseudo sync pulse is present is input to the amplifier circuit 6 for amplifying the input signal. For the AGC-processed video signal, a gate signal is generated using a mono-multi vibrator to delay the falling edge and the rising edge of the synchronization portion of the input signal using a monomultivibrator to accurately separate synchronization even when an equalization pulse appears in the input signal. The signal passes through a gate signal generation circuit 7. An accurate synchronization is separated from the video signal and the gate signal in which no pseudo sync pulse exists in the sync separation circuit 8, and the input video signal is correctly digitally recorded in the magnetic recording circuit 9 based on the extracted correct synchronization.

The detection signal of the pseudo sync pulse from the pseudo sync pulse detection circuit 2 is also sent to the magnetic recording circuit 9. In this way, the magnetic recording circuit 9 can control the recording of the video signal itself or the recording of the video signal by transforming it based on the detection signal of the pseudo sync pulse. Generally, a video signal to which a pseudo-synchronous signal is added is often provided to prevent copying.

[0012]

As described above, the digital VTR recording system of the present invention can accurately perform sync separation even when a pseudo sync pulse is present in an input video signal. Digital recording. Therefore, there is a great practical effect when used in digital video equipment such as a digital VTR, digital magnetic or optical disk.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a digital video signal recording device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional digital video signal recording device.

3A is a timing chart for explaining an input signal in which a pseudo sync pulse is not mixed and a horizontal sync signal separation using a mono multivibrator; FIG. 3B is a timing chart showing an input signal in which a pseudo sync pulse is mixed and a mono signal; Timing diagram for explaining horizontal synchronization signal separation using multivibrator

[Explanation of symbols]

 2 Pseudo sync pulse detection circuit 3 Selector 4 AGC circuit 5 Delay circuit 6 Amplification circuit 7 Gate signal generation circuit 8 Sync separation circuit 9 Magnetic recording circuit

Continuation of the front page (56) References JP-A-57-23366 (JP, A) JP-A-63-232586 (JP, A) JP-A-6-113166 (JP, A) JP-A-6-350959 (JP) , A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H04N 5/10 H04N 5/91-5/956 G11B 20/10 351

Claims (1)

(57) [Claims] 1. A video recording unit comprising: a synchronization separation unit that extracts a synchronization signal from an input video signal; and a recording unit that processes and records the input video signal based on the separated synchronization signal, A pseudo sync pulse detecting means for detecting a pseudo sync pulse during a blanking interval of the input video signal, and when the pseudo sync pulse is detected by the pseudo sync pulse detecting means, the level of the pseudo sync pulse is set to a pedestal level or more. Converted and sent to the synchronization separation means,
A digital video signal recording device comprising: a selection unit that sends an input video signal to the synchronization separation unit as it is when the video signal is not detected.