JPH0666895B2 - Sync separation circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sync separation circuit in a television receiver, and in particular, a correct horizontal sync signal and an equalized pulse are separated even if a video signal on which a ghost signal is superimposed is input. The present invention relates to a horizontal synchronizing signal / equalization pulse separation circuit that is obtained as described above.

[Background of the Invention]

When radio waves reflected by buildings or mountains other than direct waves (desired waves) arrive at the receiving antenna, they are displayed as multiple images on the receiver due to the delay time difference. This is called a so-called ghost, but the ghost applied to a television receiver is a major cause of deterioration in image quality.
Conventionally, various methods have been tried to remove and prevent ghosts.

For automatic ghost deletion, the ghost delay time,
It is necessary to automatically detect the polarity and magnitude, and it is common to use a vertical synchronizing signal as the reference waveform.

In such a ghost removing system, since the vertical synchronizing signal serving as the reference waveform is extracted from the video signal on which the ghost is superimposed, a sync separation circuit which is a rough time reference is very important. That is, even in the case of a ghost-superimposed video signal, the sync separation circuit must operate correctly to separate the horizontal sync signal and the equalization pulse, and the output thereof must find the location where the vertical sync signal exists. Otherwise, the vertical sync signal, which is the reference waveform, cannot be detected, so false ghost information will be obtained, and as a result, unstable operation such as adding a ghost will occur rather than removing the ghost. become.

In view of such circumstances, the present invention enables reliable separation even when a large ghost is superposed.

FIG. 1 is a waveform diagram showing, before and after the ghost is superimposed, in particular, a portion of the vertical synchronizing signal and the video signal before it, and the sync separation output after the ghost is superimposed. When a ghost having the same polarity as shown in (b) is added to a desired signal as shown in FIG. 1 (a), the waveform after ghost superposition becomes (c). The conventional sync separation circuit clamps the peak value of the sync signal included in the video signal, and slices the sync signal at a level slightly higher than the clamp voltage to separate the sync signal. Therefore, as an example, if the slice level is set as shown by the dotted line in (c), the sync separation output will be as shown in (d), and the horizontal sync signal after the video information will rise due to ghost. , Can no longer be separated.

Further, if the slice level is set a little higher, as is already clear, the missing horizontal sync signal is now separated, but the horizontal sync signal and the equalization pulse generated by the ghost are also separated. It is very difficult to obtain a normal sync separation output.

As shown in Japanese Patent Application No. 57-72582, the vertical sync signal is
In the device that counts and detects the separated horizontal synchronizing signal and the equalized pulse, the vertical synchronizing signal cannot be correctly extracted by the conventional method.

[Object of the Invention]

The present invention has been made in view of the above, and an object thereof is to provide a sync separation circuit that can stably separate a horizontal sync signal and an equalized pulse even when a ghost is superimposed.

[Outline of Invention]

In order to achieve the above-mentioned object, in the present invention, by selectively amplifying (sampling) only a portion where a horizontal synchronizing signal and an equalizing pulse exist with respect to a video signal, the slice level It is characterized by facilitating setting.

Example of Invention

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram showing an embodiment of the present invention. In FIG. 2, 1 is a pulse interpolating circuit for inserting a pulse between the inputted flyback pulses, 2 is an OR circuit, 3 is a A clamp circuit for reproducing the DC voltage of the input video signal, 4 is a switch, 5 and 6 are bias power supplies, 7 is a differential amplifier circuit, and 8 is a waveform shaping circuit.

Next, the operation of the present invention will be described with reference to FIG. In the figure, (a) is a video signal on which a ghost is superimposed, and has a waveform exactly the same as that in FIG. 1 (C). This waveform is input to the clamp circuit 3, and the bias power supply 5 gives a predetermined DC voltage to the peak value of the synchronizing signal. (b) is the output of the OR circuit 2, which is the sum of the flyback pulse and the interpolation pulse generated between the flyback pulses by using the flyback pulse as a trigger.
The flyback pulse is obtained by comparing the phase of the horizontal oscillation circuit output and the sync separation output in the television receiver. Therefore, even if the multi-small sync separation output is disturbed, its average phase is large. It occurs at the position of the sync signal in the input video signal very stably unless it changes to (1H). Further, since the interpolation pulse is triggered by this flyback pulse, it can be stably generated. Therefore, a pulse having a period of 1 / 2H can be stably obtained.

Next, the clamped video signal is led to the input terminal of the switch 4, but the switch 4 conducts only when an output is obtained from the OR circuit, and the switch output is supplied to the differential amplifier circuit 7. Further, a voltage slightly higher than the DC voltage applied to the clamp circuit 3 is applied to the other input of the differential amplifier circuit 7 by the bias power supply 6, and is substantially equal to the pedestal voltage of the input video signal. Therefore, as shown in (C), only the synchronizing signal, the equalization pulse, and the video signal sampled by the flyback pulse and its interpolation pulse are obtained at the output of the differential amplifier circuit 7 with the pedestal voltage as a reference. As a result, the output of the unnecessary signal generated due to is not obtained.

As described above, the video signal sampled in (C) is higher than the pedestal voltage and the synchronizing signal is low, so if the waveform shaping circuit 8 performs waveform shaping with the threshold value shown by the dotted line, the sync separation output shown in (d) is obtained. Can be obtained.

FIG. 4 is a concrete representation of the block diagram shown in FIG. 2, where 9 and 10 are monostable multivibrators and 11 is an OR.
Gate, 12 to 14 are transistors, 15 is a differential amplifier circuit, 16
Is a diode, 17-31 is a resistor, 32 is a switch, 33-36
Is a capacitor.

The operation will be supplementarily described below. The monostable multivibrator 9 triggers the flyback pulse to generate a one-shot pulse having a width of about 1 / 2H. On the other hand, monostable multivibrator
Reference numeral 10 triggers the falling edge of the monostable multivibrator 9 to generate a pulse having a pulse width similar to that of the flyback pulse. Therefore, the flyback pulse interpolation signal is obtained at the output of the monostable multivibrator 10.

The transistor 12 forms an input buffer amplifier, and the diode 16, resistors 21 to 23, and capacitor 35 form a synchronous peak clamp circuit.

The gain of the differential amplifier 15 is determined by the external resistors ₂₀ , ₂₄ and ₂₆ (referred to as R ₂₀ , R ₂₄ and R ₂₆ , respectively), but R ₂₀ >> R
If you select ₂₄ , the gain will be R when the switch 32 is closed.
₂₆ / R ₂₄ is large and when switch 32 is open the gain is R ₂₆ /
(R ₂₀ + R ₂₄ ) R ₂₆ / R ₂₀ resulting in large attenuation. Therefore, the video signal can be selectively amplified only when the output is obtained from the OR gate 11.

The transistors 13 and 14 form a waveform shaping circuit and obtain a shaped sync separation output.

〔The invention's effect〕

As described above, according to the present invention, since the input video signal is selectively amplified (sampled) only where the horizontal synchronizing signal and the equalization pulse exist, the case where the ghost is superposed. However, the slice level can be set very easily, and thus the horizontal synchronizing signal and the equalized pulse can be stably separated.

[Brief description of drawings]

FIG. 1 is a signal waveform diagram showing the problems of the conventional sync separation circuit, and FIG. 2 is a block diagram showing an embodiment of the present invention.
FIG. 3 is a waveform diagram for explaining the operation of FIG. 2, and FIG. 4 is a circuit diagram showing a concrete circuit example of an embodiment of the present invention. 1 ... Interpolation pulse generation circuit, 2 ... OR circuit, 3 ... Clamp circuit, 4 ... Switch, 5,6 ... Bias power supply, 7 ... Differential amplification circuit, 8 ... Waveform shaping circuit.

Claims (1)

[Claims] 1. A sync separation circuit for separating a horizontal sync signal and an equalization pulse from an input video signal, wherein a flyback pulse and the flyback pulse are divided by half.
Pulse generating means for synthesizing a pulse delayed in horizontal synchronization and generating the synthesized pulse at a temporal position where a horizontal synchronizing signal and an equalized pulse of the input video signal are expected to exist; An amplifying means for amplifying the input video signal by selectively setting a high gain for the horizontal synchronizing signal and the equalization pulse of the input video signal in response to the composite pulse of A sync separation circuit comprising a waveform shaping circuit for shaping the output from the amplifying means with a predetermined threshold value and separating and outputting the horizontal synchronizing signal and the equalized pulse.