JPH0797572B2 - Method for forming through hole in semiconductor integrated circuit board - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to VLSI high-density packaging technology, and more particularly to a method for forming through-holes in a semiconductor integrated circuit board suitable for high-density packaging of a CMOS wafer scale integrated circuit board. .

[Background of the Invention]

The wafer scale integrated circuit board requires a large number of input / output signal electrodes. Therefore, instead of arranging the signal electrodes only around the surface of the integrated circuit substrate where the circuit elements are provided,
It is important that the signal electrode can be arranged on the back surface. For that purpose, a through hole for electrically connecting the front surface and the back surface is essential. The formation of this type of through hole usually includes a step of forming a hole and a step of forming a conductor layer on the inner wall of the hole, but as an example of a method of forming a hole in a Si substrate, an example using an anisotropic etching technique is used. "Silicon as a Mechanical Material" by Petersen in Proceedings of The IEEE, Volume 70, Issue 5 (1982).
n as a Mechaincal Material) ”.

Increasing the degree of integration of an integrated circuit of an electronic computer is an important factor for improving not only volume efficiency but also signal delay time. For this purpose, so-called wafer stack mounting in which a plurality of Si substrates (Wafer-Scale-Integration) on which circuits are mounted are laminated is an effective means. In this structure, in order to further shorten the length of the wiring, it is most effective to take out a signal in the normal direction of the circuit board surface and connect it to the next circuit board surface in that direction. Therefore, it is necessary to form through holes in the wafer, but in the conventional wafer stack mounting, there is no technique for forming through holes at high density by anisotropic etching technique.

Furthermore, as a technique for arranging a group of conductors penetrating the plate thickness at a high density for signal connection, there is thermomigration which diffuses Al into the Si substrate, but the resistance value of the conductor part is relatively high, a few Ω. , Si also has a problem in electrical insulation. ("Silicon as a Mechanical Material" Pro-Sweddings by Petersen, KE Silicon as a
Mechaincal Material, Prod.IEEE) 70-5 (1982, 5)
(Mon) page 429) [Object of the invention] It is an object of the present invention to provide a method for forming through holes in a semiconductor circuit substrate with high density.

According to the method of forming a through hole in a semiconductor integrated circuit substrate of the present invention, a through hole that electrically connects the front surface and the back surface of the Si single crystal substrate is formed inside the Si single crystal substrate on the surface of which a circuit element is provided. A step of forming a high-concentration impurity layer on the surface of the Si single-crystal substrate, the high-concentration impurity layer being directly below the high-concentration impurity layer forming the source or drain region of a MOS transistor, And a step of forming a hole reaching the impurity layer by anisotropic etching.

The etching rate of anisotropic etching of a Si substrate depends on the impurity concentration. For example, when a mixed aqueous solution of ethylenediamine and pyrocatechol is used as the etching solution, the boron concentration is about 7 × 10 ¹⁹ / cm ³ or more. The substantial cessation of etching is shown in the references cited above.

Therefore, the above-mentioned object is achieved by making holes by anisotropic etching from the back surface of the substrate and using a high-concentration impurity layer, such as a boron diffusion layer, that constitutes a part of the circuit element provided on the front surface of the substrate as an etching stop layer. Is what you are trying to do. When boron is used as the impurity of the high-concentration impurity layer, a through hole that directly connects the source or drain region of the P-channel MOS transistor provided on the front surface of the substrate and the back surface of the substrate is formed.

Example of Invention

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 is a CM in which a through hole is formed by the method of the present invention.
FIG. 3 is a partial cross-sectional view of an OS wafer scale integrated circuit board. The integrated circuit substrate 1 is a Si single crystal substrate whose surface is a (100) plane. On the surface of the substrate 1, CMOS circuit elements, wiring between circuit elements, and an insulating protective film are formed. In addition, in FIG.
Only the channel MOS transistor is shown and the others are omitted. The transistor is composed of a boron diffusion layer 2 serving as a source or drain region, a SiO ₂ film 3 serving as a gate insulating film, and a polysilicon layer 4 serving as a gate electrode. Further, a high concentration (about 7 × 10 ^{19 in} this embodiment) is applied to a part of the boron diffusion layer 2.
A boron diffusion layer 5 having a thickness of / cm ³ ) is provided and used as a source or drain region and also as a stop layer for anisotropic etching described later.

The through hole 6 is a through hole formed by the method of the present invention. A conductor layer 8 of Al or the like is provided in the through hole 6.
And the SiO ₂ film 7 that electrically insulates the conductor layer 8 from the substrate 1.
Are formed.

In this embodiment, the substrate 1 has a thickness of 400 μm, the high-concentration boron diffusion region 5 has a thickness of 2 μm, and the surface has a size of 30 μm.
The upper part of the through hole 6 has a 20 μm opening, and the lower part has a 590 μm opening.
The iO ₂ film 7 has a thickness of 10 μm, and the conductor layer 8 has a thickness of 3 μm.

2 (a) to 2 (d) are schematic process diagrams showing an embodiment of the method of forming a through hole of the present invention. Si single crystal substrate 1
A circuit element, wiring, an insulating protective film, etc. are formed on the surface of the device by a known method. In FIGS. 2A to 2D, only the high-concentration boron diffusion region 5 is shown.

First, as shown in FIG.
A SiO ₂ film is formed by a sputter deposition method or the like, and the SiO ₂ film is removed only in the through holes by a known etching technique.

Next, as shown in (b), the SiO ₂ film 9 formed in (a)
Is used as a mask to perform anisotropic etching. As an etching solution, a mixed aqueous solution of 17 ml of ethylenediamine, 3 g of pyrocatechol and 8 ml of water is used, the etching temperature is 115 ° C., and the etching time is about 10 hours. Since the etching substantially stops at the high-concentration boron diffusion region 5, it is not necessary to finely control the temperature and time, and a hole reaching the region 5 can be easily drilled.

Next, as shown in (c), SiO _{2 is formed on the} entire surface including the inner wall of the hole.
The film 7 is formed by the sputter deposition method or the like, and the area 5
The SiO ₂ film is removed only by the well-known etching technique.

Finally, as shown in (d), a conductive metal 8 such as Al is vapor-deposited on the entire surface and is removed by etching while leaving only the through hole portion 6, or selective vapor deposition is performed only on the through hole portion 6.

Instead of sputter-depositing the SiO ₂ film in (c), a polymer film such as parylene (registered trademark of Union Carbide) may be deposited. Also in (d)
Instead of Al, Ti / Ni / Au or the like is vapor-deposited, and a low-melting-point metal such as solder is melt-filled, so that bonding with the pin material of another substrate can be easily performed.

〔The invention's effect〕

As described above, according to the present invention, it is possible to easily form the through holes that are directly connected to the circuit elements on the surface of the semiconductor integrated circuit substrate, and therefore it is possible to form the through holes with high density.

[Brief description of drawings]

FIG. 1 is a partial sectional view of a semiconductor integrated circuit substrate including through holes formed by the method of the present invention, and FIG.
(D) is a schematic process drawing showing a through hole forming method of the present invention. 1 ... Semiconductor integrated circuit board 5 ... High-concentration boron diffusion region 6 ... Through hole 7 ... Through hole insulating film 8 ... Through hole conductor layer

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kazuo Sato 1-280, Higashi Koigakubo, Kokubunji, Tokyo (56) References JP-A-53-36185 (JP, A) JP-A-52 -67271 (JP, A) JP-A-58-79773 (JP, A)

Claims (8)

[Claims] 1. A method of forming a through hole for electrically connecting a front surface and a back surface of a Si single crystal substrate inside a Si single crystal substrate having a circuit element provided on the front surface thereof. Process of forming a high concentration impurity layer on the surface of the
A step of forming a hole reaching the high-concentration impurity layer from the back surface of the Si single crystal substrate immediately below the high-concentration impurity layer forming the source or drain region of the transistor by anisotropic etching. Method of forming through hole in circuit board. 2. The method for forming a through hole in a semiconductor integrated circuit substrate according to claim 1, wherein the surface of the Si single crystal substrate is a (100) plane. 3. The method for forming a through hole in a semiconductor integrated circuit board according to claim 1, wherein the impurity of the high-concentration impurity layer is boron. 4. The method for forming a through hole in a semiconductor integrated circuit board according to claim 1, wherein the impurity concentration is higher than 10 ¹⁹ / cm ³ . 5. The method for forming a through hole in a semiconductor integrated circuit board according to claim 1, wherein a mixed aqueous solution of ethylenediamine and pyrocatechol is used as an etching solution for the anisotropic etching. 6. The method of forming a through hole in a semiconductor integrated circuit substrate according to claim 1, wherein the high-concentration impurity layer constitutes a source or drain region of a P-channel MOS transistor. 7. The through hole in a semiconductor integrated circuit substrate according to claim 1, wherein a protective film is formed thick on the surface of the Si single crystal substrate before the boring step. Method of forming holes. 8. The method for forming a through hole in a semiconductor integrated circuit board according to claim 1, wherein the hole forming step is performed after the circuit element is formed.