JPH0793427B2 - Semiconductor device having a drift buffer structure - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power semiconductor device, and in particular, in a semiconductor device having a buffer structure, an impurity density gradient is set in a buffer layer to generate an internal electric field for holes, thereby injecting holes from the anode. enhance the electron storage efficiency to increase the rate, also to set the impurity concentration gradient in the anode region to generate an internal electric field for electrons and a new buffer structure capable of applying a strong electric field between the cathode and anode (hereinafter drift buffer Referred to as a structure).

[0002]

2. Description of the Related Art Conventionally, various semiconductor devices having a buffer layer have been proposed. For example, it is as proposed in a high breakdown voltage GTO, an electrostatic induction thyristor, an IGBT (insulated gate bipolar transistor), an insulated gate electrostatic induction thyristor and the like. The feature of this structure is that the n buffer layer is positively interposed between the high resistance layer of the n base layer and the gate (base) on the front surface of the anode (collector) region.
The electric field distribution between the anodes (collectors) is changed from a substantially triangular shape to a trapezoidal shape so that a strong electric field is uniformly applied to the vicinity of the anode region. As a result, the thickness of the high resistance layer can be reduced, the breakdown voltage can be easily increased, and the carriers drift in the high resistance layer due to the strong electric field, so that particularly the turn-on characteristics are improved.

An example of the structure of the electrostatic induction thyristor having the n-buffer structure is as already disclosed in Japanese Patent Publication No. 59-31869. Alternatively, a prototype of a 2500V-300A class embedded gate SI thyristor having an n-buffer structure is also PROC. OF THE 16TH ANNUAL IEEE POWER ELE.
At CTRONICS SPECIALISTS CONFERENCE (PESC '85)
"LOW-LOSS HIGH SPEED SWITCHING DEVICE, 2500V-300A
STATIC INDUCTION THYRISTOR ".

FIG. 15 is a cross-sectional structure diagram schematically showing an example of the prototype structure in the above paper. In FIG. 15, 1 is an anode electrode, 2 is an anode region, 3 is an n buffer layer, 4 is an n buffer shorting layer, 5 is a high resistance layer, 6 is a gate region, 7
Is an epitaxial layer, 8 is a cathode region, 9 is a cathode electrode, and 10 is a gate electrode. The n layer 3 serves as an n buffer layer, and the n ⁺ region 4 allows the P anode region 2
Is electrically short-circuited with. The n ⁺ region 4 is formed substantially on the lower side of the gate electrode 10 projected onto the anode surface.

Here, the amount of holes injected from the anode side is determined by the thickness of the n buffer layer and the value of the impurity density. If the impurity density of the n buffer layer is set too high,
The injection amount decreases, which affects the turn-on characteristics and on-voltage. When the impurity density of the n buffer layer is lowered, the hole injection amount is increased, but a strong electric field may enter the n buffer layer to cause punching through, resulting in a contradiction that the breakdown voltage cannot be increased so much. Therefore, n
Although it is possible to set the thickness of the buffer layer to a certain degree, in an n buffer layer set to a certain thickness with a predetermined impurity density, the on-voltage rises, the amount of holes injected decreases, and latching occurs. Problems such as a sluggish reaction to move up (that is, a decrease in turn-on response) are likely to occur. Therefore, in the current semiconductor device having an n-buffer layer, although it is desirable to set the thickness to a certain degree thick to form a high impurity density to prevent a high breakdown voltage, it is desirable to set the thickness to a certain degree, but the amount of injected holes is increased. Is formed to have a moderate impurity density in order to secure a certain degree of

Furthermore, since the n buffer layer is interposed between the anode region and the high resistance layer as a layered region having a predetermined impurity density, the n buffer layer remains in an electrically floating state with respect to the anode region. The electrons as carriers accumulated therein will continue to exist in the n buffer layer for a period determined by their lifetime. In this case, it causes the injection of holes from the anode region,
When the lifetime of electrons is long, hole injection occurs during that time, which also causes injection of extra holes.
Therefore, it is desirable that the n buffer layer be electrically shorted to the anode region. However, if this short-circuit rate is increased, the effect of the n-buffer is weakened, latch-up does not occur, or the injection amount of holes is reduced, and even if the off characteristic and tail characteristic are improved, the on characteristic is deteriorated. It also causes Since the n buffer layer is formed in layers, it is necessary to reduce the lateral resistance. Furthermore, the conventional buffer structure having a base structure has a drawback that the on-voltage tends to increase due to its structure.

As a method for solving the above problems, an electrostatic induction (SI) buffer structure has been proposed. That is, Japanese Patent Application No. 4-1141 by Muraoka and Tamamushi
No. 40 (Japanese Unexamined Patent Publication No. 6-85244) "Semiconductor device having static induction buffer structure".

The electrostatic induction (SI) buffer structure is a buffer structure utilizing the electrostatic induction effect. That is, the turn
In the ON state, holes mainly flow in the low impurity density region of the SI buffer layer, and the electrons injected from the cathode are accumulated in the high impurity density region of the SI buffer layer.
This region of high impurity density is short-circuited with the anode region at twice the diffusion length L _n of electrons, that is, at a pitch of 2 L _n or less, and corresponds to the life of electrons in the SI buffer layer determined by the electron lifetime τ _n. This has the effect of absorbing electrons in the anode electrode. Instead of the high impurity density region of the SI buffer layer, a metal layer such as W, Mo, Co, Pt or a metal silicide layer may be used.

The low impurity density layer of the SI buffer layer is depleted by the diffusion potential generated between it and the high impurity density layer or the metal layer. The thickness and the impurity density of the SI buffer layer are selected so that the potential in the depleted low impurity density layer of the SI buffer layer is capacitively controlled by the potential of the high impurity density layer or the metal layer of the SI buffer layer. To do. In the ON state, a channel region is formed which also serves as a passage for holes, but this channel region is a depleted channel and its height is variable by capacitive coupling by controlling the potential barrier by the electrostatic induction effect. is there. A shorter channel length is more effective because the hole injection amount increases, but on the other hand, the depletion layer spreading from the cathode side has a potential potential structure high enough to sufficiently block a high voltage even if it reaches. Need to be. The region that mainly blocks the strong electric field is the high impurity density region or the metal layer region of the SI buffer layer, but the depletion layer penetrates to a part of the low impurity density region, and the height of the potential barrier of the channel in the low impurity density region is increased. The effect of lowering also occurs. When this effect becomes strong, hole injection from the anode is caused and the effect of the buffer layer is reduced. Therefore, in the SI buffer structure, the potential barrier height of the channel portion in the low impurity density region can be set sufficiently high to sufficiently block the strong electric field between the cathode and the anode, and the high impurity density region or the metal layer It is necessary that the potential barrier height be variable by capacitive coupling in a capacitive coupling manner.

The buffer structure defined and described above is referred to as a static induction (SI) buffer structure.

Therefore, the structure of the semiconductor device having the SI buffer structure is as follows. That is, in the structure, in a semiconductor device having an anode region, a cathode region, and a gate region, a buffer layer is provided in contact with or near the anode region, and the buffer layer includes a high impurity density region and a low impurity density region. The low impurity density region is substantially depleted by a diffusion potential between the low impurity density region and the high impurity density region, and the buffer layer in the high impurity density region is the anode region 2L _n.
The semiconductor device has a structure as a semiconductor element having an electrostatic induction buffer structure characterized by being short-circuited at the following pitch (L _n is the diffusion length of electrons).

Alternatively, the buffer layer has a structure as a semiconductor device having an electrostatic induction buffer structure, which is of a conductivity type opposite to that of the anode region.

Alternatively, in the buffer layer, the high impurity density region has a conductivity type opposite to that of the anode region, and the low impurity density region has the same conductivity type as the anode region or an intrinsic semiconductor region. And a structure as a semiconductor device having an electrostatic induction buffer structure.

Alternatively, in a semiconductor device having an anode region, a cathode region and a gate region, a buffer layer is provided in contact with or in the vicinity of the anode region, and the buffer layer includes a metal layer region and a low impurity density region. And the low impurity density region is substantially depleted by a diffusion potential between the low impurity concentration region and the metal layer,
The buffer layer in the metal layer region is short-circuited with the anode region at a pitch of 2L _n or less (L _n is a diffusion length of electrons), which is a semiconductor device having a static induction buffer structure. I have.

Alternatively, a structure as a semiconductor device having a static induction buffer structure is characterized in that a thin semiconductor layer having a conductivity type opposite to that of the anode region is interposed between the buffer layer and the anode region. Is to have.

However, the inventors of the present invention have devised a drift buffer structure having a simpler structure in addition to the electrostatic induction buffer structure. This structure uses the drift field effect in the buffer layer and the anode region. It has a structure capable of generating a drift electric field based on the impurity density gradient in the buffer layer and in the anodic region.

Conventionally, a drift transistor is well known which uses a structure capable of generating a drift electric field in the base layer of the bipolar transistor. However, in a semiconductor device mainly composed of a thyristor structure, particularly a thyristor structure having a buffer layer, an impurity density gradient is set in the buffer layer, and a drift electric field for holes is generated in the buffer layer during hole injection from the anode region. A structure for generating a drift electric field for electrons by setting a similar impurity density gradient in the structure and the anode region (these are collectively referred to as a drift buffer structure)
Was not suggested.

The above drift buffer structure is a buffer layer
And a structure for setting an impurity density gradient for generating a drift electric field for holes and electrons in both the anode region in contact with the buffer layer. The reason why it is necessary to consider the two regions of the buffer layer and the anode region is that in a semiconductor device mainly composed of a thyristor structure, carriers of both electrons and holes contribute to the conduction / interruption operation. Because. Of course, it is also possible to adopt the configuration of only one of them, expecting the effect of only one. However, it goes without saying that the performance is better when the drift structure is realized for both carriers.

[0019]

OBJECTS OF THE INVENTION It is an object of the present invention has high hole injection rate from the anode region, and high sweeping efficiency of accumulated electrons of the anode electrode of the buffer layer, yet strong between the cathode and anode An object of the present invention is to provide a semiconductor element having a drift buffer structure, which can apply an electric field and is suitable for high breakdown voltage.

Further, one of the objects of the present invention is that the electrons accumulated in the buffer layer easily travel in the anode region due to the drift electric field, the efficiency of sweeping electrons to the anode electrode is high, and the turn-off characteristic is high. An object is to provide a semiconductor device having an improved drift buffer structure.

Further, one of the objects of the present invention is to adopt a drift buffer structure combined with an electrostatic induction buffer structure to reduce the resistivity distribution in the buffer layer. An object of the present invention is to provide a semiconductor device having a drift buffer structure with an improved on-voltage.

Still another object of the present invention is to employ a drift buffer structure in combination with an anode short structure or a static induction anode short structure to provide a semiconductor device having a drift buffer structure with improved turn-off characteristics. To provide.

[0023]

The drift buffer structure of the present invention is a buffer structure in which an internal electric field for holes due to an impurity density gradient can be generated, but the anode is not only in the buffer layer but also in contact with the buffer layer. A structure in which an impurity density gradient is set also in the region to realize a drift structure for electrons will be collectively referred to as a structure. This is because the drift structure for both holes and electrons is considered. The drift buffer structure is SI (Static
Induction: Electrostatic induction) It is a more effective structure when used in combination with a buffer structure, an anode short structure, or an SI anode short structure.

Therefore, the structure of the present invention is as follows. That is, the present invention includes an anode region, a cathode region,
In a semiconductor device having a gate region, a buffer layer is provided in contact with or in the vicinity of the anode region, and the buffer layer has an impurity density gradient in which an impurity density gradually increases toward the anode region, and further, Anno that contacts the anode area
In the anode region between the cathode electrode and the buffer layer.
The impurity density from the buffer layer to the anode electrode
Has an impurity density gradient that gradually decreases as
Having a drift buffer structure characterized by
It has a structure as a conductor element.

[0025] Alternatively, the anode region, a cathode region, a semiconductor device having a gate region, as well as provided with a buffer layer in the vicinity of or in contact with the anode region, the buffer layer having the impurity density gradient further is in contact with the anode region In the vicinity, the buffer
A certain period along the side of the high impurity density gradient region of the layer
High impurity density regions and low
As a semiconductor device having a drift buffer structure, characterized in that it has a portion of a pure material density region, and the low impurity density region is substantially depleted by a diffusion potential between the low impurity density region and the high impurity density region. Have a configuration.

[0026] Alternatively, the buffer layer of the high impurity concentration region is the anode region and 2L _n following pitch (L _n
Are short-circuited by the electron diffusion length) and have a structure as a semiconductor element having a drift buffer structure.

[0027] Alternatively, the buffer layer has a structure of a semiconductor device having a drift buffer structure, characterized in that said anode region is opposite conductivity type.

[0028] Alternatively, among the buffer layer, it high impurity concentration region above the anode region with the opposite conductivity type, the low impurity density region is the anode region and the or intrinsic semiconductor region of the same conductivity type And a structure as a semiconductor element having a drift buffer structure.

[0029] Alternatively, the anode region, a cathode region, a semiconductor device having a gate region, as well as provided with a buffer layer in the vicinity of or in contact with the anode region, the buffer layer having the impurity density gradient further is in contact with the anode region In the vicinity of the buffer layer
At regular intervals along the sides of the high impurity density gradient region
Selectively alternating metal layer regions and low impurity density regions
The semiconductor device has a drift buffer structure in which the low impurity density region has a region and is substantially depleted by a diffusion potential between the low impurity density region and the metal layer.

[0030] Alternatively, the pitch buffer layer below the anode region and 2L _n of the metal layer regions (L _n is the electron diffusion length) as a semiconductor device having a drift buffer structure, characterized in that it is short-circuited by It has the configuration of.

[0031] Alternatively, with the configuration of a semiconductor device having a drift buffer structure, characterized in that the thin semiconductor layer of opposite conductivity type to the anode region is interposed between the buffer layer and the anode region .

[0032] Alternatively, the anode region further, in the buffer layer near the impurity density of the anodic region
Selective intersections at regular intervals along the sides of a high slope area.
Of the high impurity density region and the low impurity density region
The low impurity density region has a portion and is substantially depleted by a diffusion potential between the low impurity density region and the high impurity density region, and has a structure as a semiconductor device having a drift buffer structure.

[0033]

The semiconductor device having the drift buffer structure according to the present invention is a bipolar device in which two electrons and holes coexist in the carrier, and performs the same switching operation as a thyristor device or a non-latch-up mode bipolar device. . In terms of its operating principle, the characteristic point is the movement of holes and electrons near the anode side. The operation on the cathode side is the same as the operation of a normal thyristor element, GTO, static induction thyristor, MOS control element, MOS gate element, etc. Therefore, the operation will be described on the anode side. FIG. 1 is a schematic cross-sectional structure diagram on the anode side of a semiconductor device having a drift buffer structure as a first embodiment of the present invention, but since it is suitable as a principle explanatory diagram, it will be described with reference to FIG. . In FIG. 1, 1 is an anode electrode, 2 is an anode region, and 3 is an n buffer layer.
5 is an n ⁻ high resistance semiconductor layer. In FIG. 1, an impurity density gradient as shown is set in the n buffer layer (3) and the p anode region (2). That is, n (3) p (2)
In the vicinity of the junction interface, the n-type impurity density N _D on the buffer layer side,
As the p-type impurity density N _A , n (3) p (2) junction on the anode region side increases, the impurity density gradually decreases,
The n-type impurity density N _DO is set near the n (3) n ⁻ (5) junction, and the p-type impurity density N _AO is set near the anode electrode. The operational characteristics of such a drift buffer structure appear at turn-on, on-state and turn-off.

[0034] turn to UtsuriMuko from the off state to the on state
At the time of turning on, the holes injected from the p anode region 2 are accelerated by the drift electric field (E ₁ ) generated by the impurity density gradient in the n buffer layer 3, so that the n holes can be easily n.
^- is injected into the high-resistance layer (5). In this case, the holes supplied from the anode electrode 1 and traveling in the p anode region (2) also have a high impurity density in the vicinity of the p (2) n (3) junction, so that the drift electric field (E ₂ ) caused by the impurity density gradient is generated. Is easily accelerated by the anode electrode (1) to p (2) n
(3) It is supplied to the joint interface. Therefore, the drift buffer structure shown in FIG. 1 has an internal electric field E in the anode region 2.
₂ and the internal electric field E ₁ in the n buffer layer 3 facilitates injection of holes.

[0035] Similarly, when we chasing electronic movement of the turn-on, injected from the cathode side n ^- high resistance layer
The electrons traveling in (5) are likely to be accumulated in a high impurity density region in the n buffer layer (3), that is, in the vicinity of the n (3) p (2) junction interface. Since the internal electric field E ₁ generated by the impurity density gradient exists in the n buffer layer (3), the electrons traveling in the n buffer layer are accelerated by the drift electric field E ₁ . When the accumulated electrons start to be injected into the anode region (2), an internal electric field (E ₂ ) based on the impurity density gradient exists in the p anode region (2), so that the inside of the p anode region (2) Electrons traveling in the anode can easily reach the anode electrode (1).

In the on-state, the holes generate an internal electric field E ₂
And E ₁ make it easy to continue to be injected from the anode electrode to the high resistance layer 5 side, and the electrons injected from the cathode side to be easily made to continue to flow into the anode electrode (1) by the internal electric fields E ₁ and E ₂ . Become.

[0037] turn to UtsuriMuko from the ON state to the OFF state,
In the off state, in particular, the electrons accumulated in the n buffer layer (3) must be quickly extinguished. The anodic region is created by the extinction of excess accumulated electrons.
A potential barrier Vbi (n ⁺ p ⁺ ) for holes is generated in the buffer layer (3) viewed from (2), and similarly, the same potential barrier Vbi (n ⁺ p ⁺ ) is generated in the p anode region (2) viewed from the n buffer layer (3). This is because a potential barrier Vbi (n ⁺ p ⁺ ) for the electrons is generated. For drift buffer structure, electrons n by the internal electric field E ₁
(3) The structure is likely to be accumulated in the vicinity of the high impurity density region near the p (2) junction and to be easily swept out to the anode electrode 1 in the p anode region 2 by the internal electric field E ₂ . Therefore, the electron discharge efficiency from the n buffer layer to the anode electrode is high, and the potential barrier Vbi (n ⁺ p ⁺ ) is easily restored to the n (3) p (2) junction interface.
That is, the turn-off performance is good.

The above is the characteristic operation principle of the semiconductor device having the drift buffer structure according to the present invention, but it is possible to perform the same operation even in combination with other structures while reflecting the gist of the present invention. Is. For example, n
An electrostatic induction (SI) buffer structure or a structure equivalent to a buried gate may be formed in the buffer layer. In this case,
The operations of the SI buffer and the drift buffer are synergistic.
Further, the resistivity distribution in the n buffer layer is reduced, and the switching performance is improved. Alternatively, the turn-off performance is improved by combining with an anode short structure or an electrostatic induction (SI) anode short structure. Alternatively, lifetime control may be combined.

The internal electric field E based on the impurity density gradient of the
_As methods for realizing ₁ and E ₂ , they can be realized by combining diffusion, ion implantation, epitaxial growth, bonding technology and the like.

[0040]

EXAMPLE 1 FIG. 1 is a schematic cross-sectional structure diagram in the vicinity of an anode side of a semiconductor device having a drift buffer structure as a first example according to the present invention. Regarding the structure on the cathode side, ordinary SCR, GTO, SI thyristor, IGBT, MOS
Any structure such as a gate thyristor or a MOS control thyristor can be used.

The structural feature of FIG . 1 is that an impurity density gradient is set in the n buffer layer (3). In contrast to this structure, a structure in which an impurity density gradient is set in the anode region (2) and a drift electric field for both holes and electrons can be generated is the structure shown in FIG. It goes without saying that the above structure may be set in either the n buffer layer (3) or the p anode region (2). For convenience of description, FIG. 1 is configured so that a drift electric field can be generated in both.

FIG . 2 is a diagram schematically showing the potential distribution in the vicinity of the pn junction between the anode region 2 and the buffer layer 3 when the semiconductor element is in the off state. It can be seen that the electric field E ₂ in the p anode region 2 and the electric field E ₁ in the n buffer layer 3 are formed by the impurity density gradient in each. ← above E ₂ , ← above E ₁ , accelerating electric field for electrons, E ₂ above →, and E ₁ → → indicate accelerating electric field against holes.

[0043] n (3) p (2) n buffer layer of bonding vicinity (3)
The impurity concentration N _D, n (3) n of ^- the impurity concentration of the (5) n-buffer layer of bonding vicinity (3) and N _DO, if the impurity density distribution is exponential distribution, the n-buffer layer 3 electric field E ₁ that occurs is expressed as _{V n kT n D E 1 =} ──── = ─────l n ──── ... (1) W n qW n n DO.

[0044] where V _N is the voltage generated across the thickness direction of the n buffer layer, W _N is the thickness of the n buffer layer, k is the Boltzmann constant, T is the absolute temperature.

[0045] Similarly, n (3) p (2) impurity density N _A, the anode electrode (1) with an impurity density in the vicinity of the N _AO, impurity density distribution exponential function of p anode region of the junction near (2) If distributed, the voltage E ₂ generated in the p-anode region ₂
Is expressed as _{V P kT N A E 2 =} ──── = ─────l n ──── ... (2) W P qW P N AO.

[0046] Here, V _P is the voltage generated across the thickness direction of the p anode region, it is W _P is the thickness of the p anode region.

[0047] Such drift field E ₁ and E ₂ holes in the turn-on time and turned on, will accelerate the movement of electrons, the movement at the time the electron emission to the anode electrode 1 at the time of turn-off To accelerate.

[0048] For this reason, reduction of on-state voltage, not only the shortening of the turn-on time, it is possible to shorten the turn-off time.

As a method for realizing the structure of FIG . 1, there are a usual diffusion technique, an ion implantation technique, a method of performing epitaxial growth in multiple stages, and the like. The impurity density gradient in the n-buffer layer can be achieved by using diffusion, ion implantation or epitaxial growth techniques. On the other hand, in order to realize the impurity density gradient in the p anode region 2, the impurity density distribution in the normal anode region is opposite,
^This can be achieved by combining ⁺ high-concentration epitaxial growth with medium or low-concentration p, p ^- epitaxial growth. If the thickness W _P of the p anode region 2 is thin, it can be formed by a multi-stage ion implantation with varying acceleration voltage and dose.

[0050] Further, most simply realized structural equivalent structure of Figure 1 means the n buffer layer 3 n ⁺ n, n ⁺ nn
^- or n ⁺ n ^- to form a structure of a layer, the p anode region 2 p ⁺ p, p ⁺ p ^-, or p ⁺ pp ^- formed as a structure of a layer, as a result, the impurity density distribution having a concentration gradient There is also a way to make it.

[0051] Further, as shown in FIG. By a dotted line in FIG. 1, is introduced actively assist structures emission of electrons to the anode electrode of the turn-off provided an n ⁺ shorted anode layer 4 (1) May be. The formation pitch of the n ⁺ anode short-circuit layer 4 is, for example, a diffusion length L determined by the electron lifetime.
Considering _n , it is desirable to set it to 2L _n or less. Although the electric field intensities E ₁ and E ₂ have been described by using the example in which the impurity density distribution is an exponential function distribution in the above-described first embodiment, it is needless to say that the electric field strengths E ₁ and E ₂ are not limited to the exponential function distribution.

The structure of FIG . 1 can be further developed and combined with an electrostatic induction (SI) buffer structure, a buried gate structure, an electrostatic induction (SI) short circuit structure, and a MOS gate short circuit structure.

[0053] Furthermore, in the structure or expansion of the of FIG. 1, it is a matter of course that may perform lifetime control.

[0054] (Embodiment 2) FIG. 3 is a schematic sectional view of an anode side near the semiconductor device having a drift buffer structure of a second embodiment of the present invention. Regarding the structure on the cathode side, Example 1
Thyristor, IGBT, GT as in the case of (Fig. 1)
Various applications such as O and SI thyristors are possible. Among the respective constituent elements, the same reference numerals are used for the same constituent elements as those of the first embodiment shown in FIG.

In FIG . 3, 1 is an anode electrode, and 4 is an anode short-circuit region which is formed as required. The structural feature of FIG. 3 is that the n buffer layer is formed by n ⁺ (31) n (30) layers and the p anode region is formed by p ⁺ (21) p (p ⁻ ) (20) layers. That is the point. The n layer (30) may have an impurity density gradient of N _{D to} N _DO as shown by the dotted line, or n
^It may be formed with a uniform concentration lower than that of the ⁺ layer 31. Similarly, the inside of the p (p ⁻ ) layer (20) is N as shown by the dotted line.
An impurity density gradient of _{A to} N _AO may be provided, or p ⁺ layer
It may be formed as a uniform concentration lower than (21). Figure 3
By forming the n buffer layer as the n ⁺ n layer (31, 30) and the p anode region as the p ⁺ p (p ⁻ ) layer (21, 20) as shown in FIG. It is possible to generate the drift electric fields E ₁ and E ₂ equivalent to Therefore, a drift buffer structure equivalent to that of FIG. 1 can be realized.

[0056] (Embodiment 3) FIG. 4 is a schematic sectional view illustrating the anode side near the semiconductor device having a drift buffer structure as a third embodiment of the present invention. FIGS. 1 and 2 corresponding to Examples 1 and 2
Constituent elements similar to those are denoted by the same reference numerals and description thereof will be omitted. The structural feature of FIG. 4 is that the p anode region is formed as ap ⁺ (21) p (p ⁻ ) (20) p ⁺ (22) layer. The p ⁺ layer 22 is a p ⁺ anode contact layer. The p (p ⁻ ) layer (20) may be substantially depleted. In other words, the impurity density and dimensions may be set so that the p (p ⁻ ) layer 20 is substantially depleted. Alternatively,
The overall thickness W _P of the p anode region (21,20,22) formed thinner, a configuration in which the voltage of the anode electrode 1 becomes the same potential as the immediate p ⁺ layer (21). N as shown by the dotted line
The layer 30 may have an impurity density distribution of N _{D to} N _DO , or may be formed with a uniform impurity density lower than that of the n layer 31. Similarly, in the p (p ⁻ ) layer 20, N _{A to} N
_It may have the impurity density distribution of _AO , or p ⁺ layer 21
It may be formed as a lower uniform impurity density. p
^{The +} layer 22 is a thin layer for achieving good contact with the anode electrode 1, and is for realizing a structure in which the potential of the anode electrode 1 is easily transmitted to the p ⁺ layer 21 immediately.

As indicated by the dotted line, the anode short circuit region 4
May be set, or may be used in combination with lifetime control or the like without special setting. When the anode short-circuit layer 4 is provided, the short-circuit pitch is 2L _n (L
_n : electron diffusion length) or less is desirable.

[0058] (Embodiment 4) FIG. 5 is a schematic sectional view illustrating the anode side near the semiconductor device having a drift buffer structure as a fourth embodiment of the present invention. A structural feature of FIG. 5 is that the drift buffer structure further includes an electrostatic induction buffer structure or a buried gate buffer structure. The buried gate buffer structure is a structure in which the buried gate layers 32 are buried in the n buffer layer 30 at regular intervals so as to be electrically common to each other in order to reduce the resistivity distribution of the entire buffer layer. The electrostatic induction buffer structure is a structure in which the space between the buried layers 32 is further narrowed and the inside of the low impurity density buffer layer 33 is substantially depleted, and the potential inside 33 is capacitively coupled by the potential of the high impurity density buffer layer 32. It is a structure that can change dynamically. The former operates by the base resistance effect, while the latter operates by the JFET effect or electrostatic induction effect.

In the structure of FIG . 5, the n buffer layer 30 has N _{D to} N
_It has an impurity density gradient of _DO , and the p anode region 2 has N _A ~
It has an impurity density gradient of N _AO . It can be considered that the high impurity density buffer layer 32 forms a buffer layer having a predetermined thickness together with the low impurity density buffer layer 33.
That is, in the second and third embodiments (FIGS. 3 and 4), n
^{In the} layer shown as ⁺ buffer layer 31, low impurity density buffer layer 33 is arranged at a predetermined interval and size, and an equivalent channel region for holes is formed. Regarding such an electrostatic induction buffer structure, Japanese Patent Application No. 4-114140 (Japanese Patent Laid-Open No. 6-85244) by Muraoka and Tamamushi was proposed.
The report describes the operating principle in detail. In the fourth embodiment of the present invention, with respect to the drift buffer structure,
By combining the above electrostatic induction buffer structure or the buried gate buffer structure,
The ON characteristics can be improved.

FIG . 6 is a diagram showing the fourth embodiment of the present invention shown in FIG.
It is the figure which showed the potential distribution in the vicinity of n junction typically. The solid line is the potential distribution in the plane cut along AA '. That is, since it has passed through the n ⁺ buffer layer 32, the potential is lowered only in the thickness portion of the n ⁺ layer 32. The dotted line is the potential distribution in the plane cut along BB '. That is, it passes through an equivalent channel region formed of the buffer layer 33 having a low impurity density. The alternate long and short dash line represents the potential distribution in the case where the n ⁺ layer 32 is not provided and the inside of the n buffer layer 30 has an impurity density gradient of N _{D to} N _DO . The potential distribution indicated by the dotted line (corresponding to BB ') corresponds to the potential distribution of the structure in which the electrostatic induction buffer structure and the drift buffer structure are combined.

[0061] low impurity density in the buffer layer 33 is substantially depleted to receive a potential barrier control using the electrostatic induction effect. Only the area of 33 positively the whole n buffer layer 30
Compared to the above, the impurity density distribution N _D for the drift buffer
It may be set to a low impurity density separately from ~ N _DO .

[0062] Muraoka for operation of the electrostatic induction buffer structure, Japanese Patent Application No. Hei 4-114140 by Buprestidae (JP-6-
No. 85244) , and the following equation holds in the fifth embodiment of the present invention. That is, FIG.
When the potential in the n buffer layer 33 is changed in accordance with the potential change caused by the electrons accumulated in the n ⁺ buffer layer 32 at, the current gain of hole injection from the anode to the accumulated electrons is N _A υ _p q G ∝───── exp ──── (V _GA −V _G ^* _A ) (3) n _B υ _n kT can be equivalently expressed. Here, N _A is the impurity density near the pn junction in the anode region as shown in the figure,
n _B is the impurity density in the n ⁺ buffer layer 32, υ _p is the hole injection rate, υ _n is the rate at which accumulated electrons are injected into the anode region, q is the unit charge, k is the Boltzmann constant, and T is the absolute temperature. , V _GA is the diffusion potential of the p (2) n ⁺ (32) junction, and V _G ^* _A is the potential barrier height seen by the holes in the anode region at the center of the channel (33).

The most important feature of the structure of FIG . 5 is shown in FIG.
Compared with the third embodiment, the buffer layer 33 has a low impurity density and serves as a channel region for holes. As a result, the on-voltage can be reduced, the turn-on time tgt can be shortened, and the di / dt at the turn-on can be increased.

In the structure of FIG . 5 as well, the buffer layer 30 may be provided with the n ⁺ anode short-circuit region 4 of 2L _n or less (L _n : electron diffusion length). Alternatively, it goes without saying that lifetime control may be combined.

[0065] Further, as described below, it can also be provided an equivalent channel region for electrons in the anode region 2.

[0066] (Embodiment 5) FIG. 7 is a schematic sectional view illustrating the anode side near the semiconductor device having a drift buffer structure as a fifth embodiment of the present invention. The structural feature of FIG. 7 is that in the drift buffer structure in which the electrostatic induction buffer structure or the buried gate buffer structure shown in FIG. 5 is combined, an impurity density gradient is further added to the anode region (20, 21) with two layers of p ⁺
This is a point provided as a p (p ⁻ ) structure. It can be considered as a structure in which the second embodiment (FIG. 3) and the fourth embodiment (FIG. 5) are combined. The p ⁺ (21) p (p ⁻ ) (20) structure has, for example, 2
It can be formed by epitaxial growth of steps. Obviously, the n ⁺ anode short-circuit region 4 may be provided for the n buffer layer 30.

[0067] By providing the p ⁺ anode layer 21,
The substantial thickness of the anode region can be considered to be similar to the thickness of the p ⁺ layer 21. This is because the (p, p ⁻ ) anode layer 20 operates in a substantially depleted state, so that the potential of the anode electrode 1 is likely to immediately become equal to the potential of the p ⁺ anode layer 21. If the impurity density of the p ⁺ anode layer 21 is set to N _A , the current gain of hole injection from the anode can be expressed in the same manner as the above equation (3).

[0068] (Embodiment 6) FIG. 8 is a schematic sectional view illustrating the anode side near the semiconductor device having a drift buffer structure as a sixth embodiment of the present invention. The structure shown in FIG. 8 is a drift n buffer structure (32, 33, 30) having an electrostatic induction buffer structure or a buried gate buffer structure, and an anode region (21, 20) composed of p ⁺ p (p ⁻ ) p ⁺ anode layers. , 22).
That is, the structure of FIG. 8 is a structure in which the p ⁺ anode contact layer 22 for the anode electrode 1 is newly provided in addition to the structure of FIG. 7. Therefore, it can be considered that the structure of FIG. 4 (Example 3) and the structure of FIG. 5 (Example 4) are combined. By providing the p ⁺ anode contact layer 22
A reliable contact of the anode electrode 1 with the (p, p ⁻ ) anode layer 20 can be realized, and the p ⁺ anode layer is expanded as the depletion layer in the (p, p ⁻ ) anode layer expands.
21 and the p ⁺ contact layer 22 and the anode electrode 1 can be immediately brought to the same potential.

[0069] (Embodiment 7) FIG. 9 is a schematic sectional view illustrating the anode side near the semiconductor device having a drift buffer structure of a seventh embodiment of the present invention. The structural feature of FIG. 9 is that a structure including an anode layer 23 having a high impurity density and an anode layer 24 having a low impurity density is formed in the anode region.
The (p, p ⁻ ) anode layer 20 has an impurity density gradient of N _{A to} N _AO so that the drift electric field E ₂ can be generated. Similarly, an impurity density gradient of N _{D to} N _DO is provided in the n buffer layer 30 so that the drift electric field E ₁ can be generated. Due to the structure of FIG. 9, p ⁺ (23) p (24) p in the anode region
^By forming the ⁺ (23) p (24) ... structure near the interface with the n buffer layer (30, 32, 33), the low impurity density anode layer 24 becomes an equivalent channel region for electrons. . It can be considered that a structure similar to that of the low impurity density buffer layer 33 serving as an equivalent channel region for holes is formed in the anode region. n ⁺
The thickness of the buffer layer is W _N ⁺ , the thickness of the p ⁺ anode layer is W
FIG. 10 schematically shows the potential distribution in the vicinity of the anode side when the semiconductor element is in the off state, where _P ⁺ . A-A 'represents a cross section passing through the low impurity density anode layer 24 and the high impurity density n buffer layer 32, and BB' represents the high impurity density anode layer 23 and the low impurity density n buffer layer 33. It represents the cutting plane that passes through.
The dotted line represents the potential distribution in the equivalent channel part (24,33), and the solid line represents the potential distribution mainly in the p (20) p ⁺ (23) junction and the n ⁺ (32) n (30) junction. . The dash-dotted line indicates such p ⁺ layer (23),
This corresponds to the potential distribution when an impurity density gradient capable of generating a drift electric field exists in the buffer layer 30 and the anode region 20 without the n ⁺ layer (32) interposed. That is, it shows the same distribution as in FIG.

In the structure of the seventh embodiment shown in FIG . 9, the structure shown in FIG.
As is clear from the potential distribution of, the potential barrier in the p region 24, which is an equivalent channel region for electrons, is lowered by V _GA −V _G ^* _An . Here, V _GA is the diffusion potential of the p ⁺ (23) n ⁺ (32) junction, and V _G ^* _An is n.
^This is the potential barrier height seen by the electrons in the ⁺ region (32) in the p region (24). Similarly, the potential barrier in the n region 33, which is an equivalent channel region for holes, is lowered by V _GA −V _G ^* _AP . Here, V _G ^* _AP is the potential barrier height that holes in the p ⁺ region 23 see in the n region 33. The current gain of hole injection in a pn junction as shown in FIGS. 9 and 10 is equivalent to N _A ⁺ υ _P q _G ∝─────── exp ──── (V _GA −V _G ^* _AP ) ... (4) n _D ^- expressed as upsilon _n kT, the current gain of the electron injection equivalently ^{_{n D + υ n q Gα─────── exp────}} (V GA - ^{_{V G * an) ... (5}} ) N a - can be represented as upsilon _P kT. Here, N _D ⁻ and N _D ⁺ are the impurity densities of the n region 33 and n ⁺ region 32, N _A ⁻ and N _A ^{+, respectively.}
Are impurity densities of the p region 24 and the p ⁺ region 23, respectively.

[0071] (4), (5) the exponential term in the expression is extremely larger than 1, the current gain is very large

In the structure of the seventh embodiment shown in FIG . 9 as well, it is obvious that the anode short-circuit layer 4 may be provided and may be combined with lifetime control.

[0073] (Embodiment 8) FIG. 11 is a schematic sectional view illustrating the anode side near the semiconductor device having a drift buffer structure as the eighth embodiment of the present invention. The structural feature of FIG. 11 is that p ⁺ (2
3) The p (24) p ⁺ p structure is not perfectly matched with the n ⁺ (32) n (33) n ⁺ n structure, and the p ⁺ anode contact layer 22 is provided. Even if they are not perfectly matched as shown in FIG. 9, almost the same performance can be obtained. However, in at least part of the pn junction, n ⁺ (32) p
It is desirable that a (24) junction or a p ⁺ (23) n (33) junction is formed.

[0074] (Embodiment 9) FIG. 12 is a schematic sectional view illustrating the anode side near the semiconductor device having a drift buffer structure as a ninth embodiment of the present invention. The structural feature of FIG. 12 is that a drift buffer structure and an electrostatic induction short circuit (SI short circuit) structure are combined. The SI short-circuit structure is disclosed in Japanese Patent Application Laid-Open No. 1-93169 by Nishizawa and Tamamushi.
The structure of FIG. 12 replaces the structure in which the anode short-circuit layer 4 is set to 2 L _n (L _n : diffusion length of electrons) or less by further introducing an SI short circuit in the drift buffer structure of the present invention. That is, 25 is a p ⁺ static induction anode region and 26 is an n ⁺ static induction short circuit region. The buffer layer 30 has an impurity density gradient of N _{D to} N _DO , and n ⁺ (32) n
(33) has an electrostatic induction buffer structure or a buried gate buffer structure. The (p, p ⁻ ) anode region 20 is substantially depleted but may have an impurity density gradient from N _{A to} N _AO . Further, various structural expansions are possible, and the p ⁺ anode layer 21 as shown in FIG. 7 (Example 5) and FIG. 8 (Example 6) may be provided near the interface with the n buffer layer. Good. Alternatively, p ⁺ as illustrated in FIG. 9 (Example 7) and FIG. 11 (Example 8)
(23) p (24) ... The anode layer may be provided in the vicinity of the interface with the n buffer layer. In the structure of FIG. 12, by introducing the SI short-circuit structure, electrons injected from the n ⁺ layer 32 can be efficiently guided to the n ⁺ SI short-circuit layer 26 at the time of turn-off which shifts from the ON state to the OFF state. As a characteristic of SI short circuit, holes are easily blocked from the p ⁺ SI anode region 25. On the other hand, at the time of turn-on, holes are injected from the p ⁺ SI anode region 25 toward the n layer (33) through the substantially depleted anode layer (20), and Equivalent channels are formed.

[0075] n ⁺ SI shorted region 26 is 2L _n: it is preferably formed by (L _n electron diffusion length) or less of the pitch is the same as the normal SI shorted.

[0076] (Example 10, 11) 13 and 14, n in the foregoing description of embodiments ⁺
This is a structural example in which a metal layer 27 is used instead of the layer 32. As the metal layer, a metal such as W, Mo, Co, Pt or the like, or a silicide thereof or the like can be applied. In FIG. 13, the n buffer short-circuit layer 4 is also made of these metals. The pitch of the short circuit is 2L _n or less. In FIG. 14, a thin intervening layer 31 is provided between the anode region 20 and the SI buffer layer (27, 33), and the anode region is p ⁺ (21) p.
An example of the (p ⁻ ) (20) p ⁺ (22) structure is shown. The n-buffer short-circuit layer 4 is provided with a pitch of 2L _n or less.

[0077] Structural features of FIGS. 13 and 14 lies in that it can reduce the overall resistivity distribution of the buffer layer by forming a metal layer 27 on the n-buffer layer. The structure of FIG. 13 sets the impurity density distribution of N _{A to} N _AO in the anode region. Meanwhile, thin in the structure of FIG. 14 n ⁺
It is in contact with the anode region (21, 20, 22) via the layer 31.
Also in the structure of FIG. 14, it goes without saying that the impurity density gradient may be set in the n buffer layer 30 and / or in the (p, p ⁻ ) anode region (21, 20, 22).

Each of the examples shown in FIGS. 1 to 14 is a schematic sectional structure or potential distribution diagram in the vicinity of the anode side of a semiconductor device having a drift buffer structure as an example of the present invention. As described above, various device structures can be applied to the cathode side.

[0079]

As described above, the principle, structure, and operation of the drift buffer structure have been clarified, but the drift buffer structure can be applied to various semiconductor devices. For example, SI thyristor, GTO, buried gate GTO, S
CR, ASCR, IGBT, MOS control thyristor, M
When a buffer structure is set in an OS control SI thyristor, etc., and high speed operation due to high breakdown voltage and high electric field is required, high injection, high speed turn-on, high turn-on di / dt which cannot be obtained by the conventional buffer structure. , Can be realized.

[0080] Furthermore buried gate buffer structure, or S
By combining with the I-buffer structure, it becomes easy to increase the breakdown voltage, and high-speed operation can be performed by a high electric field. In particular, high-speed turn-off can be realized by lowering the resistivity in the buffer layer.

[0081] Further, by combining the SI buffer structure, it is possible to further improve the turn-on characteristics,
It is possible to reduce the on-voltage by high injection.

[0082] Further, combined with SI shorted structure, it is also possible to further improve the turn-off state.

The drift buffer structure is a structure in which a forward electric field is applied to both holes and electrons at turn-on and turn-off by considering not only the drift electric field in the buffer layer but also the drift electric field in the anode region. Therefore, the speed of carriers is increased, which is effective for high speed, high electric field, high injection, and high breakdown voltage operation. As described above, combination with the SI buffer structure, the buried gate buffer structure, or the SI short circuit and the anode short circuit structure is easy.

[0084] The hole as described above, since the electric field acts to accelerate the operation of the electronic both, holes, both electrons serving as carriers. It is effective to apply to a bipolar element, that is, an element that operates in the latch-up mode.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional structure diagram in the vicinity of an anode side of a semiconductor device having a drift buffer structure as a first embodiment of the present invention.

FIG. 2 is a schematic diagram of a potential distribution of a pn junction near an anode in an off state of a semiconductor device (Example 1) having a drift buffer structure according to the present invention.

FIG. 3 is a schematic sectional structural view in the vicinity of the anode side of a semiconductor device having a drift buffer structure as a second embodiment of the present invention.

FIG. 4 is a schematic cross-sectional structure diagram in the vicinity of the anode side of a semiconductor device having a drift buffer structure as a third embodiment of the present invention.

FIG. 5 is a schematic cross-sectional structure diagram in the vicinity of the anode side of a semiconductor device having a drift buffer structure as a fourth embodiment of the present invention.

FIG. 6 is a schematic diagram of a potential distribution of a pn junction near an anode in an off state according to a fourth embodiment of the present invention.

FIG. 7 is a schematic cross-sectional structure diagram in the vicinity of the anode side of a semiconductor device having a drift buffer structure as a fifth embodiment of the present invention.

FIG. 8 is a schematic cross-sectional structure diagram in the vicinity of the anode side of a semiconductor device having a drift buffer structure as a sixth embodiment of the present invention.

FIG. 9 is a schematic cross-sectional structure diagram in the vicinity of the anode side of a semiconductor device having a drift buffer structure as a seventh embodiment of the present invention.

FIG. 10 is a schematic diagram of a potential distribution of a pn junction near an anode in an off state according to a seventh embodiment of the present invention.

FIG. 11 is a schematic sectional structural view in the vicinity of an anode side of a semiconductor device having a drift buffer structure as an eighth embodiment of the present invention.

FIG. 12 is a schematic sectional structural view in the vicinity of an anode side of a semiconductor device having a drift buffer structure as a ninth embodiment of the present invention.

FIG. 13 is a schematic sectional structural view in the vicinity of the anode side of a semiconductor device having a drift buffer structure as a tenth embodiment of the present invention.

FIG. 14 is a schematic cross-sectional structure diagram in the vicinity of the anode side of a semiconductor device having a drift buffer structure as an eleventh embodiment of the present invention.

FIG. 15 shows a buried gate S having a conventional n buffer layer.
Structural example of I thyristor

[Explanation of symbols]

1 anode 2 p anode region 3 n buffer layer 4 anode short-circuit regions (n buffer shorting layer) 5 n ^- high resistance layer 20 (p, p ^-) anode layer 21 p ⁺ anode layer 22 p ⁺ anode contact layer 23 high impurity Anode layer with high density 24 Anode layer with low impurity density 25 p ⁺ Electrostatic induction anode region 26 n ⁺ Electrostatic induction short-circuit region 27 Metal layer 30 n Buffer layer 31 n ⁺ Buffer layer 32 High impurity density buffer layer 33 Low impurity density Buffer layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01L 29/74 M 29/78 321 J

Claims (9)

[Claims] 1. A semiconductor device having an anode region, a cathode region, and a gate region, comprising a buffer layer in contact with or in the vicinity of the anode region, and the buffer layer having an impurity concentration gradually increasing toward the anode region. DOO as having impurity density gradient consisting
In addition, further, an anode electrode in contact with the anode region
And impurities in the anode region between the buffer layers
Material density approaches from the buffer layer to the anode electrode
To have a gradually decreasing impurity density gradient
Having a drift buffer structure characterized by:
Child. 2. A semiconductor device having an anode region, a cathode region, and a gate region, comprising a buffer layer in contact with or in the vicinity of the anode region, and the buffer layer having the impurity density gradient further comprises an anode.
In the vicinity of the contact with the region, the impurity density of the buffer layer is
Selective at regular intervals along the sides of a high-gradient area
Alternating high and low impurity density regions
2. The semiconductor device having a drift buffer structure according to claim 1 , wherein said low impurity density region is substantially depleted by a diffusion potential between said low impurity density region and said high impurity density region. . 3. The drift buffer structure according to claim 2, wherein the buffer layer in the high impurity density region is short-circuited with the anode region at a pitch of 2L _n or less (L _n is an electron diffusion length). A semiconductor device having. Wherein said buffer layer of claims 1 to 3, characterized in that the said anode region is opposite conductivity type, a semiconductor device having a drift buffer structure according to any one. 5. Among the buffer layer, the high impurity concentration region above the anode region with the opposite conductivity type, the low impurity density region is the anode region and the or intrinsic semiconductor region of the same conductivity type Claim 1 thru | or 1 characterized by the above-mentioned.
3. A semiconductor device having the drift buffer structure according to any one of 3 . 6. A semiconductor device having an anode region, a cathode region, and a gate region, comprising a buffer layer in contact with or in the vicinity of the anode region, wherein the buffer layer having the impurity density gradient further comprises an anode.
The impurity density gradient of the buffer layer near the region
Selective alternation at regular intervals along the sides of a high area
Part of the metal layer area and low impurity density area
The semiconductor device having a drift buffer structure according to claim 1 , wherein the low impurity density region is substantially depleted by a diffusion potential between the low impurity concentration region and the metal layer. 7. The buffer layer in the metal layer region and the anode region have a pitch of 2L _n or less (L _n is an electron diffusion length).
7. The semiconductor device having a drift buffer structure according to claim 6, wherein the semiconductor device is short-circuited with. 8. Among claim 2 or claim 7, characterized in that the thin semiconductor layer of opposite conductivity type to the anode region between the buffer layer and the anode region is interposed, either 1 A semiconductor device having the drift buffer structure according to the above item. 9. The anode region further has a high impurity density gradient in the anode region near the buffer layer.
Selectively staggered at regular intervals along the sides of the area
The high impurity density region and the low impurity density region
The drift buffer structure according to any one of claims 1 to 8 , wherein the low impurity density region is substantially depleted by a diffusion potential between the low impurity density region and the high impurity density region. A semiconductor device having.