JPH0786612A - Monolithic semiconductor device - Google Patents

Abstract

PURPOSE:To scale down chip size by separately forming an active element onto one surface of a semiconductor substrate and a passive element onto the other surface. CONSTITUTION:A semiconductor substrate 1 is etched, and via holes reaching the substrates 3a, 3c for wirings of one surface are formed. An Au sputtered film 6 and an Au plated film 6a are deposited on the other surface of the semiconductor substrate 1. The Au sputtered film 6 in a section in which there is no Au plated film 6a is removed. Consequently, the residual Au sputtered film 6 and Au plated film 6a serve as one-side electrodes of a capacitor. A dielectric film 8 is formed onto the whole surface of the other surface of the semiconductor substrate 1, and the dielectric films 8 in the via hole sections are removed. Lastly, the other electrodes, an Au sputtered film 9 and an Au plated film 9a, of the capacitor are shaped. and these films 9 and 9a are covered with a protective film 10, thus completing a monolithic semiconductor device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monolithic semiconductor device in which an active element and a passive element are formed on both sides of a single semiconductor substrate.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 8, a monolithic semiconductor device composed of circuit components of active elements and passive elements is provided with an active element 21 such as an FET on only one side of a single semiconductor substrate 20, as shown in FIG. For example, the circuit component element including the passive element 22 such as a capacitor is integrally formed.

[0003]

However, in the conventional monolithic semiconductor device in which the circuit constituent elements are formed only on one surface of one semiconductor substrate as described above, passive elements such as capacitors require a large area. It was an obstacle to miniaturization. In order to reduce the chip area without changing the capacitance of the capacitor, it is possible to use an insulating film with a high dielectric constant or to thin the insulating film. It was difficult. Further, also in the inductor, it is difficult to significantly reduce the chip area due to the wiring forming technology.

Therefore, an object of the present invention is to miniaturize the chip size by forming circuit components monolithically on both one surface and the other surface of one semiconductor substrate.

[0005]

According to the present invention, an active element among circuit components is formed on one surface of a semiconductor substrate, and a passive element among the circuit components is formed on the other surface. This is a monolithic semiconductor device in which an active element on one side and a passive element on the other side are connected by a via hole.

[0006]

According to the present invention, active elements such as transistors and diodes are formed separately on one side of one semiconductor substrate, and passive elements such as capacitors, inductors and resistors are formed separately on the other side. Becomes smaller. In the manufacturing method, since the active element and the passive element are manufactured by being divided into one surface and the other surface, the manufacturing is simple and easy.

[0007]

Embodiments of the present invention will now be described with reference to the drawings. In FIG. 1, 1 is a GaAs semiconductor substrate. The field effect transistor 2 and the wiring electrodes 3a, 3b, 3c are formed on one surface of the semiconductor substrate 1 by a normal semiconductor manufacturing technique.

2 to 7 show a process of forming a passive element forming a specific circuit together with the field effect transistor 2 formed in FIG. 1 and, in particular, a capacitor on the other surface of the semiconductor substrate 1. is there.

In FIG. 2, reference numeral 4 is a resist pattern provided on the other surface of the semiconductor substrate 1. The resist pattern 4 has openings 4a and 4b immediately below the wiring electrodes 3a and 3c on one surface. This resist pattern 4
Using the as a mask, the semiconductor substrate 1 is etched with, for example, a sulfuric acid-based etching solution to form via holes 5a and 5b reaching the wiring substrates 3a and 3c on one side, as shown in FIG. Then, the resist pattern 4 is removed.

Next, as shown in FIG. 4, an Au sputtered film 6 is formed on the other surface of the semiconductor substrate 1 by sputtering. Next, a resist 7 is formed on the via hole 5b and its periphery. Next, using the resist 7 as a mask, as shown in FIG.
a is deposited on the Au sputtered film 6. Then, the resist 7 is lifted off. Then, with a potassium iodide-based etching solution, the Au on the portion where the Au plating film 6a is not present is used.
The sputtered film 6 is removed by etching. Then, the remaining Au sputtered film 6 and the Au plated film 6a become one side electrode of the capacitor.

Next, as shown in FIG. 6, a dielectric film 8 such as SiN is formed on the entire other surface of the semiconductor substrate 1 by plasma CVD or the like, and then the dielectric film 8 in the via hole 5b portion. To remove.

Finally, in the same manner as in FIGS. 4 to 5, the other electrode of the capacitor, that is, the Au sputtered film 9 and the Au plated film 9a are formed as shown in FIG. The monolithic semiconductor device according to the present embodiment is completed by covering with 10. One electrode 6 (6a) of the capacitor formed on the other surface of the semiconductor substrate 1 is connected to the wiring electrode 3a on one surface via the via hole 5a, and the other electrode 9 (9a) of the capacitor is connected to the via hole 5b. It is connected to the wiring electrode 3c on one side via the.

In the drawings of the above embodiment, the protective film on one surface of the semiconductor substrate is omitted. Further, in some of the steps, a protective resist is applied on one side and processed.

The connection between one side and the other side of the semiconductor substrate is
The connection is not limited to via holes, but may be made by wire bonding.

Further, in the above embodiment, only the capacitor is shown as the passive element, but in addition to this, an inductor, a resistor and the like are also formed.

[0016]

According to the present invention, the active element is formed on one side of one semiconductor substrate and the passive element is formed on the other side, respectively, so that the chip size is reduced. Further, since the active element and the passive element are separately produced on one side and the other side of the semiconductor substrate, the production is simple and easy.

[Brief description of drawings]

FIG. 1 is a process diagram of forming an active element on one surface of a semiconductor substrate.

FIG. 2 is a process diagram of forming a resist pattern on the other surface of the semiconductor substrate.

FIG. 3 is a process diagram of forming a via hole in a semiconductor substrate.

FIG. 4 is a process diagram of forming an Au sputtered film on the other surface of the semiconductor substrate.

FIG. 5 is a process diagram of forming one capacitor electrode on the other surface of the semiconductor substrate.

FIG. 6 is a process diagram of forming a dielectric film of a capacitor

FIG. 7 is a completed diagram of this embodiment.

FIG. 8 is a diagram showing a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Field effect transistor 3a, 3b, 3c Wiring electrode 4 Resist pattern 5a, 5b Via hole 6 Au sputtered film 6a Au plated film 7 Resist 8 Dielectric film 9 Au sputtered film 9a Au plated film 10 Protective film

Claims (1)

[Claims] 1. A semiconductor substrate is provided with an active element of a circuit constituent element formed on one surface and a passive element of the circuit constituent element is formed on another surface of the semiconductor substrate. A monolithic semiconductor device in which passive elements are connected by via holes.