JPH0778818A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliability of a semiconductor device, by arranging an electrically floating dummy wiring in the part where the wiring interval of a wiring layer of a semiconductor device is widely spaced. CONSTITUTION:At least two lines of electrically floating dummy wirings 4 composed of aluminum are formed on a silicon substrate 1, adjacently to the outermost row of signal wirings 3 composed of aluminum films covered with an insulating film 2 like a silicon oxide film. The wirings 4 have the same line width and the interval as the wirings 3. An organic or inorganic PSG film 5 is formed on the insulating film 2 by spin coating, and the surface is flattened, on which an insulating film 6 is formed. Hence the two lines of dummy wirings are formed in the widely spaced part adjacent to the outermost row of the regularly arranged signal wirings. Step-difference of the insulating film 6 caused by that the PSG film 5 is pulled to the widely spaced part is generated on the dummy wirings 4. When cracks of the insulating film 6 are generated by stress, the influence is not exerted upon the metal wirings 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having multi-layer wiring.

[0002]

2. Description of the Related Art Generally, in semiconductor devices, wiring has become multi-layered as the degree of integration increases. However, due to the step of the lower layer wiring, a step also occurs in the insulating film and the wiring formed in the upper layer, and therefore various planarization methods have been studied.

FIG. 3 is a sectional view showing a first example of a conventional semiconductor device.

As shown in FIG. 3, a signal wiring 3 made of a metal film having a width of an insulating film 2 is formed on a semiconductor substrate 1.
Next, an organic or inorganic PSG film 5 is formed by spin coating to planarize the upper surface, and an insulating film 6 is formed thereon.

A second example of the conventional semiconductor device is disclosed in Japanese Patent Application Laid-Open No. 2-140934, and as shown in FIG. The wide dummy wirings 4 are formed so that the distance between the wirings becomes the minimum pitch.

[0006]

In recent years, semiconductor devices have tended to increase in size. Under such circumstances, a large-sized semiconductor device suffers cracks in the insulating film on the semiconductor substrate that constitutes the semiconductor chip due to repeated temperature cycles or thermal shocks, and is particularly noticeable in a stepped portion of the insulating film. It is easy to occur.

This is a problem caused by mechanical stress acting on the semiconductor chip due to the difference in thermal expansion between the metal wiring on the semiconductor substrate and the insulating film. The thermal expansion coefficient of metal wiring is 250 ×
It is 10 ⁻⁷ / ° C. and the insulating film is 5 × 10 ^{−7 to} 20 × 10 ⁻⁷ / ° C., which is different by about one digit. At low temperatures, the contraction force of the metal wiring compresses it toward the center of the semiconductor chip, so that it acts as a shear stress on the insulating film covering the metal wiring. When this stress exceeds the strength of the insulating film, a crack is generated in the insulating film.
If a foreign material enters due to the occurrence of cracks, or if there is a metal wiring in the upper layer, the metal wiring is plastically deformed, and finally the metal wiring is peeled off from the insulating film, causing a disconnection or a failure of the semiconductor device. It may be tightened.

In this conventional semiconductor device, the step formed in the insulating film on the metal wiring is flattened by the organic or inorganic PSG film spin-coated thereon, and the flat insulating film is formed thereon. . However, if there is a wide open area next to the outermost regularly arranged wiring, the PSG film formed on the wire is attracted to the wide open area,
Between the outermost wiring and the wiring next to it, there was a tendency that it was not filled well. Therefore, a step is formed in the insulating film on the insulating film, and cracks are generated in the insulating film due to thermal stress in the subsequent heat treatment process.

Further, in the case where a wide dummy wiring is formed, if the wiring width becomes wider, the amount of movement due to the difference in thermal expansion increases in proportion to the wiring width, and the stress increases. When the strength of the insulating film is exceeded, cracks occur in the insulating film.

[0010]

The semiconductor device of the present invention comprises:
Signal wirings regularly arranged on a semiconductor substrate and at least two dummy wirings having the same spacing and the same wiring width as the arrangement spacing of the signal wirings formed adjacent to the outermost row of the signal wirings. A first insulating film that covers the signal wiring and the dummy wiring; a spin-coated insulating film formed on the first insulating film and having a flat surface; and a first insulating film formed on the spin-coated insulating film. 2 insulating films.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIGS. 1A and 1B are a partial plan view and a sectional view taken along the line AA 'of a semiconductor chip showing a first embodiment of the present invention.

As shown in FIGS. 1 (a) and 1 (b), a signal is formed adjacent to the outermost column of the signal wiring 3 made of an aluminum film covered with an insulating film 2 such as a silicon oxide film on the semiconductor substrate 1. Dummy wiring 4 made of an electrically floating aluminum film and having the same line width and the same distance as wiring 3.
At least two are formed side by side. Next, the organic or inorganic PSG film 5 is formed on the insulating film 6 by spin coating to flatten the surface, and the insulating film 6 is formed thereon.

As described above, by forming two dummy wirings in a wide space next to the outermost row of regularly arranged signal wirings, an insulating film formed by drawing the PSG film 5 to a wide space is formed. Since the step 6 occurs on the dummy wiring 4, even if the insulating film 6 is cracked by stress, the metal wiring 3 is not affected.

FIG. 2 is a partial plan view of a semiconductor chip showing a second embodiment of the present invention.

As shown in FIG. 2, it has the same structure as that of the first embodiment except that the electrically floating dummy wirings 4a are arranged in a block shape, and the same effect as that of the first embodiment. Can be obtained.

[0017]

As described above, according to the present invention, by arranging at least two electrically floating dummy wirings in a portion of the wiring layer of the semiconductor device where the wiring spacing is wide, an insulating film and a signal wiring are provided. The cracks in the insulating film due to the stress caused by the difference in the thermal expansion coefficient of can be moved to the electrically unrelated dummy wiring which is not actually harmful.

As a result, the probability of failure of the semiconductor device can be reduced and the reliability of the semiconductor device can be improved.

[Brief description of drawings]

FIG. 1 is a partial plan view and a sectional view taken along line AA ′ of a semiconductor chip showing a first embodiment of the present invention.

FIG. 2 is a partial plan view of a semiconductor chip showing a second embodiment of the present invention.

FIG. 3 is a partial cross-sectional view of a semiconductor chip showing a first example of a conventional semiconductor device.

FIG. 4 is a partial cross-sectional view of a semiconductor chip showing a second example of a conventional semiconductor device.

[Explanation of symbols]

 1 semiconductor substrate 2,6 insulating film 3 signal wiring 4,4a dummy wiring 5 PSG film

Claims (1)

[Claims] 1. A signal wiring arranged regularly on a semiconductor substrate and at least the same wiring width as the arrangement spacing of the signal wiring formed adjacent to the outermost row of the signal wiring, and having the same wiring width. Two dummy wirings, a first insulating film that covers the signal wirings and the dummy wirings, and a spin coat insulating film that is formed on the first insulating film and has a planarized surface.
A semiconductor device comprising: a second insulating film formed on the spin-coated insulating film.