JPH0775964A - Wafer polishing device - Google Patents

Abstract

PURPOSE:To eliminate the facors of wafer quality degradation caused by depression during polishing and caused due to a device at the time of controlling the rotating speed so as to allow wafers to be polished into constant thickness with a high accuracy in parallelism and flatness. CONSTITUTION:This wafer polishing device has an upper surface table 1 with aligning mechanism 8, a rotatory-driven lower surface table 2, a carrier 3 held in between, and carrier rotating mechanisms 5, 6. Plural dummy wafers 7 (SiC ceramics, for instance) serving as polishing resistant material are installed in the vicinity of wafers 4 fitted into the carrier 3, and the carrier rotating mechanism 5, 6 put the dummy wafers 7 in epicyclic motion in-line over the whole surface of the surface tables 1, 2 simultaneously with polishing of the wafers 4. At the final polishing time, the upper and lower surface tables 1, 2 are brought into close contact with plural dummy wafers 7. The spacing of the upper and lower surface tables 1, 2 can be thereby constrained to be parallel and constant. Wafers can be thereby polished into constant thickness with high accuracy in parallelism and flatness.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing apparatus for obtaining a wafer having a constant thickness and a high degree of flatness, and more particularly to a polishing apparatus mainly used for semiconductor wafers.

[0002]

2. Description of the Related Art There are various processes for manufacturing a semiconductor wafer, but a polishing process for aligning a wafer sliced from an ingot to a constant thickness within a thickness range of 600 to 1200 μm and for keeping parallel and flatness constant. Is an essential process for obtaining a final wafer with high accuracy and high flatness.

The final quality of the wafer depends on how to obtain a wafer having a constant thickness and a parallel and high flatness in this polishing step. The quality of the polishing step depends on the quality of the next step. It remains in the etching and polishing, and also affects the quality of the final wafer.

Therefore, in the polishing process, how to make the wafers uniform in thickness and achieve parallelism and flatness has been a subject for obtaining highly accurate wafer quality.

In order to solve this problem, in the conventional wafer polishing apparatus, first, in order to obtain the flatness of the surface plate, the wafer polishing operation is periodically stopped and the surface plate is corrected and polished in batches. It has been attempted to solve the problems by controlling the rolling force of the upper and lower surface plates, the relative rotation speed control, and the combination of these to control the polishing time.

An example of such a wafer polishing apparatus will be described below.

In the conventional wafer polishing apparatus, as shown in FIGS. 5 and 6, an upper surface plate 1 and a lower surface plate 2 are used to apply a pressing force F using an air source or the like so that the upper surface plate 1 and the lower surface plate 1 are placed between The carrier 3 and the wafer 4 as the material to be polished are sandwiched between the carrier 3 and the hole 3a formed in the carrier 3, and a gear provided on the peripheral portion of the carrier 3 separately from the rolling force F is used as a sun gear 5 and The internal gear 6 separately arranged around the platen 2 is made to bite, and the carrier 3 is rotated by using the driving rotation of the sun gear 5, and as a result, the wafer 4 to be polished is relatively spread over the entire surface plate 1 and 2. A method is employed in which a planetary rotational movement is generated, and the pressure and rotational movement are used to draw in the supplied abrasive to polish the wafer 4. Here, in order to maintain the surface flatness of the upper and lower surface plates 1 and 2, the shape is corrected prior to polishing, and
In general, the lower surface plate 2 is provided with fine grooves arranged in a mesh to improve the drainage of the polishing liquid.

The upper surface plate 1 has a mechanism for freely rotating so that it can follow the drive rotation of the lower surface plate 2, and the upper surface plate support metal 9
In addition, the centering mechanism 8 is provided so as to be able to absorb a minute inclination generated due to the difference in thickness of the wafer 4 during polishing or the contact of the uneven portion.

Further, in order to maintain the polishing performance and prevent the wear of the wafers other than the wafer 4 to be polished, the materials have a different polishing resistance,
The upper and lower surface plates 1 and 2 are made of cast iron (FC30 etc.) and the carrier 3 is made of tool steel (SK etc.). Abrasive wear of the equipment is absorbed by correcting the upper and lower surface plates 1 and 2 It is reproducible.

In order to obtain a constant thickness wafer and a high flatness wafer with such a wafer polishing apparatus, the following measures have been generally made.

First, in order to maintain the flatness of the upper and lower surface plates 1 and 2, taking into consideration the influence of heat generation during polishing, a concave crown shape of 20 to 30 μm is corrected and processed by off-line batch processing. Next, the rolling force and the rotational movement are controlled.

The pressing force F is changed with time in order to adjust the polishing performance according to the unevenness of the wafer 4. For example, within a few minutes of the initial reduction, a slight slight reduction is performed, and after polishing the extreme convex portion of the wafer 4, the reduction force F is increased to increase the polishing rate, and finally, a slight reduction is performed to form minute unevenness. A method of repeatedly performing light pressure reduction and heavy pressure reduction according to the idea of eliminating them or a combination thereof is used, and a method of controlling the pressurization time is common. Further, as the final fixed dimension detection method, there is adopted a method of controlling by the polishing time or detecting the gap between the upper and lower surface plates 1 and 2 with a one-point indicator to complete the polishing.

With respect to the rotational movement, the upper and lower surface plates 1 and 2 are finely ground at the same time as the wafer is polished, so that the influence thereof is eliminated, and the unevenness of heat generated from the wafer polishing contact surface is eliminated. For the purpose of efficiently dissipating the generated heat over the entire surface, avoiding that the wafer 4 stays at a certain position on the surface plate, and considering that the wafer 4 is evenly contacted over the entire surface plate, the rotation speed of the lower surface plate 2 and the sun gear 5 are considered. By variably controlling the rotation speed of the carrier, the rotation locus of the carrier 3 sandwiched between the upper and lower surface plates 1 and 2 is changed,
A method is adopted in which the wafer 4 therein is subjected to a planetary motion over the entire surface of the surface plate.

On the basis of these conventional polishing methods, when the surface plate wear progresses, it is inevitable that the surface flatness is not maintained even though it is minute, and the flatness quality of the polished wafer is adversely affected. Further, no matter how the rolling force and the rotational speed during polishing are controlled, as long as the final sizing detection is performed by the polishing time or the detection of a single indicator gap, the polishing device during the final polishing is the upper surface plate 1 as shown in FIG. Lower surface plate 2
Were not perfectly parallel to each other, and it was difficult to reliably maintain the parallelism of the polished wafer 4. This is also a factor that deteriorates the quality of the polished wafer 4 during polishing, that is, the variation of the platen parallelism generated by the wafer polishing apparatus, the influence of the rolling force, the variation of the sizing accuracy, and the variation of the platen rotation speed. This impedes the improvement of the flatness of the polished wafer 4.

Therefore, for example, when a 6-inch wafer is polished by a conventional method, after polishing a wafer having a thickness of about 1000 μm by 50 to 60 μm, the thickness variation of the polished wafer is 15 μm and the in-plane variation is 2.0 μm (maximum). , The minimum difference) level was the limit.

The accuracy of the variation is 1.0 to 10 in-plane variation by polishing with a thickness of 10 μm by polishing to obtain a final product.
It is still at an unsatisfactory level in response to the demand to suppress the thickness to 0.5 μm or less.

[0017]

SUMMARY OF THE INVENTION In a conventional wafer polishing apparatus, an offline batch correction processing of a surface plate, a pressure control, and a rotation speed are carried out in order to obtain a wafer having a constant thickness, parallelism, and high accuracy of flatness. It is difficult to eliminate the factors that deteriorate the quality of the wafer by controlling them alone.
The resulting polished wafer was still of a level that had a quality influence on the final product of the wafer.

Therefore, an object of the present invention is to eliminate the factors that deteriorate the quality of the wafer due to the wafer polishing apparatus, improve the flatness and parallelism of the wafer to be polished, and reduce the in-plane variation of the wafer thickness. To do.

[0019]

Means for Solving the Problems The present invention for achieving the above object comprises an upper surface plate, a lower surface plate, and a carrier sandwiched between these upper and lower surface plates, and a wafer as a material to be polished. Sandwiched between the upper and lower surface plate while holding in the hole formed in the carrier, applying a rolling force and a rotational movement by the upper and lower surface plate, at the same time polishing the wafer by applying an abrasive In the polishing apparatus, a plurality of holes are provided in the vicinity of the place where the wafer is installed in the carrier, and an anti-polishing material dummy wafer corresponding to the final polishing wafer thickness is installed in each hole. A wafer polishing machine characterized by performing in-line polishing of the upper and lower surface plates by intimately polishing the dummy wafers, and maintaining and restraining the distance between the upper and lower surface plates. That.

[0020]

[Function] Since a plurality of holes are provided in the vicinity of the place where the wafer is set in the carrier, and a plurality of abrasive-resistant dummy wafers (SiC ceramics or the like) corresponding to the final polishing wafer are set, the upper and lower surface plates are fixed at the final polishing. By closely polishing multiple dummy wafers, the dummy wafers are provided with a function to constantly correct the surface plate online during polishing.
It eliminates the need for offline batch correction processing on the surface plate. Further, the dummy wafer can maintain and constrain the intervals between the upper and lower surface plates in parallel at the final stage of polishing, regardless of the method of controlling the rolling force and the method of controlling the number of revolutions, thereby eliminating the factor of quality deterioration.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. The wafer polishing apparatus consists of an upper surface plate 1 and a lower surface plate 2
And a carrier 3 (see FIG. 1) sandwiched between the upper and lower surface plates 1 and 2, and a wafer 4 as a material to be polished.
Holding it in the hole 3a formed in the carrier 3 and sandwiching it between the upper and lower surface plates 1 and 2, and the rolling force F is reduced by the upper and lower surface plates 1 and 2.
Then, the wafer 4 is polished by applying a polishing agent at the same time as the above. As shown in FIG. 1, the carrier 3
Has a plurality of holes 3b near the place where the wafer 4 is installed.
Is provided, and a polishing-resistant dummy wafer 7 corresponding to the final polishing wafer thickness is installed in each hole 3b. The carrier 3 is configured to make a planetary motion by a carrier rotating mechanism including a sun gear 5, an internal gear 6, and the like.

As shown in FIG. 2, the abrasive resistant dummy wafer 7 installed on the carrier 3 draws a planetary orbit 10 indicated by a dotted line in accordance with the rotational movements of the surface plates 1 and 2 and the carrier 3.
Although the entire surface of the surface plates 1 and 2 is covered, if a plurality of such dummy wafers 7 are installed in the vicinity of the wafer 4 to be polished, the dummy wafers 7 that are rotating during the entire surface of the surface plates 1 and 2 are rotated.
It can be easily understood that the contact with the surface plates 1 and 2. Actually, the contact area with the surface plates 1 and 2, that is, the area covering the surface plates 1 and 2 is 0.5 to 1.0 times as large as that of the wafer 4 to be polished, although it depends on the number of the planetary trajectory 10 and the number of dummy wafers 7. If 5 to 6 dummy wafers 7 with a diameter are arranged, surface plates 1 and 2
Can cover the entire surface of. At the beginning of polishing, the dummy wafer 7 does not always come into contact with the upper surface plate 1 as shown in FIG. However, at the end of polishing, as shown in FIG. 4, the dummy wafer 7 is always in contact with the upper and lower surface plates 1 and 2. By polishing in this state, the upper and lower surface plates 1 and 2 are finely corrected by the dummy wafer 7, and the surface plate is constantly corrected during online polishing, so that the flatness of the upper and lower surface plates can be maintained. .

The dummy wafer 7 having such a function is required to have a high polishing property.
Sufficient abrasion resistance can be obtained by applying Si ceramics or the like to 30 and the abrasive alumina powder.

FIG. 4 is a cross-sectional view excluding the quality deterioration factors due to pressure and rotation speed. At the initial stage of polishing, as shown in FIG. 3, since the upper surface plate 1 is mainly in contact with the wafer 4 to be polished, it is not completely parallel to the lower surface plate 2. As the polishing of the wafer 4 progresses, the irregularities on the surface of the wafer are scraped off, but since the final polished wafer thickness t is generally larger than the thickness of the carrier 3, the lower surface of the upper platen 1 is determined even at the final stage of polishing. Although the inclination with respect to the board 2 is slight, it remains and the quality deterioration is inevitable. On the other hand, FIG. 4 shows that the upper surface plate 1 and the lower surface plate 2 are finally restrained by the dummy wafer 7. It can be easily understood from the state of FIG. 3 that when polishing is applied by applying a rolling force, the final polishing is always kept constant regardless of the pressure control and the rotation speed control during polishing. In order to maintain the parallelism of the upper and lower surface plates 1 and 2 with precision, the dummy wafer 7 made of a material capable of high parallelism and high flatness must be used, but SiC ceramic or the like which also has polishing resistance is used. If used, sufficient accuracy can be obtained.

In this way, the wafer polishing apparatus for closely polishing the plurality of dummy wafers 7 arranged on the carrier 3 eliminates the conventional quality deterioration factor and provides a polished wafer with a uniform thickness, parallelism, and high flatness accuracy. It became possible to obtain.

An example of polishing a wafer using the method of the present invention will be described. Using the carrier 3 shown in FIG. 1 and using SiC ceramic for the dummy wafer 7, 6 inches 1000 μm
As a result of polishing an m-thick wafer as before, the thickness variation was reduced from the conventional 15 μm to 4 μm, and the in-plane variation was also reduced from 2.0 μm (maximum / minimum difference) to 1.0 μm. It was confirmed that the parallelism and flatness were improved.

Further, in the prior art, scratching (wafer surface scratches) was easily generated at the corners of the surface plate by finishing the polishing of the upper surface plate 1 in a slightly slanted state. It was confirmed that the wafer polishing apparatus also has an effect of preventing this scratch.

In recent years, the density of large-scale integrated circuits has increased,
The requirements for parallelism and flatness to the wafer are becoming more and more stringent, and even if the DRAM is equivalent to 64M (mega), the thickness variation of the wafer is several μm and the in-plane variation is within 0.5 to 1.0 μm. Is said to be required.
The wafer polishing apparatus according to the present invention makes it possible to supply wafers that can cope with this increase in density.

[0029]

As described above, according to the wafer polishing apparatus of the present invention, the dummy wafer is provided with the function of constantly correcting the surface plate online during polishing, and the offline batch correction processing of the surface plate is performed. It becomes unnecessary. Furthermore, the dummy wafer can maintain and constrain the upper and lower platen intervals in parallel at the final stage of polishing regardless of the method of controlling the rolling force and the method of controlling the number of revolutions. Exacerbating factors are removed. As a result, it is possible to improve the flatness and parallelism of the wafer to be polished and to obtain a final wafer with reduced in-plane variation in wafer thickness, and it is possible to supply wafers that can handle recent high density. Becomes

[Brief description of drawings]

FIG. 1 is a plan view showing a carrier in a wafer polishing apparatus according to the present invention.

FIG. 2 is a diagram showing a rotation locus of a polishing-resistant dummy wafer in a carrier according to the present invention on a surface plate.

FIG. 3 is a cross-sectional view of essential parts showing a state in the middle of polishing of the wafer polishing apparatus according to the present invention.

FIG. 4 is a cross-sectional view of essential parts showing a state at the final stage of polishing in the wafer polishing apparatus according to the present invention.

FIG. 5 is a perspective view showing a conventional wafer polishing apparatus.

FIG. 6 is a sectional view showing a conventional wafer polishing apparatus.

[Explanation of symbols]

1 ... Upper surface plate, 2 ... Lower surface plate, 3 ... Carrier, 4 ... Wafer for material to be polished, 5 ... Sun gear,
6 ... Internal gear, 7 ... Abrasive-resistant dummy wafer, 8 ... Self-aligning mechanism, 9 ... Upper platen support hardware, 10 ... Dummy wafer locus.

Claims (1)

[Claims] 1. An upper surface plate (1), a lower surface plate (2), and a carrier (3) sandwiched between these upper and lower surface plates (1, 2), and a wafer ( 4) The carrier (3)
It is sandwiched between the upper and lower surface plates (1, 2) while being held in the hole (3a) formed in the upper surface, and a pressing force (F) and a rotary motion are applied by the upper and lower surface plates (1, 2). In the wafer polishing apparatus configured to polish the wafer (4) by giving a plurality of holes (3b) near the place where the wafer (4) in the carrier (3) is installed, each hole ( A dummy wafer (7) with an abrasive resistance corresponding to the thickness of the final polished wafer is installed in 3b), and the upper and lower surface plates (1, 2) are adhered to the plurality of dummy wafers (7) at the final stage of polishing, thereby The surface plate (1, 2) is polished and corrected inline, and the upper and lower surface plates (1, 2)
A wafer polishing apparatus characterized by maintaining and restraining the interval of 2).