JPH0774328A - Soi substrate - Google Patents

Abstract

PURPOSE:To enable an SOI substrate to be less warped when an SOI layer and a support substrate are joined together through the intermediary of an insulator layer by a method wherein grooves are provided to the insulator layer. CONSTITUTION:The joining surface of a first semiconductor substrate 1 is mirror- polished, and an oxide film 3 is formed thereon as an insulator layer through thermal oxidation. In succession, grooves 4 are provided to the oxide film 3 through selective etching. The joining surface of the first semiconductor substrate 1 and the mirror- polished surface of a second semiconductor substrate 2 as a support substrate are brought into close contact with each other in a clean atmosphere for bonding. Then, the first semiconductor substrate 1 and the second semiconductor substrate 2 are thermally treated to be enhanced in bonding strength between them for the formation of a firmly bonded composite board. As this SOI substrate is composed of the substrates 1 and 2 which are bonded together through the intermediary of an oxide film where grooves are cut through etching, the substrates 1 and 2 are bonded together through areas surrounded with grooves, and consequently an Si board is substantially lessened in diameter. Therefore, an SOI substrate of this design can be less warped.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an SOI substrate, and more particularly to an SOI substrate with reduced warpage.

[0002]

2. Description of the Related Art A semiconductor device using a dielectric isolation semiconductor substrate (SOI substrate) is capable of easily isolating elements by a dielectric, and a high breakdown voltage element at an output stage and a low breakdown voltage element for driving it are integrated. Since it is convenient to do so, research into high and low voltage integrated type power ICs and the like is underway.

A direct bonding technique is effective for producing such an SOI substrate (Japanese Patent Laid-Open Nos. 60-51700 and 61-554).
No. 4, etc.). According to this technique, strong bonding can be obtained by bonding the mirror-polished surfaces together in a clean atmosphere.

Since one of the two directly bonded semiconductor substrates is used as an SOI layer, it is used by polishing to an appropriate thickness, for example, several tens of μm. The problem here is the warp of the SOI substrate. That is, it is caused by the difference in the coefficient of thermal expansion between the oxide film below the SOI layer and the supporting substrate.

Usually, in the case of direct bonding, mirror-polished surfaces are brought into close contact with each other and bonded, and then heat treatment at about 1000 ° C. is performed to improve the bonding strength. When it is cooled to room temperature after that, a warp having a convex shape on the SOI layer side occurs due to the difference in the coefficient of thermal expansion.

The presence of such a warp hinders device formation by lithography or the like. Therefore, there is an attempt to prevent the occurrence of warpage by forming an oxide film having the same thickness as the intermediate oxide film on the back surface of the supporting substrate side. However, the oxide film formed on the SOI layer side during element formation Is required. At this time, the oxide film on the back surface is also removed, so that it is necessary to form a protective film, which complicates the process. There are problems such as the above, and the warpage has not been resolved.

[0007]

As described above, in the device using the SOI substrate, the elimination of the warp of the SOI substrate is an important issue, but the present situation is that effective means has not been realized yet. There is a demand for increasing the thickness of the intermediate oxide film from the viewpoint of increasing the withstand voltage, and accordingly, the warpage is becoming more prominent. In addition, the diameter of the substrate tends to increase, and the warpage is increasing with it. The present invention has been made in consideration of the above points,
An object is to provide an SOI substrate with reduced warpage.

[0008]

According to the present invention, in an SOI substrate in which an SOI layer on which an element is formed and a supporting substrate are directly bonded via an insulator layer, a groove is formed in the insulator layer. And a dielectric isolation semiconductor substrate.

It is sufficient that the thickness of the insulating layer is partially reduced in this groove, and the oxide film may be completely removed in the groove portion. The shape and pattern of the groove are not particularly specified, but the groove can be formed in a lattice pattern, for example. Also, when a large number of wafers are to be taken from one wafer, it is necessary to perform dicing after element formation, but it is convenient to form this groove in accordance with the location of dicing.

[0010]

By forming the groove in the intermediate insulating layer in this way, the influence of the insulating layer on the supporting substrate can be reduced. Therefore, the warp of the SOI substrate can be reduced.

[0011]

EXAMPLES Examples of the present invention will be described below. (Embodiment 1) FIG. 1 is a process chart of this embodiment.

A Si substrate is prepared as a first semiconductor substrate (1) to be an SOI layer, and a Si substrate is prepared as a second semiconductor substrate (2) to be a supporting substrate. The conductivity type may be either n ⁻ or p ⁻ .

The bonding surface of the first semiconductor substrate (1) is mirror-polished and then an oxide film (3) is formed as an insulating layer by thermal oxidation. Then, the trenches (4) are
Are formed (FIG. 1 (a)). Bonding is obtained by bringing the bonding surface of the first semiconductor substrate and the mirror-polished surface of the second semiconductor substrate (5) serving as the supporting substrate into close contact with each other in a clean atmosphere. Then, a heat treatment at about 1000 ° C. is performed to improve the bonding strength, and a strongly directly bonded composite substrate can be obtained (FIG. 1).
(b)).

In the SOI substrate thus obtained, since the groove is substantially a joint portion, apparently Si is formed.
This is the same as reducing the diameter of the substrate. Therefore, the warp of the substrate can be reduced.

If the groove interval is the same as the finally obtained chip size or an integral multiple of the chip size, the final chip is obtained by dicing along the groove after the device is formed on the SOI substrate. be able to. An example of the power IC thus obtained is shown in FIG.

Further, when the groove remains in the chip and the element characteristics are not affected, the groove interval may be set to an arbitrary size, which makes the SOI substrate excellent in versatility.
The groove provided in the oxide film may be formed so that the oxide film remains (FIG. 3). Even in that case, the stress caused by the oxide film is reduced as compared with the case of the oxide film having a uniform film thickness, so that the warp can be reduced. It is more effective that the oxide film remaining at this time is on the SOI layer side. Alternatively, an oxide film may be formed on the supporting substrate side to perform bonding.

The method of directly joining the substrates is not limited to the method of this embodiment, and various methods such as electrostatic bonding can be used. (Embodiment 2) In Embodiment 1, since the groove is opened at the end portion of the substrate, there is a possibility that the surface of the semiconductor substrate may be contaminated during element formation. Therefore, in this embodiment, the groove is closed so as not to open at the end of the substrate (FIG. 4).

With such a structure, it is possible to reduce the risk of contamination of the surface of the semiconductor substrate. Also in the first embodiment, the same effect can be obtained by filling the opening portion of the substrate end portion with polysilicon or the like.

Although the grid-like grooves are formed in the embodiment described above, various patterns such as rhombus, triangular shape, polygonal shape and various combinations can be considered as shown in FIG. Further, not only the oxide film existing at the interface but also the back surface on the supporting substrate side is formed with a groove, whereby the warpage of the entire substrate can be further reduced. An example will be described. (Embodiment 3) Lattice-like grooves (5) are formed on the back surface of the second semiconductor substrate (2) to be a supporting substrate, and the oxide film (6) is formed in the grooves ((5)).
An SOI substrate was prepared in the same manner as in Example 1 except that the structure was embedded (FIG. 6).

The width of this groove is about several μm, and it is desirable that it is about 1 μm or less in order to fill the groove with an oxide film by thermal oxidation. The depth is several μm to several tens of μm. According to this structure, since the supporting substrate has a structure sandwiched by oxide films, it is possible to suppress warpage even when the intermediate oxide film is thickened.

Further, the oxide film (6) on the back surface is removed at the surface even in the etching step at the time of forming the element, but the oxide film inside the groove remains, so that it is necessary to separately form a protective film for protecting the oxide film on the back surface. Disappear.

The oxide film on the back surface may be formed separately by CVD or the like. Further, it is not always necessary to fill the groove with an oxide film. The structure is shown in FIG. In the structure shown in FIG. 7, the unfilled portion in the groove (5) is filled with polysilicon (7) by a method such as low pressure CVD. With such a structure, the oxide film (6) on the back surface is not removed because the oxide film is not exposed on the surface of the back surface even in the step of removing the oxide film during element formation. In the above embodiments, the case where the oxide film is used has been described, but it goes without saying that other insulating materials may be used.

[0023]

As described above, according to the present invention, since an SOI substrate with less warp can be obtained, it is possible to favorably form an element using the SOI substrate.

[Brief description of drawings]

FIG. 1 is a process schematic view showing an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of an element using the SOI substrate of the present invention.

FIG. 3 is a process schematic diagram showing an embodiment of the present invention.

FIG. 4 is a schematic plan view showing an embodiment of the present invention.

FIG. 5 is a schematic plan view showing an embodiment of the present invention.

FIG. 6 is a schematic sectional view showing an embodiment of the present invention.

FIG. 7 is a schematic sectional view showing an embodiment of the present invention.

[Explanation of symbols]

 First semiconductor substrate ... 1 Second semiconductor substrate (supporting substrate) ... 2 Oxide film ... 3,6 Grooves ... 4,5

Claims (1)

[Claims] 1. An SOI substrate in which an SOI layer on which an element is formed and a supporting substrate are directly bonded to each other through an insulator layer, wherein a groove is formed in the insulator layer. .