JPH0769386B2 - Semiconductor device testing equipment - Google Patents

Semiconductor device testing equipment

Info

Publication number
JPH0769386B2
JPH0769386B2 JP18029487A JP18029487A JPH0769386B2 JP H0769386 B2 JPH0769386 B2 JP H0769386B2 JP 18029487 A JP18029487 A JP 18029487A JP 18029487 A JP18029487 A JP 18029487A JP H0769386 B2 JPH0769386 B2 JP H0769386B2
Authority
JP
Japan
Prior art keywords
semiconductor device
contact
chip
test
testing equipment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP18029487A
Other languages
Japanese (ja)
Other versions
JPS6423173A (en
Inventor
良二 西橋
克二 川口
邦夫 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP18029487A priority Critical patent/JPH0769386B2/en
Publication of JPS6423173A publication Critical patent/JPS6423173A/en
Publication of JPH0769386B2 publication Critical patent/JPH0769386B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置、特に周囲に内向きJ形に成型さ
れた外部リードを有する半導体装置の電気測定、試験を
行なうために用いて好適な試験装置の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention is suitable for use in electrical measurement and testing of semiconductor devices, particularly semiconductor devices having external leads molded inwardly in a J shape in the periphery. The improvement of simple test equipment.

〔従来の技術〕[Conventional technology]

半導体装置の電気的特性等を試験する試験装置として、
概略第5図および第6図に示すような構成のものが考え
られている。これを簡単に説明すると、図中符号1は上
方に開口する収容空間1aを有する保持具で、この保持具
1の収容空間1a側壁部には、被試験対象である半導体装
置2の周囲に設けられている外部リード2aと1:1で対応
して接触する同数の接触子3が同一ピッチで配設して保
持されている。
As a test device for testing the electrical characteristics of semiconductor devices,
A structure as shown in FIG. 5 and FIG. 6 is considered. To briefly explain this, reference numeral 1 in the drawing is a holder having an accommodation space 1a that opens upward, and a side wall of the accommodation space 1a of the holder 1 is provided around the semiconductor device 2 to be tested. The same number of contacts 3 that make a 1: 1 contact with the external leads 2a are arranged and held at the same pitch.

4は前記半導体装置2をその上部に位置決めして保持す
る載せ台4aを有し昇降動作される吊下げ具、5は前記載
せ台4aと対をなし前記半導体装置2を一定の隙間Sをも
って挟み込む押付け具で、この押付け具5は、前記吊下
げ具4およびその載せ台4aに保持された半導体装置2と
共に昇降動作するように構成されている。
Reference numeral 4 denotes a suspending tool which has a mounting base 4a for positioning and holding the semiconductor device 2 on its upper part and which is moved up and down. 5 forms a pair with the mounting base 4a and sandwiches the semiconductor device 2 with a constant gap S therebetween. The pressing tool 5 is configured to move up and down together with the hanging tool 4 and the semiconductor device 2 held by the mounting table 4a.

このような構成によれば、載せ台4a上に半導体装置2を
載置し、かつ押付け具5を降下させて載せ台4aとの間に
半導体装置2を挟み込んだ後、これら三者を一体のまま
保持具1の収容空間1a内に押込むことにより、半導体装
置2の外部リード2aは保持具1内に配設されている接触
子3の板ばね作用により所定の押圧力をもって接触する
ことになる。そして、このように電気的に導通した状態
で半導体装置2の電気的特性の測定試験等を行ない、か
つその終了後において、前記半導体装置2およびこれを
挟み込む吊下げ具4および押付け具5が、再び一体のま
ま上昇することにより、一回の測定試験に関する動作が
完了するものである。
According to such a configuration, the semiconductor device 2 is placed on the mounting table 4a, and the pressing tool 5 is lowered to sandwich the semiconductor device 2 between the mounting table 4a and the semiconductor device 2 and then the three devices are integrated. By pushing the holder 1 into the accommodation space 1a of the holder 1, the external lead 2a of the semiconductor device 2 comes into contact with a predetermined pressing force by the leaf spring action of the contactor 3 arranged in the holder 1. Become. Then, a measurement test or the like of the electrical characteristics of the semiconductor device 2 is conducted in such an electrically conductive state, and after the end, the semiconductor device 2 and the suspending tool 4 and the pressing tool 5 sandwiching the semiconductor device 2 are The operation related to one measurement test is completed by rising again as a unit.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

しかしながら、このような構成による装置では、半導体
装置2の外部リード2aの表層部の一部、たとえば半田メ
ッキやその酸化膜等が、接触子3により削り取られ、た
とえば第7図中Aで示すように接触子3の接触面に堆積
するという問題を生じてしまうものである。そして、こ
のような堆積物Aは、測定、試験の回数が増すにつれて
徐々に増加するものであり、その結果として外部リード
2aと接触子3との間での良好な接触状態を維持し得なく
なる等の問題を招く虞があり、このような問題点を解決
し得る何らかの対策を講じることが望まれている。
However, in the device having such a structure, a part of the surface layer portion of the external lead 2a of the semiconductor device 2, for example, solder plating or its oxide film is scraped off by the contact 3, and as shown by A in FIG. 7, for example. In addition, the problem of depositing on the contact surface of the contactor 3 occurs. Further, such a deposit A gradually increases as the number of measurements and tests increases, and as a result, the external lead
There is a risk of causing a problem such that a good contact state between the contact 2a and the contactor 3 cannot be maintained, and it is desired to take some measures that can solve such a problem.

本発明は上述した事情に鑑みてなされたもので、接触子
に対する外部リードの接触動作により発生する異物を、
毎回の昇降動作時に、こすり取って除去し、常に安定し
た接触状態を確保し得る半導体装置の試験装置を得るこ
とを目的としている。
The present invention has been made in view of the above-mentioned circumstances, and eliminates foreign matter generated by the contact operation of the external lead with respect to the contactor.
It is an object of the present invention to obtain a semiconductor device test apparatus that can be scraped off and removed at every lifting operation to always ensure a stable contact state.

〔問題点を解決するための手段〕[Means for solving problems]

本発明に係る半導体装置の試験装置は、半導体装置を位
置決め保持して昇降動作される吊下げ具の載せ台の底面
部に、半導体装置の外部リードまでを含めた外寸法に略
々等しい寸法を有するチップを設け、このチップにより
前記半導体装置の外部リードと接触する接触子表面に付
着する異物を、こすり取るように構成したものである。
The semiconductor device testing apparatus according to the present invention has a dimension substantially equal to the external dimension including the external leads of the semiconductor device, on the bottom surface of the platform of the hanging tool that is operated to position and hold the semiconductor device. The chip is provided, and the chip is configured to scrape off foreign matter adhering to the surface of the contact that contacts the external lead of the semiconductor device.

〔作用〕[Action]

本発明によれば、毎回の測定のための吊下げ具の昇降動
作の際に、接触子接触面を、吊下げ具の載せ台底面部に
設けたチップの側面が摺接し、その表面に付着している
金属酸化物等の異物を除去するもので、常に良好な接触
子接触面を維持し得るものである。
According to the present invention, the side surface of the chip provided on the bottom surface of the mounting table of the hanging tool makes sliding contact with the contactor contact surface during the lifting operation of the hanging tool for each measurement, and adheres to the surface. It removes foreign substances such as metal oxides, and can always maintain a good contact surface.

〔実施例〕〔Example〕

以下、本発明を図面に示した実施例を用いて詳細に説明
する。
Hereinafter, the present invention will be described in detail with reference to the embodiments shown in the drawings.

第1図および第2図は本発明に係る半導体装置の試験装
置の一実施例を示すものであり、これらの図において前
述した第5図ないし第7図と同一または相当する部分に
は同一番号を付してその説明は省略する。
1 and 2 show an embodiment of a semiconductor device testing apparatus according to the present invention. In these figures, the same or corresponding parts as those in FIGS. 5 to 7 described above are designated by the same reference numerals. Is attached and the description thereof is omitted.

さて、本発明によれば、半導体装置2を位置決め保持し
て昇降動作される吊下げ具4の載せ台4aの底面部に、半
導体装置2の外部リード2aまでを含めた外形寸法に略々
等しい寸法を有するチップ10を設け、このチップ10によ
り前記半導体装置2の外部リード2aと接触する接触子3
表面に付着する金属酸化物等の異物(堆積物)Aを、こ
すり取るように構成したところに特徴を有している。
By the way, according to the present invention, the outer dimensions of the bottom 4a of the mount 4a of the suspending tool 4 which holds the semiconductor device 2 while positioning and holding the semiconductor device 2 and the external lead 2a of the semiconductor device 2 are substantially equal. A contact 3 provided with a chip 10 having dimensions, and contacting the external lead 2a of the semiconductor device 2 by the chip 10.
The feature is that the foreign material (deposit) A such as a metal oxide attached to the surface is scraped off.

すなわち、本発明によれば、半導体装置2の測定、試験
を行なうために載せ台4aに半導体装置2を載置しかつ押
付け具5で挟み込んだ状態で吊下げ具4を、第3図
(a)中矢印で示すように下降させ、これらを同図
(b)で示すように保持具1内に押込むと、保持具1内
の接触子3の接触面に前回の測定、試験時などにおいて
図中Aで示すように付着していた異物は、この接触面に
チップ10の側端面が摺接して下降していくに伴なって、
こすり落されることになる。これは、このときチップ10
が、接触子3を押広げながら、これと同時に摩擦力で接
触面に摺接することから容易に理解されよう。その結
果、同図(c)に示すように、接触子3に対して付着さ
れた異物Aは簡単かつ確実に除去され、常に良好な接触
子3接触面を維持し、適切な測定、試験が行なえるもの
である。
That is, according to the present invention, in order to measure and test the semiconductor device 2, the semiconductor device 2 is placed on the mounting table 4a and is sandwiched by the pressing tool 5, and the hanging tool 4 is shown in FIG. ) When they are moved down as indicated by the middle arrow and pushed into the holder 1 as shown in FIG. 1B, the contact surface of the contact 3 in the holder 1 is contacted with the contact surface during the previous measurement or test. As shown by A in the figure, the foreign matter adhered to the contact surface slides down with the side end surface of the chip 10, and
Will be scraped off. This is chip 10 at this time
However, it can be easily understood from the fact that while the contactor 3 is being spread out, the contactor 3 is brought into sliding contact with the contact surface by frictional force at the same time. As a result, as shown in FIG. 7C, the foreign matter A attached to the contact 3 is easily and surely removed, and a good contact surface of the contact 3 is always maintained, so that an appropriate measurement and test can be performed. It can be done.

なお、本発明は上述した実施例構造に限定されず、装置
各部の形状、構造等を、適宜変形、変更することは自由
で、種々の変形例が考えられよう。また、本発明におけ
る試験装置において被試験対象とする半導体装置2とし
ては、第4図(a)に示すような周囲の四辺に外部リー
ド2aを有するものに限定されず、たとえば同図(b)に
示されるように、外周の二辺にのみ外部リード2aを有す
る半導体装置2であってもよいことは容易に理解されよ
う。
It should be noted that the present invention is not limited to the structure of the embodiment described above, and the shape, structure, etc. of each part of the device can be freely modified or changed, and various modified examples can be considered. Further, the semiconductor device 2 to be tested in the test apparatus of the present invention is not limited to the one having the external leads 2a on the four peripheral sides as shown in FIG. 4 (a). It will be easily understood that the semiconductor device 2 may have the external leads 2a only on two sides of the outer circumference as shown in FIG.

〔発明の効果〕〔The invention's effect〕

以上説明したように、本発明に係る半導体装置の試験装
置によれば、半導体装置を位置決め保持して昇降動作さ
れる吊下げ具の載せ台の底面部に、半導体装置の外部リ
ードまでを含めた外形寸法に略々等しい寸法を有するチ
ップを設け、このチップにより前記半導体装置の外部リ
ードと接触する接触子表面に付着する異物を、こすり取
るようにしたので、簡単な構成にもかかわらず、毎回の
測定のための吊下げ具の昇降動作の際に、接触子接触面
を載せ台底面部のチップ側面が摺接し、その表面に付着
している金属酸化物等の異物をこすり落して除去し得る
もので、異物の堆積を防ぎ、常に良好な接触子接触面を
維持し得る等の種々優れた効果がある。
As described above, according to the semiconductor device testing apparatus of the present invention, the semiconductor device is positioned and held, and the bottom surface of the platform of the hanging tool that is vertically moved includes the external leads of the semiconductor device. A chip having a dimension approximately equal to the external dimension was provided, and foreign matter adhering to the surface of the contact that comes into contact with the external lead of the semiconductor device was scraped off by this chip. When the hanging tool is moved up and down for the measurement of, the contact surface of the contact makes sliding contact with the chip side surface of the bottom surface of the mounting table, and the foreign substances such as metal oxides adhering to the surface are scraped off and removed. Thus, there are various excellent effects such as the prevention of accumulation of foreign matter and the ability to always maintain a good contact surface of the contact.

【図面の簡単な説明】[Brief description of drawings]

第1図および第2図は本発明に係る半導体装置の試験装
置の一実施例を示す要部断面図およびその平面図、第3
図(a),(b),(c)はその動作説明図、第4図
(a),(b)は本発明に適用した好適な半導体装置を
示す概略斜視図、第5図および第6図は従来例を示す要
部断面図およびその平面図、第7図はその問題点を説明
するための拡大断面図である。 1……保持具、2……半導体装置、2a……外部リード、
3……接触子、4……吊下げ具、4a……載せ台、5……
押付け具、10……チップ、A……異物(堆積物)。
1 and 2 are a sectional view and a plan view of an essential part showing an embodiment of a semiconductor device testing apparatus according to the present invention.
(A), (b) and (c) are explanatory diagrams of the operation thereof, and FIGS. 4 (a) and (b) are schematic perspective views showing a suitable semiconductor device applied to the present invention, FIG. 5 and FIG. FIG. 7 is a cross-sectional view of a main part showing a conventional example and its plan view, and FIG. 7 is an enlarged cross-sectional view for explaining the problem. 1 ... Holder, 2 ... Semiconductor device, 2a ... External lead,
3 ... Contactor, 4 ... Hanging tool, 4a ... Stand, 5 ...
Pressing tool, 10 ... Chip, A ... Foreign matter (deposit).

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】周囲に外部リードをもった半導体装置を接
触子群中に押し込むことにより、各外部リードの外側に
それぞれの接触子を押当てて電気的特性等を測定、試験
する半導体の試験装置において、前記半導体装置を位置
決め保持する載せ台を有しかつ下降時において接触子群
中に半導体装置を臨ませるように昇降動作される吊下げ
具と、前記半導体装置外形と略々同一寸法を有しこの吊
下げ具の載せ台底面部に設けられることにより接触子接
触面に堆積する前記外部リードからの金属酸化物等によ
る異物を摺接して除去するチップとを備えてなることを
特徴とする半導体装置の試験装置。
1. A semiconductor test in which a semiconductor device having external leads on its periphery is pushed into a contact group to press the respective contacts on the outside of each external lead to measure and test electrical characteristics and the like. In the device, a suspending tool that has a mounting base for positioning and holding the semiconductor device and is moved up and down so as to face the semiconductor device in the contact group when descending, and a substantially same size as the outer shape of the semiconductor device. And a chip for removing foreign matter such as metal oxides from the external leads, which is deposited on the contact surface of the contact, by slidingly contacting the bottom of the mounting table of the hanging tool. Semiconductor device testing equipment.
JP18029487A 1987-07-20 1987-07-20 Semiconductor device testing equipment Expired - Lifetime JPH0769386B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18029487A JPH0769386B2 (en) 1987-07-20 1987-07-20 Semiconductor device testing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18029487A JPH0769386B2 (en) 1987-07-20 1987-07-20 Semiconductor device testing equipment

Publications (2)

Publication Number Publication Date
JPS6423173A JPS6423173A (en) 1989-01-25
JPH0769386B2 true JPH0769386B2 (en) 1995-07-31

Family

ID=16080695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18029487A Expired - Lifetime JPH0769386B2 (en) 1987-07-20 1987-07-20 Semiconductor device testing equipment

Country Status (1)

Country Link
JP (1) JPH0769386B2 (en)

Also Published As

Publication number Publication date
JPS6423173A (en) 1989-01-25

Similar Documents

Publication Publication Date Title
US4766371A (en) Test board for semiconductor packages
JPS59972B2 (en) test equipment
JPH0769386B2 (en) Semiconductor device testing equipment
KR100665795B1 (en) Electronic component characteristic measuring device
JP2971491B2 (en) Inspection device
JP2901781B2 (en) Inspection method for semiconductor device
JP4210002B2 (en) Contact probe and contact pin polishing method
JP2751460B2 (en) Resistance measuring device
JP2936569B2 (en) Sorting device
JP2993093B2 (en) Test equipment for integrated circuit devices
JPH0240524Y2 (en)
JPS63262849A (en) Probe card
JPH0394180A (en) Measuring device for characteristic of semiconductor device
KR20040038387A (en) Probe needle cleaning device
JPH1183941A (en) Connecting apparatus, semiconductor element-inspecting apparatus and semiconductor element
JPH0452692Y2 (en)
JPH0524061Y2 (en)
JPH0621169A (en) Wafer prober, ic prober, and their probing methods
JPH0485845A (en) Inspecting method of semiconductor device
JPH0220034A (en) Semiconductor device
JP2021063676A (en) Prober device and measurement tool
JPH04170044A (en) Jig for inspecting semiconductor wafer
JPS63204623A (en) Semiconductor device
JP2000065859A (en) Semiconductor inspecting device
JPH03286543A (en) Probe for test of semiconductor integrated circuit device