JPH0766280A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a method of manufacturing a semiconductor device, wherein a thick field oxide film can be easily tapered at an optional angle and enhanced in processability of tapering angle. CONSTITUTION:A thick positive resist film 3 having a thickness of 2mum or above and high in transmission to light rays used for exposure is applied onto a field oxide film 1 deposited on a semiconductor substrate 2. The positive resist film 3 is subjected to a light exposure/development process to form a required opening 4. The substrate 2 is subjected to a thermal treatment at a temperature nearly equal to the softening point of the positive resist film 3, whereby a slope 3a tapered at a required angle is formed at the end of the opening 4. Gas high in depositing properties and another gas promoting positive resist in etching rate are optionally added to main reactive gas which is used for etching the field oxide film 1 for the formation of the mixed gas, and the field oxide film 1 is etched with the mixed gas through a reactive ion etching method, whereby the slope 3a tapered at an optional average angle of 5 to 85 deg. can be formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a thick field oxide film.

[0002]

2. Description of the Related Art In a semiconductor device such as an insulated gate type having a thick field oxide film, if the processed shape of the field oxide film is bad, the field oxide film is not formed on the gate electrode or the main wiring such as Al through which the main current flows. The wiring becomes thin at the shoulders or, in an extreme case, wiring breakage occurs, and the reliability of the electrode wiring is significantly impaired. This tendency becomes more remarkable as the electrode wiring width becomes narrower, the step difference of the field oxide film becomes larger, and the chip area becomes larger, and the yield rate of devices per wafer unit decreases. . In particular, in the case of an element that handles a large current, such as a power element, there is a great possibility that it will directly affect the deterioration of dV / dt resistance, and it is important to pay sufficient attention to the processed shape of the field oxide film. .

In order to reduce the above problems,
Of course, it is important to form a large taper on the thick field oxide film. Conventionally, as a technique for forming this taper, a field oxide film is formed with a LOCOS structure, or a CVD film containing a high concentration of phosphorus or the like is deposited, and the difference in etching rate from the underlying high temperature oxide film is used. Therefore, a method of etching with a liquid such as dilute HF or NH ₄ F has been generally used. Field taper formation by LOCOS is performed by depositing a nitride film on a thin high temperature oxide film,
This is a method in which a predetermined portion of the nitride film is removed by photo-etching, and then a thick oxide film is formed in a region where there is no nitride film by oxidation. However, when this process is used, the taper forming process becomes long and complicated, and the resulting taper shape is uniformly determined, which makes it difficult to control the taper to an arbitrary angle. Also, CVD
The method of forming a taper by wet etching using a film or the like involves instability of adhesion between the resist used during etching and the underlying CVD film, and inevitably requires a CVD film deposition process with an appropriate concentration. It has been pointed out that the process becomes complicated and the process becomes complicated.

As another method, in the case of a field oxide film which is not so thick, a method of forming an oxide film taper under the condition that the resist selectivity is poor by using reactive ion etching, or a deposition gas. There has been proposed a method of forming a taper while forming a deposit on the side wall of the opening at a low temperature of 0 ° C. or lower and a low pressure of about 10 ⁻³ Torr.

However, in the former method, since the applied resist is thin and no special consideration is given to the resist material surface, a proper taper cannot be formed in the resist. At present, taper processing of thick oxide film of 1.0 μm or more has not been realized. In addition, it is almost impossible to form a taper of 45 ° or less with good reproducibility only by this method, and there is a limit in use in terms of process. The latter method is extremely effective when the opening size is about 1 to 2 μm, but the taper angle is limited to about 70 °, and it is not possible to form a taper of 45 ° or less on a large opening. It was difficult.

[0006]

As described above, according to the conventional taper forming method for the field oxide film, 1.
There are problems that a taper cannot be formed at an arbitrary angle for a thick oxide film having a thickness of 0 μm or more, the taper forming process becomes complicated, and the like.

The present invention has been made to address such a problem, and makes it possible to easily form a taper having an arbitrary angle on a thick field oxide film having a thickness of 1.0 μm or more, for example. At the same time, it is an object of the present invention to provide a method for manufacturing a semiconductor device such as an insulated gate type in which the taper angle processing controllability is improved.

[0008]

According to the method for manufacturing a semiconductor device of the present invention, when manufacturing a semiconductor device having a thick field oxide film on a semiconductor substrate, the exposure wavelength used on the field oxide film is On the other hand, a step of applying a thick film positive resist having a high transmittance of 2 μm or more, a step of exposing and developing the positive resist to form a desired opening, and a heat softening temperature of the positive resist. A step of performing a heat treatment at a temperature near to form a taper at a desired angle at the opening end portion of the positive resist, and a gas having a deposition property or etching of the positive resist as a main reactive gas for etching the field oxide film. Of the field oxide film by reactive ion etching of the field oxide film using a mixed gas to which a gas for promoting the rate is appropriately added. Average angle is characterized by comprising the step of forming any taper in the range of 5 to 85 ° to the section.

In the method of manufacturing a semiconductor device according to the present invention, first, as shown in FIG.
A thick film positive resist 3 having high transparency to an exposure wavelength to be used is coated on the semiconductor substrate 2 having the above, and a portion other than the cell region of the main element (field oxide film region including a taper forming portion) is generally formed. The desired opening 4 is formed by exposing and developing by a commonly used photographic etching method.
The thickness of the positive resist is 2 μm or more, and even 2 μm ~ 6
It is preferably about μm. The film thickness of the positive resist
If it is less than 2 μm, the taper formation on the positive resist cannot be satisfactorily performed.

As described above, it is not particularly difficult to apply a thick positive resist on a semiconductor substrate if a highly viscous resist is used. However, when the resist is applied thickly as above, the thicker the thickness, the lower the transmittance of the exposure light, and the lower the development rate at the lower part of the resist, so that defective development such as soot pulling and liquid residue is likely to occur. Therefore, in the present invention, a thick film positive resist (A having the resist physical properties described below,
(Related to B and C parameters). next,
In the present invention, as shown in FIG. 1B, heat treatment is performed near the thermal softening temperature of the used positive resist to form a taper 3a having an appropriate angle at the opening end portion of the thick film positive resist 3. At this time, it is necessary to control the degree of thermal softening of the resist well to make the resist flow. Generally speaking, the thicker the resist film thickness, the more the resist line /
As the size of the space is larger, the resist is more likely to thermally flow and the taper 3a is more likely to be attached. From this, it is easier to control the taper of the resist as the film thickness of the resist deposited on the semiconductor substrate is increased, and a resist taper (taper angle: small) which is considerably long in the lateral direction from the resist end is obtained.
The resist film can be formed with a certain thickness.

Further, in order to more effectively form the resist taper by using the thick film positive resist, it is preferable to minimize the sensitizer which is a photosensitive material contained in the positive resist. It is presumed that when the sensitizer content decreases, the concentration of the complex (the photosensitive material in the resist and the novolak resin that is the base resin forms a complex at room temperature), and it becomes easier for the resist to flow due to heat. To be done. In order to verify this, A, B, C showing the material properties of the resist
Among the parameters, attention was paid to the A value to confirm the fluidity of the resist due to heat (A, B and C parameters have been proposed by Dill et al. (IEEE.Trans.E.D22 no.7 p69,3,1
984)). Briefly, the A value shows the property of a positive resist sensitizer. When the A value is large, the transmittance before exposure is low, the absorbance tends to be high, and the concentration of the complex is high. The results of this A value and the fluidity of the positive resist due to heat are shown in FIG. It can be seen from FIG. 2 that the smaller the A value is, the more the thermal deformation of the resist starts to occur at a lower temperature, and that the tendency becomes remarkable when the A value is 0.6 or less (at 436 nm).

Further, if the entire surface is exposed after the development, the heat flow of the resist is facilitated and the resist is more easily flattened. This is also because the sensitizer in the resist in the unexposed area is decomposed and the concentration of the complex is relatively reduced. From the above-mentioned examination results, it is preferable that the thick film positive resist used in the present invention has an A value as small as possible, and one having a value of 0.6 or less (at 436 nm) is preferable. Also A
When the value is small, the film roughness during development in the unexposed area is large, and the resist profile with rounded shoulders is relatively easy to achieve, so that it is easy to give the effect of smoothing the resist fluidity by the subsequent heat treatment. . Further, as described above, the smaller the A value is, the easier the development failure of the thick film positive resist is to be improved, so that the stability can be enhanced also in the photo-etching process.

In this way, the taper 3a can be formed at an arbitrary angle with respect to the thick film positive resist 3. The angle of the taper 3a of the thick film positive resist 3 is
Although it depends on the type and composition of the etching gas in the subsequent etching process, it is determined according to the taper angle of the target field oxide film 1.

In the method of manufacturing a semiconductor device of the present invention, after the taper 3a is formed on the thick film positive resist 3 by the above-mentioned steps, as shown in FIG.
Reactive ion etching (RIE) is performed on the field oxide film 1 having a thickness of 1.0 μm or more to form a taper 1a having a desired angle on the field oxide film 1. At this time, the main reactive gas is SF ₆ or CF with high fluorine radical / ion concentration.
₄ or the like is used as a gas having a small relative ratio of fluorine / carbon, such as C ₂ F ₆ or C ₃ F
₈ , C ₄ F _8, etc., a gas that generates hydrogen, such as H ₂ ,
A mixed gas in which CHF ₃ or the like, or a gas that promotes the etching rate of the positive resist, such as oxygen, is mixed in an appropriate ratio is used.

More specifically, in the first step of reactive ion etching, as shown in FIG. 3A, the etching rate of the thick film positive resist 3 is at least 1 / the etching rate of the oxide film 1. The oxide film 1 is etched to a certain thickness under the etching condition of 4 or less. Next, as shown in FIG. 3B, on the contrary, under the condition that the etching rate of the thick film positive resist 3 is faster than the etching rate of the oxide film 1, the oxide film 1 having a predetermined thickness is formed.
Etching until just before is etched off. This condition is easily achieved under a gas condition in which the relative ratio of fluorine / carbon is large, and it is advisable to mix an appropriate amount of oxygen in order to accelerate the etching of the resist. After that, the predetermined oxide film 1 is completely etched off under the condition of the high selection ratio that the etching rate of the semiconductor substrate 2 (Si) is about 1/10 of the etching rate of the oxide film 1. In the first step described above, the surface of the oxide film (1) which is relatively vertical to a certain depth is formed while modifying the resist surface with fluorine plasma.
b), which provides a uniform resist surface for the next second step of etching. The second step is the main processing step of the present invention, in which the thick film positive resist 3 having the taper 3a is formed.
The edge portion of 1 is etched, and the taper 1a is formed on the oxide film 1 while gradually retracting the resist 3. At this time, the formed field taper 1a is in the range of 5 to 85 ° depending on the taper 3a of the thick film positive resist 3 formed in the previous step and the etching time ratio of the first step and the second step. It can be formed at any angle. In extreme cases, the first step can be omitted.

As an example, SF ₆ is used as the main reactive gas,
Table 1 shows the difference in the etching rate between the oxide film and the resist of the mixed gas containing CHF ₃ as the deposition gas and oxygen as the gas that promotes the etching rate of the resist.

[0017]

[Table 1] As is clear from Table 1, even if the gas ratio is changed greatly,
It can be seen that the etching rate of the oxide film does not change much, but the etching rate of the resist changes significantly. Where the resist etching rate is high,
There is about 860 nm / min, so to use this condition,
It can be seen that it is necessary to make the thickness of the resist considerably thick, and the taper control of the thick film positive resist is important.

As described above, by controlling the taper of the thick film positive resist to an arbitrary angle and using the reactive gas having the selectivity, the field oxide film has an average angle in the range of 5 to 85 °. The desired taper can be formed with good controllability. The present invention is particularly effective for manufacturing individual semiconductor devices including power devices.

[0019]

EXAMPLES Examples of the present invention will be described below.

Example 1 FIG. 4 is a diagram showing a schematic structure of a vertical MOSFET manufactured in this example. The manufacturing process of the vertical MOSFET in this embodiment will be described with reference to FIG.

First, the p-type base layer 12 is selectively formed on one surface of the n-type silicon substrate 11, and n is formed on the other surface.
After forming the ⁺ type drain layer 13, the silicon substrate 11 was subjected to hydrogen combustion oxidation to form a field oxide film 14 having a thickness of about 1.6 μm. Next, after a positive resist (not shown) having a viscosity of 180 cp showing an A value of 0.6 for the exposure wavelength of g-line (436 nm) is applied to a thickness of 5 μm, it is predetermined by a g-line reduction exposure device. Was exposed and developed. Then, the silicon substrate 11 is heat-treated at 140 ° C. for 2 minutes to form a predetermined taper forming portion (opening end portion) of the thick film positive resist.
A taper of about 20 ° was formed.

Next, the above field oxidation is performed by reactive sputter etching of the oxide film using an etching gas having a gas ratio of SF ₆ / CHF ₃ = 1/15 (selection ratio of resist to oxide film: about 0.22). The film 14 was etched to a depth of about 0.5 μm (first step). Continuously, using the mixed gas of Condition 3 shown in Table 1, the field oxide film 14 was tapered to a depth of about 1.0 μm.
Etching was performed while forming a (second step). After that, as a gas condition for obtaining a high selection ratio with respect to Si, for example, SF ₆ / CHF ₃ = 1/15 gas was switched to, and the field oxide film 14 was completely etched off. As a result of observing the shape of the field oxide film 14 after processing, it was confirmed that an inclination of about 20 ° was formed as an average taper angle. After performing the above steps, the processed surface was subjected to surface treatment to form a gate oxide film 15 and a polycrystalline silicon electrode 16 to be a gate electrode. Next, the surface of the polycrystalline silicon electrode 16 is oxidized to about 200 nm (16a)
Then, using the edge of the polycrystalline silicon electrode 16 as a mask, the n ⁺ type source layer 17 was formed. Then, the source electrode 18 and the drain electrode 19 were formed to complete the device.

In the manufacturing process of such a vertical MOSFET, presence or absence of wiring thinning of the gate electrode lead-out wiring (Poly wiring) and the source electrode lead-out wiring (Al wiring) at the end portion of the field oxide film 14 of the manufactured device. As a result of observation, since the taper 14a of the field oxide film 14 is sufficiently attached, no scratches in the wiring are observed.
The lead-out wiring is well formed with a uniform width,
It was confirmed that there was no particular problem in checking the electrical element characteristics. We also checked the Poly wiring width dependency at the same time, but the wiring cracks that were previously seen with Poly wiring with a width of 10 μm were not particularly problematic up to a wiring width of about 2 μm according to the manufacturing process of this example. It was confirmed that the present invention has a great effect on fine wiring.

Example 2 In the structure equivalent to that of the vertical MOSFET shown in Example 1 above, the taper shape of the field oxide film when the taper process of the field oxide film was carried out under the following four conditions respectively. I confirmed each.

First, after forming a taper on the thick film positive resist by the same means as in Example 1, the first step of Example 1 in the reactive sputter etching is omitted,
In the second step, etching was performed using the mixed gas of condition 2 shown in Table 1 (first condition). Similarly, heat treatment after development of the resist was performed at 120 ° C. for 2 minutes to form a taper of about 60 ° on the resist, and then the first step was omitted and etching was performed with a mixed gas of condition 3 shown in Table 1. (Second condition). In addition, the second step of the first embodiment,
Etching was performed using the mixed gas of Condition 1 shown in Table 1. Further, the etching time of the first step of Example 1 was set to about 1/3 of that of Example 1, and the etching time of the mixed gas of condition 3 shown in Table 1 in the second step was made relatively long.

As a result, the first condition is 6 to 9 °, the second condition is
It was confirmed that the field taper of 45 to 50 ° under the condition of (3), 80 to 85 ° under the third condition, and 12 to 16 ° under the fourth condition could be formed uniformly.

As described above, according to the manufacturing method of the present invention, the taper shape of the thick film positive resist before the reactive ion etching and the gas condition of the reactive ion etching are arbitrarily changed to obtain the thickness of 1.0 μm or more. It was clarified that the taper of the field oxide film can be controlled arbitrarily. Further, in the conventional method, since the resist film thickness is thin, the reactive ion etching conditions cannot be used, and since the conventional resist has a large A value which is a physical property parameter, it is possible to control the resist taper with good reproducibility. And stable resist patterning is difficult to obtain,
As described above, it was not possible to uniformly form the taper of the field oxide film at an arbitrary angle.

[0028]

As described above, according to the method of manufacturing a semiconductor device of the present invention, a taper having an arbitrary angle can be formed with good reproducibility on a field oxide film having a thickness of 1.0 μm or more, for example. As a result, it is possible to stably form a highly reliable electrode wiring with a small wiring width and a small crack even if the width of the fine electrode wiring is small, in a semiconductor device having a thick field oxide film.

[Brief description of drawings]

FIG. 1 is a cross-sectional view schematically showing a manufacturing process of a semiconductor device of the present invention.

FIG. 2 is a diagram showing an A value which is a physical property parameter of a positive resist and a degree of thermal softening of the resist depending on a heat treatment temperature.

FIG. 3 is a diagram for explaining the etching step in the method for manufacturing a semiconductor device of the present invention in more detail.

FIG. 4 is a vertical type MOSFE manufactured according to an embodiment of the present invention.
It is sectional drawing which shows the structure of T typically.

[Explanation of symbols]

1, 14 ... Field oxide film 1a, 14a ... Field taper 2 ... Semiconductor substrate 3 ... Thick film positive resist 3a ... Resist taper 4 ... Opening 11 ... N-type silicon substrate 12 ... ... p-type base layer 13 ... n ⁺ -type drain layer 15 ... gate oxide film, 16 ... polycrystalline silicon electrode 17 ... n ⁺ -type source layer 18 ... source electrode 19 ... drain electrode

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location 9055-4M H01L 29/78 321 R

Claims (1)

[Claims] 1. When processing a thick oxide film in a semiconductor device, a step of applying a thick film positive resist having a film thickness of 2 μm or more and having a high transmittance for an exposure wavelength to be used on the oxide film, A step of exposing and developing the resist to form a desired opening, and a step of heat-treating at a temperature near the thermal softening temperature of the positive resist to form a taper at a desired angle at the opening end of the positive resist. And a main reactive gas that etches the oxide film, using a mixed gas in which a gas having a depositability and a gas that promotes the etching rate of the positive resist are appropriately added, and reactive ion etching the oxide film, A step of forming a taper at an arbitrary angle on an end portion of the oxide film.