JPH0756456B2 - Sensor signal digitizer - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sensor signal digitizing device for digitally converting analog signals output from various sensors such as photodiodes and Hall elements with a simple structure.

[0002]

2. Description of the Related Art Conventionally, since the outputs of the above-mentioned various sensors are minute analog signals, when connecting to a digital device such as a computer, the sensor output is amplified by an amplifier 1 as shown in FIG. After that, digital conversion is performed by the A / D converter 3 and output. The low-pass filter 2 shown in this figure is inserted as necessary.

[0003]

By the way, in order to convert analog signals output from various sensors into digital signals, the amplifier 1 and the A / D converter 3 are used as described above.
However, there is a problem that the circuit configuration becomes complicated and the price becomes high because each of them requires independent elements.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a sensor signal digitizing device which can digitally convert analog signals output from various sensors with a simple configuration.

[0005]

The sensor signal digitizing device of the present invention converts a physical quantity to be measured into a current.
And the detected current that detects the converted current as the measured current.
Stage and the measured current detected by the detection means are arbitrary.
To a plurality of bits provided by the number corresponding to
A measured current supplying means for supplying, a reference current generating means for generating a reference current having a threshold value whose value sequentially decreases from the most significant bit to the least significant bit of the plurality of bits ,
Wherein comparing the current to be measured and the reference current in the most significant bit, along with該被measurement current outputs "1" signal if the large than the reference current, contact the outermost upper bits
And a most significant bit output means for supplying a reference current to each of the lower bits, and each of the other lower bits except the most significant bit .
The value obtained by subtracting the total value of the reference currents in the bits higher than the supplied bits from the measured current and the
Comparing the reference current in Tsu DOO, respective bi reducer Ji value is
Output a "1" signal when it is larger than the reference current in the bit
And a lower bit output means for supplying a reference current in each bit , and each means is a CMOS circuit.
It is characterized in that it is configured by.

[0006]

According to the above construction, the measured current supplying means is the most
From each high-order bit to the least-significant bit, the detection means
The measured current to be detected is supplied, and in the most significant bit, the threshold reference current in the most significant bit is compared with the measured current, and when the measured current is large, a "1" signal is output . , For each of the lower bits
The threshold reference current in the most significant bit is supplied.
Be done. For lower bits other than the most significant bit, the reference current in each bit and
If the reference current at the bit is supplied, the measured
Reference current in the upper bit supplied from the current
Is compared with the value obtained by subtracting the total value of, and when the measured current is large, a "1" signal is output and
Reference current in each bit for each of the lower bits
Is supplied. With the above action, the detection means detects
The measured current is output as a digital signal.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a sensor signal digitizing device capable of outputting a 4-bit digital signal according to an embodiment of the present invention. In this case, the photodiode 5 is used as the sensor as shown.

In this figure, the photocurrent corresponding to the light intensity received by the photodiode 5 is reflected in the four current mirror circuits 6, 7, 8 and 9 consisting of PMOS transistors, and a current equal to the photocurrent from each of them. (Hereinafter referred to as measured current) is output. Then, these measured currents are compared with reference currents having different threshold values. That is, the current to be measured output from the current mirror circuit 6 is compared with the reference current from the reference circuit 10 composed of two NMOS transistors whose gates have a common potential, and the current to be measured output from the current mirror circuit 7 is The measured current output from the current mirror circuit 8 is compared with the reference current of the reference circuit 11, the measured current output from the current mirror circuit 8 is compared with the reference current of the reference circuit 12, and the measured current output from the current mirror circuit 9 is the reference current of the reference circuit 13. Compared to.

Here, in determining the threshold value, the drain current of the MOS transistor is determined by the channel width W and the channel length L.
It is used to be proportional to the ratio of. For example, in the case of 4 bits, the channel length L of the MOS transistor is set to 4 μm, the channel width W is changed to 8: 4: 2: 1, and 8I:
Design on the mask to generate 4I: 2I: I.
Thereby, it is possible to correspond to each digit of 2 to the 3rd power, 2 to the 2nd power, 2 to the 1st power and 2 to the 0th power. By adopting such a method of determining the threshold value at each digit based on the channel width W and the channel length L, even if the film thickness or the diffusion condition is changed in the manufacturing process, each threshold value is the same in the same chip. Since it changes, uniform accuracy can be obtained.

When the measured current is larger than the reference current in the comparison result of the measured currents and the reference currents described above, the inputs of the CMOS inverters (for example, 14 and 15) cascaded in two stages, respectively. The side is charged, and the output of the second-stage CMOS inverter becomes "1" (H level). In this way, the digital output of each digit is obtained from the CMOS inverter in the subsequent stage. On the other hand, the output of each first-stage CMOS inverter is supplied to a current mirror circuit (for example, 22) composed of two NMOS transistors as a reference current for a lower digit .

The operation will be specifically described below. Here, it is assumed that the reference currents of the reference circuits 10, 11, 12, and 13 are set to 8I, 4I, 2I, and I, respectively. When the output current of the photodiode 5 is 14.2I, the measured current 14.2I is output from each of the current mirror circuits 6 to 9, and the power of 2 3, 2 2, 2
To the powers of 1 and 2 to the powers of 0.

The current under test 14.2I output from the current mirror circuit 6 is compared with the reference current 8I by the reference circuit 10 in the 2 @ 3 digit stage. In this case, since the measured current 14.2I is larger than the reference current 8I, the CMOS
The input potential of the inverter 14 rises and its output is "0".
(L level). As a result, the output of the CMOS inverter 15 becomes "1". That is, the digit of the 2nd power of 3 becomes "1". On the other hand, since the output of the CMOS inverter 14 becomes "0", the drain-source of each of the CMOS transistors 22 to 24 becomes conductive (ON state), and the PMOS transistor 2 which is the current mirror circuit.
The reference current 8I is supplied from 5 to 27 to each of the powers of 2 2, 1 2 and 0 0.

In the 2 @ 2 digit stage, the measured current 14.2I output from the current mirror circuit 7 is subtracted from the reference current 8I supplied from the 2 @ 3 digit stage, and the result (14. 2I-8I = 6.2I) and the reference current 4I by the reference circuit 11 are compared. In this case, the current is 6.2I
Is larger than the reference current 4I, the input potential of the CMOS inverter 16 rises and its output becomes "0". As a result, the output of the CMOS inverter 17 becomes "1". That is, the second power of 2 becomes "1". On the other hand, C
Since the output of the MOS inverter 16 becomes "0", PM
Each of the OS transistors 28 and 29 becomes conductive between the drain and source thereof, and is a PMOS that is a current mirror circuit.
The reference current 4I is supplied from the transistors 30 and 31 to each digit stage of 2 1 and 2 0.

In the 1st power stage of 2, the measured current 14.2I output from the current mirror circuit 8 is supplied from the 2nd power stage of the reference current 8I and the 2nd power stage of 2 Subtracted from the sum with the supplied reference current 4I, this result (1
4.2I-12I = 2.2I) and the reference current 2I by the reference circuit 12 are compared. In this case, since the current 2.2I is larger than the reference current 2I, the CMOS inverter 1
The input potential of 8 rises and its output becomes "0". As a result, the output of the CMOS inverter 19 becomes "1". That is, the digit of the first power of 2 becomes "1". On the other hand, C
Since the output of the MOS inverter 18 becomes "0", PM
The drain-source of the OS transistor 32 becomes conductive, and the reference current 2I is supplied from the PMOS transistor 33, which is a current mirror circuit, to the power of 2 0.

In the digit of 2 0, the measured current 14.2 I output from the current mirror circuit 9 is supplied from the digit of 2 3 and the reference current 8 I and the digit of 2 2 It is subtracted from the sum of the reference current 4I supplied and the reference current 2I supplied from the 1st power stage of 2, and the result (14.2I
-14I = 0.2I) and the reference current I by the reference circuit 13
And are compared. In this case, the current 0.2I is the reference current I
Therefore, the input potential of the CMOS inverter 20 drops and its output becomes "1". As a result, CM
The output of the OS inverter 21 becomes "0". That is,
The digit of 0 to the power of 2 becomes "0".

In this way, the analog signal 14.2I
Is directly converted into a digital signal “1110” and output. In this case, each digital signal is the CMOS inverter 1
Since they are the outputs of 5, 17, 19, and 21, they can be directly supplied to an external digital device.

The sensor signal digitizing device can be said to be a kind of current mode neural network, which allows the sensor signal to be easily digitized without using an amplifier and an A / D converter. In addition, this sensor signal digitizer is CM
Since it can be manufactured using OS process technology,
It can be fabricated with a sensor on a silicon chip. Therefore, it is possible to reduce the size and cost of the applied system.

In the above embodiment, the case of 4 bits has been described, but the number of bits is not limited. In addition, in the above-mentioned embodiment, although it is applied to the photodiode, in addition to such a current driven sensor, a voltage drive type sensor such as a pressure sensor or an acceleration sensor having a bridge configuration of a gauge resistance is used. Can be easily applied by adding only the voltage-current converter.

[0019]

As described above, according to the sensor signal digitizing apparatus of the present invention, the physical quantity to be measured can be
Convert to current and detect the converted current as current to be measured
Detecting means and the measured electric current detected by the detecting means.
Stream, and the number of streams
Means for supplying a measured current to each of the
A reference current generating means for generating a reference current having a threshold sequential values from the most significant bit of the bit to the least significant bit is reduced, the reference current and the previous in the most significant bit
Serial compare the current to be measured, with該被measurement current outputs "1" signal if the large than the reference current, outermost upper
The reference current in the bit is supplied to each of the lower bits.
The most significant bit output means for supplying and the other least significant bits other than the most significant bit are provided corresponding to each bit.
In, the value obtained by subtracting the total value of the reference currents in the bits higher than the supplied bits from the measured current
And the reference current in each bit are compared and the
When the value is larger than the reference current in each bit , a "1" signal is output and
A lower bit output means for supplying a reference current in each bit to the bit ,
Since it is composed of MOS circuits , a kind of current mode neural network can be realized without complicating the circuit structure.
The analog signal output from the sensor can be configured using an amplifier and an A / D converter.
It can be easily converted into a digital signal.
Further, since the circuit configuration is simple, the price can be kept low. Further, since it can be easily manufactured together with the sensor on the silicon chip by using the CMOS process technology and can be directly connected to the digital device, the system to be applied can be downsized and the cost can be reduced. The effect is also obtained.

[0020]

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a sensor signal digitizing device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram for explaining the operation of the sensor signal digitizing device according to the embodiment of the present invention.

FIG. 3 is a block diagram for explaining a problem in connection between a sensor and a digital device.

[Explanation of symbols]

 5 Photodiode (sensor) 6-9 Current mirror circuit 10-13 Reference circuit 14-21 CMOS inverter 22-27 Switching circuit

Continuation of front page (56) Reference JP-A-2-269912 (JP, A) JP-A-62-216422 (JP, A) JP-A-53-29645 (JP, A)

Claims (1)

[Claims] 1. A physical quantity to be measured is converted into an electric current,
Detecting means for detecting the converted current as a measured current
And the measured current detected by the detection means,
It is provided to each of a plurality of bits provided by the number corresponding to the number of bits.
A measured current supplying means for supplying the measured current, a reference current generating means for generating a reference current having a threshold value whose value sequentially decreases from the most significant bit to the least significant bit of the plurality of bits, and the reference in the most significant bit. current and the comparison between the current to be measured, with該被measurement current outputs "1" signal if the large than the reference current, put the outermost upper bits
That the most significant bit output means for supplying a reference current to each of the lower bits, said provided corresponding to each of the other lower bits except for the most significant bit in each bit, test
The value obtained by subtracting the total value of the reference currents in the bits higher than the respective supplied bits from the measured current and the respective bits.
Comparing the reference current in the preparative, reduced-Ji value is respective bit
Outputs a "1" signal when it is larger than the reference current in preparative respect bits lower than respective bits
And a lower bit output means for supplying a reference current in each bit , and each of the means is connected to a CMOS circuit.
Sensor signal digitizing apparatus characterized by further configuration.