JPH0746128A - D/a converter incorporating test circuit - Google Patents

Abstract

PURPOSE:To provide the D/A converter incorporating a test circuit which easily performs shipping examination of an LSI by temporarily raising the output level. CONSTITUTION:A decoder 1 which outputs the output corresponding to plural inputted digital signals A3 to A11, an analog conversion circuit which outputs a voltage corresponding to the output from the decoder 1 and consists of a switch 10 and resistances R0 to R511, a PWM circuit consisting of a PWM signal generating circuit 2 for pulse width modulation of the voltage outputted from the analog conversion circuit and switches 9A and 9B, and a test circuit which supplies the voltage in the VDD level and the voltage in the GND level to the PWM circuit at the time of input of a test signal indicating the test of the D/A converter and consists of transistors Q1 and Q2 and inverters 3A and 3B are provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a D / A converter, particularly a D / A using a resistance voltage dividing method and a PWM (pulse width modulation) method.
It relates to a converter test circuit.

[0002]

2. Description of the Related Art Conventionally, in the test of a D / A converter using the resistance voltage dividing method and the PWM method of this type, the output of the D / A converter is directly measured by a voltmeter of a tester or a sine wave is measured. It was output and the distortion rate was measured by an external circuit. The conventional D / A converter itself does not include a special circuit for performing a test.

FIG. 3 shows an example of a conventional 12-bit D / A converter using the resistance voltage dividing method and the PWM method. In the figure, A0 to A2 are 3-bit digital inputs of the PWM unit, and A3 to A11 are digital inputs to the D / A unit of the resistance voltage dividing system. Reference numeral 1 is a decoder for selecting one from 512 output lines. Reference numeral 10 is an analog switch that conducts between both terminals when a high level is applied to the control terminal connected to the decoder 1.

The upper bits A3 to A11 of the D / A converted digital signal are input to the decoder 1. Decoder 1
Performs decoder output according to these input digital signals. Since the two analog switches 10 are connected to the output terminals of the decoder 1, the decoded outputs make the contacts of the two analog switches 10 conductive.

As a result, one end of one of the 512 resistors R0 to R511 is selected, and its voltage is output to the signal lines 6 and 7. The voltages output to these signal lines 6 and 7 are VA and VB, respectively. Since the signal lines 6 and 7 are respectively connected to the switches 9A and 9B controlled by the PWM signal generating circuit 2, the voltages VA and VB are pulse width modulated by the PWM signal generating circuit 2 and the analog data output terminal 5 Is output to.

FIG. 4 shows the waveform of the signal modulated by the PWM generation signal circuit 2. As for the waveforms of VA and VB output to the analog output terminal 5, the average value of the voltage waveforms becomes an analog output.

[0007]

However, in the conventional D / A converter using the resistance voltage dividing method and the PWM method described above, the voltage output to the analog output terminal is extremely small, and thus the circuit operation test is performed. There was a problem that it was very difficult. Specifically, the 12-bit D shown in FIG.
In case of A / A converter, power supply voltage VDD is set to 5V GND
Is set to 0V, the amplitude VA-VB of the output terminal 5 which is the output of the PWM signal generation circuit 2 becomes 5V ÷ 512 (2 to the 9th power) = 9.77 mV. In order to measure this, a measurement accuracy one digit higher than this value is required. A tester for LSI that accurately measures 1 mV or less is expensive, and it is very difficult to measure with a tester of a commonly used level.

As another measuring means, there is a method of outputting a sine wave to a D / A converter and measuring its distortion rate.
In this case, the measured voltage can be quite large. However, this method cannot observe all analog outputs (4096 ways in the case of 12-bit D / A), and a new problem arises that a dedicated circuit is required for distortion factor measurement.

According to the present invention, in a D / A converter using a resistance voltage dividing method and a PWM method, a test circuit built-in type D / A conversion can be carried out to facilitate shipment inspection of an LSI by temporarily increasing the output level. The purpose is to provide a container.

[0010]

In order to solve the above-mentioned problems, the present invention provides a test circuit built-in type D using the PWM method.
The / A converter includes a decoder that outputs according to a plurality of input digital signals, an analog conversion circuit that outputs a voltage according to the output from the decoder, and a pulse width of the voltage output by the analog conversion circuit. PWM for modulation
It has a circuit and a test circuit which supplies a first voltage and a second voltage to the PWM circuit when a test signal for testing the D / A converter is input.

[0011]

According to the present invention, when the test signal is input, the output from the decoder is lost, and the first voltage and the second voltage are PW instead of the voltage output from the analog conversion circuit.
It is supplied to the M signal generation circuit. The PWM signal generation circuit
The pulse width modulation of the first voltage and the second voltage is performed and the result is output to the output terminal.

[0012]

Embodiments of the D / A converter with a built-in test circuit according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 shows a test circuit built-in type D / according to the present invention.
FIG. 6 is a block diagram when applied to a 12-bit D / A converter as an example of an A converter. In the figure, terminals A0 to A2 are 3-bit digital inputs of a PWM (pulse width modulation) unit, and these signals are input to the PWM signal generation circuit 2 as control signals for pulse width modulation.

Terminals A3 to A11 are D / A of resistance division type.
It is a digital input to the unit and is connected to the decoder 1.
The decoder 1 has 512 output lines, and sets one of these 512 output lines to a high level according to the input digital signal. The 512 output lines of the decoder 1 are connected to the control terminals of the two analog switches 10, respectively.

Each switch 10 is connected to one of the terminals of the resistors R0 to R511 and also connected to the signal line 6 or 7. That is, the two switches 10 connected to the output line of the decoder 1 have resistors R0 to R511.
When a high level is applied to the control terminal of the switch, the switches are electrically connected to output predetermined voltages VA and VB to the signal lines 6 and 7, respectively. It should be noted that each switch 10 and the resistors R0 to R511 form an analog conversion circuit that outputs a voltage according to the output of the decoder 1.

The signal lines 6 and 7 are switches 9A and 9 whose switching is controlled by the PWM signal generating circuit 2, respectively.
Connected to B. The switches 9A and 9B are connected to the analog data output terminal 5, and when a high level signal is input from the PWM signal generation circuit 2, the switch 9A switches the signal line 6
Is connected to the analog data output terminal 5 and a low level signal is input, the switch 9B connects the signal line 7 to the analog data output terminal 5. In this way, the PWM signal generating circuit 2 and the switches 9A and 9B form a circuit for performing pulse width modulation of the voltages VA and VB appearing on the signal lines 6 and 7.

The signal lines 6 and 7 also include a PMOS transistor Q1, an NMOS transistor Q2 and an inverter 3.
It is connected to the test circuit 12 composed of A and 3B. The source of the transistor Q1 is connected to the power supply VDD, the drain is connected to the signal line 6, and the source of the transistor Q2 is connected to the ground GND and the drain is connected to the signal line 7. The transistor Q1 is connected to the TPWM terminal for inputting a test signal via the inverter 3A, and when a high-level test signal is input, the transistor Q1 is connected to the signal line 6 and the power supply VDD to set the potential VA to the power supply level. Similarly, the transistor Q2 is connected to the TPWM terminal, and when the test signal is input, the signal line 7 is connected to the ground GND to set the potential VB to the GND.
To level. The TPWM terminal is also connected to the enable terminal E of the decoder 1 via the inverter 3B, and when the test signal is input, the terminal E is set to the low level to stop the operation of the decoder 1 and all the outputs from this are set to the low level.

When the high-order bits A3 to A11 of the digital signal to be D / A converted are input to the decoder 1 in the normal state where the low level is input to the TPMW terminal, 51
One of the two output lines becomes high level, and the terminals of the two analog switches 10 connected to this become conductive. That is, for example, when the output line 100 is selected by the input digital signal, the switch 10a and the switch 10b connected thereto are brought into a conductive state, and the voltage across the resistor R509 is output to the signal lines 6 and 7. The voltages VA and VB across the resistor R509 are
Is applied to the switches 9A and 9B, and a signal whose pulse width is modulated by the switching control of the PWM signal generation circuit 2 is output to the analog data output terminal 5.

During the test, which is the main point of this embodiment, the TPW is used.
The M terminal is at high level. At this time, the signal line 6 is fixed at a high level by the transistor Q1, and the signal line 7 is fixed at a low level by the transistor Q2. Further, since the enable terminal E of the decoder 1 becomes low level, all the outputs thereof become low level and all the analog switches 10 are turned off. As a result, according to the output of the PWM signal generating circuit 2, the signal output to the analog data output terminal 5 goes back and forth between the VDD level and the GND level. The waveform of the analog output terminal during this test is shown in FIG.

As described above, according to this embodiment, the amplitudes of the voltages VA-VB can be increased only during the test, so that the measurement becomes easy. If the PWM signal is tested with such a large voltage, at least the circuit is operated digitally, and the defective LSI can be sufficiently inspected.

[0021]

As described in detail above, according to the D / A converter with a built-in test circuit of the present invention, a small PWM signal, which is usually difficult to measure, can be increased only during the test and easily measured. Therefore, the load on the LSI measurement equipment is reduced, and high-speed measurement is possible.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a D / A converter with a built-in test circuit of the present invention.

FIG. 2 is an output waveform diagram for explaining the operation of the present embodiment shown in FIG.

FIG. 3 is a block diagram of a D / A conversion circuit in the related art.

FIG. 4 is an output waveform diagram in the conventional technique shown in FIG.

[Explanation of symbols]

 A3 to A11 Resistance voltage divider digital data input terminal A0 to A2 PWM section digital data input terminal R0 to R511 Resistor 1 Decoder 2 PWM signal generation circuit 3A, 3B Inverter 4 Test mode input terminal 5 Analog data output terminal 9A, 9B For PWM Analog switch 10 analog switch

Claims (1)

[Claims] 1. A test circuit built-in type D using a PWM method.
In the / A converter, a decoder that inputs a plurality of digital signals and outputs according to the digital signals, an analog conversion circuit that outputs a voltage according to the output from the decoder, and an analog conversion circuit that outputs the voltage are output. A PWM circuit that performs pulse width modulation of the voltage, and a test circuit that supplies a first voltage and a second voltage to the PWM circuit when a test signal for testing the D / A converter is input. However, when the test signal is input, the first voltage and the second voltage are supplied to the PWM circuit instead of the voltage output from the analog conversion circuit, and the PWM circuit performs pulse width modulation of these voltages. A D / A converter with a built-in test circuit, which is performed.