JPH073700Y2 - Muting circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to a muting circuit suitable for application to an AM / FM receiver or the like.

[Prior Art] For example, in an AM / FM receiver or the like, noise generated during tuning is very annoying, so when tuning,
The detection output is muted.

FIG. 4 shows an example of the muting circuit 10 used in such a receiver.

In the figure, 2 is an FM audio signal detection circuit, and 3 is an FM multiplex demodulator, which separates the audio signals into left and right audio signals. When muting an audio signal, the switching transistor Q1 is normally connected to the detection output stage (demodulation output stage) and is controlled by controlling this.

In the illustrated example, a muting signal (hereinafter referred to as a first muting signal) S1 generated from a control microcomputer (not shown) provided for overall mode control of the device is passed through a diode D1. It is adapted to be supplied to the base of the switching transistor Q1.

This prevents annoying noise from being emitted during channel selection.

Here, since the first muting signal S1 is obtained from the control microcomputer, when the power is turned on, FIG.
As shown by E, the first muting signal S1 rises only when a predetermined time T1 has elapsed after the power was turned on, and from this time, it is obtained for a predetermined time T2 (about 500 msec).

This is because the control microcomputer does not start up at the same time as the power is turned on, but rather with a slight delay. This delay time T1 is usually about 120 msec.

Therefore, if only the first muting signal S1 is used, it is impossible to completely mute the abnormal noise, which is so-called pop noise generated when the power is turned on.

Therefore, conventionally, in order to effectively mute this abnormal noise as well, the second muting signal S2 formed from the power supply system is supplied to the above-mentioned switching transistor Q1 via the diode D2 as shown in the figure. I am trying to supply it.

The second muting signal S2 is formed as follows.

The terminal 12 is a power supply terminal to which the unregulated voltage a (= VIN) is applied, and the power supply terminal 12 has a capacitor C1 and a resistor R1.
The trigger detection circuit 13 composed of
Trigger signal b synchronized with power-on as shown in Figures A and B
Is formed.

The first transistor Q2 is turned on for a moment by the trigger signal b. A time constant circuit 14 composed of a capacitor C2 and a resistor R2 is connected to the collector side of the first transistor Q2. As a result, the base voltage c of the second transistor Q3 connected to the time constant circuit 14 rises as shown in FIG. 5C, and the period until the base voltage c becomes the base-emitter voltage V _BE or more. A predetermined collector output is obtained only during T3, that is, the off period of the second transistor Q3.

This collector output is supplied to the above-mentioned switching transistor Q1 as the second muting signal S2.

In this case, as shown in FIG. 5, if the muting end timing of the second muting signal S2 is delayed from the muting start timing of the first muting signal S1 by a predetermined time, During this period, the muting operation is continuously performed, whereby the pop noise at power-on can be muted.

[Problems to be Solved by the Invention] By the way, when the muting circuit 10 is configured as described above, in order to effectively suppress the pop noise at the time of turning on the power, the means for forming the second muting signal S2 is formed. Need to be provided. Moreover, since this forming means requires many circuit elements, there is a drawback that the circuit scale increases.

Furthermore, when using such forming means, a second
Since the transistor Q3 is turned on in the steady operation state, the current flowing through the transistor Q3 consumes a large amount of power. In other words, it is a configuration that runs counter to energy saving.

Therefore, the present invention proposes a muting circuit in which such conventional problems are simply solved and the number of components is greatly reduced and power is saved.

[Technical Means for Solving Problems] In order to solve the above problems, in the present invention, a first muting signal output from a control microcomputer and a power supply system are formed when power is turned on. In the muting circuit in which the audio muting means is controlled by the second muting signal, the power supply path for supplying power from the unregulated power supply to the base of the control transistor for the stabilized power supply, A time constant circuit consisting of a resistor and a capacitor connected in series, and a constant voltage element in parallel with the time constant circuit are connected as the elements for the stabilized power supply, and the voltage at the midpoint of the connection between the resistor and the capacitor is the control transistor. Is supplied to the base of the resistor to stabilize the output voltage, and the emitter and the gate of the muting control transistor are connected across the resistor. The base is connected, and the second muting signal is output from the collector of the muting control transistor.

[Operation] At the same time when the power supply to the receiver is turned on, the control transistor Qa is turned on to form the second muting signal S2.

The control transistor Qa maintains the ON state until a predetermined time Ta, which is substantially determined by the time constant of the time constant circuit 30, has elapsed. Therefore, as a result of the second muting signal S2 being supplied to the switching transistor Q1 only during this period Ta, the audio signal is muted immediately after the power is turned on until the period Ta elapses.

The period Ta is usually selected to be about 500 msec, but since the first muting signal S1 is output before this period Ta ends, the time from power-on to cancellation of muting Is almost the same time To as before.

Since the means for forming the second muting signal S2 is only the time constant circuit 30 and the control transistor Qa, the number of circuit elements of this signal forming means is greatly reduced.

Further, the control transistor Qa is automatically turned off after a lapse of a predetermined time Ta. Therefore, there is no power consumption in the steady state.

Embodiment Next, an example of a muting circuit according to the present invention will be described.
The case of application to the AM / FM receiver described above will be described in detail with reference to FIG.

In this invention, a muting circuit is constructed by skillfully utilizing a part of the stabilized power supply circuit provided in this type of receiver.

Also in this invention, the switching transistor Q1 is provided in the detection output stage. This switching transistor
1st muting signal to Q1 via diode D1
S1 is supplied.

As the first muting signal S1, the signal generated by the control microcomputer as described above is used.

Reference numeral 20 indicates a stabilized power supply circuit, and in this example, a series-type stabilized power supply circuit is illustrated. Therefore, the power line L of the input terminal 12
Has a control transistor Q4 connected in series with respect to, and an output terminal 21 is derived from the emitter side of the control transistor Q4 via a smoothing circuit 23.

On the power supply path between the power supply path L on the input terminal 12 side and the ground, a first time constant circuit 22 composed of a resistor Ro and a capacitor Co is provided.
Is connected, and a constant voltage element, which is a Zener diode Dz in this example, is connected between the connection middle point p and the ground.

Then, the second time constant circuit 30 is further connected between the connection middle point p and the ground. The second time constant circuit 30 is also configured as a series circuit of a resistor Ra and a capacitor Ca as shown in the figure, and its connection midpoint q is connected to the base of the control transistor Q4.

In the present invention, a PNP type control transistor Qa is further provided at both ends of a resistor Ra that constitutes the second time constant circuit 30.
The connection midpoint p side is connected in parallel so that it serves as an emitter, and its collector output is supplied to the above-mentioned switching transistor Q1 via the second diode D2.

The time constant of the second time constant circuit 30 is selected to be about 500 to 600 msec. Therefore, a capacitor of several hundred μ is used as the capacitor Ca. Since the capacitor having such a value is connected to the base of the control transistor Q4 in order to bypass the low frequency signal in this type of stabilized power supply circuit, the bypass capacitor can be used.

In addition, the voltage drop Vr due to the resistor Ra is
In the normal operation with Qa turned off, when the base-emitter voltage of the control transistor Qa is V _BE , the value is selected such that Vr ≦ V _BE . In this example, the resistance value is selected so that Vr is about 0.1 volt.

Here, the capacitor Co functions as a bypass for the high-frequency signal component for preventing the Zener noise generated from the Zener diode Dz from jumping into another circuit system.

Now, in the muting circuit 10 configured in this way, the relationship between the power supply voltage and the first muting signal S1 is exactly the same as the conventional one, and after a predetermined time elapses after the power is turned on, over a certain period T2. Muting is executed. The relationships between them are as shown in FIGS.

Further, a stable output voltage Vo is obtained at the output terminal 21 only after a lapse of a predetermined time after the power is turned on.

On the other hand, when the power is turned on, the potential at the connection middle point q, that is, the base voltage VB is zero. Therefore, the control transistor Qa turns on. After that, the potential gradually increases with the time constant of the second time constant circuit 30 (FIG. 2D), and turns off when the base voltage VB exceeds the base-emitter voltage V _BE of the control transistor Qa. Invert to state. After that, this off state is maintained.

As a result, as shown in FIG. 2E, the second muting signal S2, which is the collector output of the control transistor Qa, is obtained at the same time when the power is turned on, and becomes high level for the period Ta until the control transistor Qa is turned off. , Muting is executed only during this time.

FIG. 3 shows another example of this invention.

The illustrated power supply circuit is applied to a power supply circuit system that obtains different stabilized output voltages Vo1 and Vo2.

Therefore, control transistors Q4,
Q5 is connected in series, and a common constant voltage element Dz is connected to the base of one control transistor Q5. The voltage drop means 40 is connected between the constant voltage element Dz and the resistor R1, and the voltage drop amount by the voltage drop means 40 and the constant voltage element Dz is given to the base of one control transistor Q4 as a reference voltage. .

Then, in this example, the second time constant circuit 30 and the control transistor Qa are connected on the power supply path from the unstabilized power supply on the control transistor Q4 side.

The voltage drop means 40 is composed of a plurality of diodes connected in series, and a pair of diodes D3 and D4 is used in this example, but the number of the used diodes differs depending on what value of the output voltage is obtained.

Further, 26 is a smoothing circuit, C3 is a low frequency bypass capacitor, and C4 is a high frequency bypass capacitor.

Even in the case of such a configuration, the muting operation is similar to that described above, and therefore its explanation is omitted.

In this configuration, since the voltage drop means 40 is provided, the reference voltage supplied to the base of the control transistor Q4 is 2VF higher than the reference voltage supplied to the base of the control transistor Q5.
A high voltage is applied. Here, VF is a forward voltage drop of the diode, and when a silicon diode is used, the voltage drop is about 0.65 volt.

As a result, the stabilized output voltage Vo1 obtained at the output terminal 21 becomes a stabilized voltage that is 2VF higher than the stabilized output voltage Vo2 obtained at the output terminal 24.

In other words, Vo1 = Vo2 + 2VF.

The stabilized output voltage Vo2 can be used as the power supply voltage of the control microcomputer. On the other hand, the stabilized output voltage Vo1 can be used as the circuit power supply of the receiver.

In the above-described embodiment, the invention is applied to the receiving system of the AM / FM tuner, but the muting circuit according to the invention can also be applied to the tuner of the television system.

[Effect of the Invention] As described above, in the present invention, the muting circuit 10 is configured by using a part of the stabilized power supply circuit, so that the number of parts of the muting circuit 10 itself is significantly reduced. be able to. This can reduce costs.

Further, since the control transistor Qa provided in the muting circuit 10 is turned on only from the time when the power is turned on until the muting by the second muting signal S2 is released, there is no power consumption during steady operation. . In addition to this, since the power consumption by the resistor Ra is also reduced, the power consumption of the muting circuit 10 itself can be reduced.

[Brief description of drawings]

FIG. 1 is a connection diagram of essential parts showing an example of applying a muting circuit according to the present invention to an AM / FM receiver, and FIG. 2 is a waveform diagram used to explain the muting operation.
FIG. 4 is a connection diagram of a main part showing another example of the muting circuit according to the present invention, FIG. 4 is a connection diagram of a conventional muting circuit, and FIG. 5 is a waveform diagram for explaining the operation thereof. 2 …… Detection circuit 20 …… Stabilized power supply circuit 30 …… Time constant circuit Qa …… Control transistor Q1 …… Switching transistor L …… Power supply path S1, S2 …… Muting signal

Claims (1)

[Scope of utility model registration request] 1. A muting circuit in which an audio muting means is controlled by a first muting signal output from a control microcomputer and a second muting signal generated by a power supply system when the power is turned on. , A time constant circuit consisting of a resistor and a capacitor connected in series on the power supply path for supplying power from the unregulated power supply to the base of the control transistor for the stabilized power supply, and the time constant circuit in parallel with the above time constant circuit. A constant voltage element is connected as a stabilizing power source element, respectively, and the voltage at the midpoint of the connection between the resistor and the capacitor is supplied to the base of the control transistor to stabilize the output voltage, and The emitter and the base of the muting control transistor are connected to both ends of the container, and the muting control transistor is Muting circuit, characterized in that said second muting signal from the collector is to be outputted.