JPH065803B2 - FM detection circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to an FM detection circuit suitable for use in an audio circuit of a television receiver, a radio receiver, and the like.

[Background technology]

"Introductory Color Television" (July 20, 1982, 6th edition, 1st edition, publisher Tokyo Denki University Press, P189-P1)
91) discloses FM detectors having various circuit configurations.

Prior to the present invention, the present inventors conducted various technical studies on the FM detector, and particularly examined the cause of the pop sound when the power was turned on and off when the FM detector was used in a television receiver. As a result, the FM detector receives DC feedback as well as AC signals. Therefore, when there is a time difference between the response speed of the DC feedback loop and the response speed of the power supply voltage, the pop sound may occur. found.

Then, various means for reducing the pop sound have been studied. However, it becomes clear that the method of providing the mute circuit after the pop sound, in other words, in the subsequent stage of the FM detector, is costly. The present inventors have clarified that it is technically superior to prevent the sound generation itself.

[Object of the Invention]

An object of the present invention is to increase the power supply voltage to a predetermined voltage level, or when the power supply voltage decreases to a predetermined voltage level,
It is an object of the present invention to provide an FM detection circuit that can force the FM detector to be shut off based on this level variation and reduce the generation of pop noise at power-on and power-off.

The above and other objects and novel features of the present invention will be apparent from the present invention and the accompanying drawings.

[Outline of Invention]

The outline of the invention disclosed in the present application is as follows.

That is, in the steady state of the power supply voltage, the reference voltages V _Z1 and V _Z2 having different voltage levels are obtained to be in the non-operating state, and when the power supply voltage changes, the operating state is caused by the level difference between the reference voltages V _Z1 and V _Z2. A switch means (transistor Q ₆ ) is provided, and the switch means cuts off the bias voltage of the detector when the power supply voltage changes (for example, when the power supply drops) to prevent the pop sound from being generated from the detector. The object of the present invention is achieved.

〔Example〕

Next, a specific embodiment of the FM detection circuit to which the present invention is applied will be described with reference to FIG. It should be noted that FIG. 1 shows a circuit configuration after the intermediate frequency amplifier circuit in the FM receiver, and can be applied to either the audio circuit of the television receiver or the FM radio receiver. The FM detection circuit is composed of a semiconductor integrated circuit (hereinafter referred to as an IC) together with other audio amplification circuits and the like, and circles enclosing numbers are external connection terminals.

The feature of the present embodiment is that the bias control circuit 1 forming the FM detection circuit detects the voltage level of the + V _CC power supply,
The M detector 2 is not activated or deactivated, and the pop sound in the FM detector 2 is reduced.

That is, in the bias control circuit 1, the bias voltage is supplied to the transistors Q ₃ and Q ₄ by the Zener diodes ZD ₁ and ZD ₂ , but in the steady state of + V _CC power supply of 12V, the voltage levels V _Z1 and V _Z2 are The voltages are almost the same, and the transistor Q ₅ is off. On the other hand, the transistor Q ₁ supplies a bias voltage to the transistors Q ₁₁ and Q ₁₂ forming the FM detector via the resistors R ₁₁ and R ₁₂ , and the transistor Q ₂ supplies power to the switching transistor Q ₆ via the resistor R _13. And a resistor R ₁₄ ,
A bias voltage is supplied to the transistors Q ₁₃ and Q ₁₄ via R ₁₅ .

In the FM detector 2, the resistors R ₁₆ , R ₁₇ , and R ₁₈ operate as load resistors, and the transistors Q ₁₅ , Q ₁₆ , Q ₁₇ , and Q _{18 are used.}
Is to obtain the FM detection output V ₀₁ and perform DC feedback. In addition, the coils L ₁ and L ₂ , the capacitors C ₁ and C ₂ connected between the 4th and 5th terminals operate as a phase shift circuit 3, and the resistors R ₂₁ , R ₂₂ and the capacitors C ₃ and C ₄ are It operates as a smoothing circuit and obtains a DC voltage from the detection output V ₀₁ and feeds back DC to the transistor Q ₁₁ . Further, the intermediate frequency output V _I is supplied to the third terminal, and is supplied to the base of the transistor Q ₁₃ via the limiter circuits A ₁ , A ₂ , A ₃ and the coupling capacitor C _C.

The bias control circuit 1 and the FM detector 2 as the FM detector circuit perform the following notable circuit operations when the power is cut off.

When the + V _CC power supply drops from a steady state of 12 V, for example,
The voltages V _Z1 and V _Z2 change at the same level up to a predetermined + V, but when the + V _CC power supply drops to a predetermined voltage Z
D ₂ turns off earlier than ZD ₁ and V _Z2 <V _Z1 . Therefore, V _BE Q ₃ > V _BE Q ₄ , and as a result, between the base and emitter of the transistor Q ₃ and the transistor Q ₅
A base current is supplied to the switching transistor Q _S via the switch transistor Q _S , and this operates in the ON state. Therefore, the bases of the transistors Q ₁₃ and Q ₁₄ are as if the resistances R ₁₄ and R _{14 respectively} .
It becomes grounded via ₁₅ and the supply of bias voltage is cut off. Then, the current paths of the transistors Q ₁₁ and Q ₁₂ are cut off, and the transistors Q ₁₅ and Q ₁₆ are cut off.
Is turned off, and the entire FM detector 2 is deactivated.
The output voltage of the FM detector is output as a DC voltage by the Emitch voltage of the transistor Q ₁ passing through the inductance L ₁ , the resistors R ₂₁ , R ₂₂ and the transistor Q ₂₀ .

As a result of the above circuit operation, generation of an offset voltage due to DC feedback in the FM detector 2 and generation of a pop sound based on the offset voltage are prevented in advance. Further, it has been found that the following effects can be obtained with the above circuit configuration.

That is, even in the limiter circuits A _{1 to} A ₃ , pop sound may be generated depending on the setting of the bias voltage.
However, since the signal transmission path is cut off in the subsequent stage, the pop sound generated from the limiter circuits A _{1 to} A ₃ is not transmitted to the amplification circuit or the like described later, and together with the prevention of pop sound generation of the FM detector 2, It is possible to doubly prevent pop noise when the power is cut off.

Next, the operation of amplifying the detection output V _O in the steady state and the operation of preventing pop noise when the power is turned on will be described.

First, to describe the amplification operation in the steady state, the detection output V ₀₂ is obtained as the voltage drop of the resistor R ₃₀ from the emitter of the output transistor Q ₂₀ that is configured as an emitter follower, and the electronic volume is obtained via the coupling capacitor C _A. It is supplied to the circuit 4. The electronic volume circuit 4 includes an amplifying section composed of transistors Q ₃₁ , Q ₃₂ , Q ₃₃ , Q ₃₄ , Q ₃₅ , and Q ₃₆ , transistors Q ₃₇ and Q ₃₈ , and a variable resistor provided as an external component. It can be roughly classified into VR ₁ , a bias control unit constituted by a switch SW for preventing pop sound generation at the time of power supply, a diode D _{10, and the} like.

The detection output V ₀₂ is superimposed on the reference voltage V _REF1 is supplied to the bases of the transistors Q _31, Q _32, the transistors Q _31, Q ₃₂ is connected to the differential pair, the dynamic range resistance Adjusted with R ₃₃ and R ₃₄ CS ₂ . When the variable resistor VR ₁ is set on the GND side and the voltage level V _A and the reference voltage V _REF2 have a relation of V _A <V _REF2 , the current-voltage conversion resistors R ₃₆ and R ₃₉ are used to form a transistor. bias voltage of the Q _34, Q ₃₅ goes high, the bias voltage of the transistors Q _33, Q ₃₆ goes low.

In this case, the current flowing through one of the load resistors R ₃₅ and R ₃₆ via the resistor R ₃₇ increases, so that a high bias voltage is supplied to the transistors Q ₄₀ and Q ₄₁ forming the amplifier circuit 5. The voltage level of the high bias voltage is an AC signal corresponding to the level change of the output voltage V _O , is current-voltage converted by the load resistor R ₄₁ , and is the coupling capacitor C.
It is supplied to the power amplifier A ₁₁ via _B. C _O is an output capacitor and 11 speakers.

On the other hand, the variable resistor VR ₁ is set to the + V _CC side, and V _REF2
When the relation of < _VA is satisfied, the bias voltage of the transistors Q ₃₄ and Q ₃₅ is lowered by the above circuit operation, and the current flowing through the load resistors R ₃₅ and R ₃₆ is reduced. Then, the bias signal voltages of the transistors Q ₄₀ and Q ₄₁ also become low level, the voltage drop of the load resistor R ₄₁ decreases, and the volume decreases.

In the steady state, the voltage V _A is supplied to the transistor Q ₄₁ forming the control circuit 6, but is held at V _A <V _REF3 by the resistor R _A. Even if the output current of the current mirror circuit composed of the transistors Q ₄₃ and Q ₄₄ appears on the line l ₁ , the transistor Q ₆ does not operate in the steady state and the FM detector 2 operates normally. I do.

By the way, it should be noted that a signal having a predetermined pulse width is supplied to the switch SW when the power is turned on, and the switch SW is temporarily turned on. In this case, the voltage V _A is due to the voltage supplied through the diode D ₁₀ .
It rises to almost + V _CC , and V _A > V _REF3 . Therefore, the output current flowing from the transistor Q ₄₄ to the line l ₁ increases, and the transistor Q ₆ is turned on for the predetermined pulse width. Therefore, the FM detector 2 is in a non-operating state, and the pop sound is prevented from being generated when the power is turned on.

〔effect〕

(1) Since the FM detector is forcibly switched to the non-operational state by detecting the drop in the power supply voltage level when the power is cut off, pop noise is generated before the bias voltage changes in the FM detector. Can be prevented.

(2) When the power is turned on, the FM detector is temporarily forcibly switched to the non-operating state. Therefore, even when the power is turned on, no pop sound is generated from the FM detector.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments and various modifications can be made without departing from the scope of the invention. Nor.

For example, the voltage difference between the voltages V _Z1 and V _Z2 in the bias control circuit 1 is not limited to the forward voltage of one diode.

[Field of application]

In the above description, the invention made by the present inventor has been mainly described with respect to the FM detection circuit which is a field of use which is the background of the invention, but the invention is not limited thereto.

For example, the present invention is not limited to television receivers and the like, and can be used for automobile radios, various communication devices, and the like.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of an FM detection circuit to which the present invention is applied. 1 ... bias control circuit, 2 ... FM detector, 3 ... phase shifting circuit, 4 ... electronic volume circuit, 5 ... amplifying circuit, 6 ... control circuit, Q _S ... switch transistor, Q ₁ to Q ₄₄ ... transistor, D ₁ to D ₁₀ ... diodes, ZD _1, ZD ₂ ... Zener diode, V _O ... output voltage, VR ₁ ... variable resistor,
SW ... Switch, V _A , V _Z1 , V _Z2 ... Voltage.

Front page continuation (72) Inventor Junichi Mita 111 111 Nishiyokote-cho, Takasaki-shi, Gunma Hitachi Ltd. Takasaki factory

Claims (1)

[Claims] 1. A first transistor (Q ₁₃ ) whose base is supplied with an intermediate frequency signal via a capacitor, and a second transistor (Q ₁₄ ) whose emitter is commonly connected to said first transistor. A load element (R ₁₈ ) provided between the collector of the second transistor and the power supply terminal, and a current source provided between the common emitter of the first and second transistors and the reference potential point of the circuit. (CS
₁ ), a third transistor (Q ₁₁ ) whose base is connected to the collector output of the second transistor via a phase shift circuit and whose emitter is connected to the collector of the first transistor, and whose emitter is the above formed by commonly connected to the emitters of the third transistor, a fourth transistor (Q _12), said third load element provided between the collector and the supply terminal of the fourth transistor (R _16,
And R _17), the third, output means for forming an output signal by receiving the collector output of the fourth transistor (Q _15, Q _16, Q
FM detector (2) consisting of ₁₇ , Q ₁₈ , Q ₁₉ , Q ₂₀ )
Forming a first bias voltage, supplying the first bias voltage to the bases of the first and second transistors through the first resistance element (R ₁₃ ) and the second resistance element (R ₁₄ ), and Two
Forming a bias voltage, applying a second bias voltage to the third,
Bias control circuit (1) for supplying to the bases of the third and fourth transistors via the fourth resistance element (R ₁₁ , R ₁₂ ).
When, shall apply in FM detection circuit comprising comprise, the bias control circuit includes first with each other equal Zener voltage one end connected to the reference potential point, a second Zener diode (ZD _1, ZD ₂₎ A fifth resistance element (R ₁ ) and a first diode (D ₁ , D ₂ ) connected in series between the power supply terminal and the other terminal of the first Zener diode, the power supply terminal and the second A sixth resistance element (R ₄ ) connected in series with the other terminal of the Zener diode and a second diode (D ₃ , or D ₅ ) having a larger number of series than the first diode, and the first to A fifth transistor which has a conductivity type different from that of the fourth transistor and which receives the voltage from the first Zener diode in its emitter and receives the voltage from the second Zener diode in its base; Its emitter is a sixth transistor having its base connected to the reference potential point is connected to the collector of the fifth transistor (Q _6),
An FM detection circuit, wherein the first bias voltage supplied to the first and second resistance elements is forced to the potential at the reference potential point by turning on the sixth transistor.