JPS6119529Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a detection and AGC circuit for radio receivers, etc., and particularly to a detection and AGC circuit suitable for fabrication into a monolithic IC (integrated circuit).

A detection circuit in a radio receiver or the like is generally arranged after an intermediate frequency amplification circuit, and the two circuits are coupled by a transformer or a capacitor. Of these, capacitor-based couplings have good low-frequency characteristics and can be constructed at low cost, so they are often used in transistor-type radio receivers and the like.

Figure 1 is a block diagram showing an example of a conventional circuit configuration using a coupling capacitor as described above. In the figure, 1 is an intermediate frequency amplification circuit, 2 is a detection circuit, and C is a circuit for coupling these two circuits. 3 is the AGC circuit. FIG. 2 further shows the block diagram of FIG. 1 with a circuit diagram, and reference numeral D in FIG. 2 is a detection diode constituting the detection circuit 2. In FIG. However, as electric circuits in radio receivers and the like are increasingly integrated into ICs, coupling capacitors with relatively large capacitances cannot be formed within monolithic IC chips. They took the so-called external installation method.

However, as mentioned above, the configuration with an external capacitor reduces the advantages of using an IC, and the number of manufacturing steps and parts increases, which makes it difficult to avoid the disadvantage in terms of cost. Also, when using a coupling capacitor and a diode as the detection element, the direct current is cut off, which narrows the dynamic range of the AGC voltage.

This invention was made based on the above circumstances,
The detection circuit is equipped with a detection transistor to perform negative detection operation, and the comparison circuit is equipped with a switching transistor that performs switching operation based on the voltage difference between the intermediate frequency output level and the detection output level.
By extracting an AGC current of a magnitude corresponding to the intermediate frequency output level from this switching transistor, it is not necessary to provide a coupling capacitor between the intermediate frequency amplifier circuit and the detection circuit, making it suitable for monolithic IC implementation. The purpose of the present invention is to provide a detection and AGC circuit that can fully demonstrate the effect of AGC by widening the dynamic range of current used, and further reduce the number of manufacturing steps and required parts.

The present invention will be explained in detail below based on the embodiments shown in the drawings.

In Figure 3, the symbol IF/AMP is an intermediate frequency amplifier circuit, and DET is a detection circuit.The output terminal of the intermediate frequency amplifier circuit IF/AMP is directly connected to the input terminal of the detection circuit DET without going through a coupling capacitor, etc. It is connected.

Further, the symbol COM is a comparison circuit equipped with a switching transistor as described later, and this circuit compares the intermediate frequency output level from the intermediate frequency amplifier circuit IF/AMP with the detection output level, and determines the intermediate frequency output level. is larger than the detection level by a predetermined level or more, the switching transistor turns on and supplies the AGC circuit with an AGC current corresponding to the carrier level of the received signal.

Next, the embodiment shown in FIG. 3 will be explained in more detail using the circuit diagram in FIG. 4.

In Fig. 4, the symbol Q ₁ is an intermediate frequency amplification circuit.
The final stage transistor in the IF/AMP, Q ₂ is a detection transistor in the detection circuit DET, and Q ₃ is a switching transistor in the comparison circuit COM, and the output terminal A of the final stage transistor Q ₁ is connected to the detection transistor Q ₂ . Connected to base control terminal. Also, the above output terminal A
is connected to the emitter terminal of switching transistor _Q3 , and this switching transistor
The collector terminal of Q ₃ is connected to the AGC circuit. Further, the base control terminal of the switching transistor _Q3 is connected to the emitter output terminal B of the detection transistor _Q2 via a suitable resistor _R3 .

Symbol C ₁ is the capacitor in the detection circuit DET,
C ₂ is a coupling capacitor with the next stage low frequency amplifier circuit (not shown), and R ₁ and R ₂ are each low resistance elements.

The detection and AGC circuit according to the embodiment of the present invention is constructed as described above and operates as follows.

That is, as shown in FIG. 5A, the intermediate frequency amplification circuit
The intermediate frequency output 5 containing the low frequency signal component amplified by the IF/AMP is guided to the detection transistor Q ₂ , detected and rectified by the detection transistor Q ₂ , and is sent to the detection output terminal B as shown in Fig. 5A. A low frequency signal component (detection output) AF as shown is obtained. In other words, the detection transistor _Q2 uses the diode characteristics between its base and emitter, the resistor _R2 , and the time constant of the capacitor _C1 to generate an intermediate frequency output of 5.
Negative detection operation is performed to detect and rectify the negative side component of . At this time, the detection transistor _Q2 acts not only as a detection function but also as a level shift element for setting the potential on the output terminal B side to a desired potential, as will be described later.

The low frequency signal component AF obtained as described above is guided to a speaker or the like (not shown) through a low frequency amplification circuit to operate the speaker.

On the other hand, during the above operation, the received broadcast wave input increases for some reason, and the level of the intermediate frequency output 5 rises in proportion to this, causing the comparator circuit to
The time period in which the emitter terminal potential with respect to the base terminal side potential of the switching transistor Q ₃ in COM exceeds its cut-in voltage and the switching transistor Q ₃ turns ON increases, and the AGC according to the intermediate frequency output 5 increases. The current for
Supplied to the AGC circuit. As a result, the AGC circuit automatically and appropriately controls the amplification degree of the intermediate frequency amplification circuit, etc. in the preceding stage, so that the volume level from the speakers, etc. is kept constant, and deterioration of the S/M is prevented.

Next, the above switching transistor _Q3
The process of turning on and generating the AGC voltage will be further explained with reference to FIGS. 5B and 5C. If the voltage of the intermediate frequency output 5 from the transistor element _Q1 is zero, then B
The potential at the terminal point becomes higher by Vbe of the detection transistor _Q2 . Therefore, there is a reverse bias between the base and emitter of the switching transistor _Q3 , and there is a cut-off between the collector and emitter of the switching transistor _Q3 . In order for the switching transistor _Q3 to be in the ON state,
The potential at the A terminal point must be higher than the potential at the B terminal point by an amount equivalent to Vbe of the switching transistor _Q3 . Figure 5B shows the state in which the switching transistor _Q3 is turned on.
The detection output AF shows the level change at the B terminal point, and the intermediate frequency output 5 shows the level change at the A terminal point. The voltage indicated by a in the figure is the sum of Vbe of the switching transistor Q ₃ and the voltage drop of the resistor R ₃ , and the voltage at the A terminal is increased by the voltage a relative to the level of the detection output AF at the B terminal. When the potential increases, switching transistor _Q3 turns on. In other words, the switching transistor _Q3 turns ON in the shaded region of the level change of the intermediate frequency output 5. The level of the detection output AF at the B terminal point increases in the negative direction (potential decreases) as the voltage of the intermediate frequency output 5 increases, and the amplitude of the shaded area increases as the intermediate frequency output 5 increases. As the voltage increases, the time period during which the switching transistor _Q3 turns ON increases. FIG. 5C shows the collector current of the switching transistor _Q3 when it turns on, and this current generates the AGC voltage. Note that the voltage indicated by the symbol b in FIG. 5B corresponds to Vbe of the detection transistor _Q2 . Further, the dotted line potential indicated by reference numeral 7 in FIGS. 5A and 5B indicates the DC operating potential at the terminal point A in FIG. 4.

As mentioned above, the AGC current is adjusted to the level of the intermediate frequency output 5 and the detection output by the action of the comparator circuit COM.
It is generated by comparing the AF level and using the difference voltage, and does not directly use the detected low frequency output voltage as in the conventional example shown in Figure 2, so the difference between the intermediate frequency amplification circuit and the detection circuit is There is no need to place a coupling capacitor between them to cut off the DC component and then detect it with a diode element.

When converting the detection and AGC circuit according to the present invention into a monolithic IC, for example, the intermediate frequency amplifier circuit IF/AMP, the detection circuit DET, the comparison circuit COM, the AGC circuit, etc. are accommodated in one chip. However, in this case, the capacitor _C1 in the detection circuit may be externally connected between the output terminal B of the detection circuit DET and the ground. Even if this capacitor _C1 is connected externally, there is no need to provide a connection terminal within the IC chip.

As detailed above, according to the present invention, a transistor element is used as a detection element, and the output terminal of the intermediate frequency amplifier circuit is directly connected to the base control terminal of the detection transistor without using a coupling capacitor or the like. The output terminal of the intermediate frequency amplifier circuit is connected via a switching transistor.
In addition to connecting to the AGC circuit, the base control terminal of this switching transistor is connected to the output terminal of the detection transistor, and the switching transistor is activated when the intermediate frequency output level is higher than a predetermined level compared to the detection output level.
Since the AGC circuit is turned on and an AGC current of a magnitude corresponding to the intermediate frequency output level is supplied to the AGC circuit, it is possible to provide a detection and AGC circuit suitable for monolithic IC, and radio reception. It has the extremely excellent effect of fully utilizing the advantages of IC integration in machines, etc. Furthermore, since no coupling capacitor is used, the DC component is not cut off, and the dynamic range of the AGC voltage is widened, making it possible to fully utilize the AGC effect. Furthermore, when the detection and AGC circuits are integrated into a monolithic IC, there is no need to provide connection terminals for external capacitors within the IC chip, which reduces the number of manufacturing steps and parts, resulting in an economical This type of device also exhibits extremely excellent effects in that it can be done at low cost.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a conventional example, Fig. 2 is an electric circuit diagram of the same as above, Fig. 3 is a block diagram of a detection and AGC circuit according to an embodiment of the present invention, Fig. 4 is an electric circuit diagram of same as above, FIG. 5A is a waveform diagram of intermediate period output and detection output in the same circuit as above, FIG. 5B is a waveform diagram for explaining the process of turning on the switching transistor in the circuit of FIG. 4,
FIG. 5C is a current waveform diagram showing the collector current of the switching transistor. A: Output terminal of intermediate frequency amplifier circuit, AF: Detection output, AGC: AGC circuit, B: Output terminal of detection circuit, C ₂ : Coupling capacitor, C ₁ : Capacitor in detection circuit, COM: Comparison circuit, DET: Detection Circuit, IF/AMP: intermediate frequency amplifier circuit, Q ₁ : transistor element, Q ₂ : detection transistor, Q ₃ : switching transistor, R ₁ , R ₂ , R ₃ : resistor, 5: output of intermediate frequency amplifier circuit Waveform.

Claims (1)

[Scope of utility model registration request] The output terminal of the intermediate frequency amplification circuit is connected to the base control terminal of the detection transistor in the detection circuit, and the output terminal of the intermediate frequency amplification circuit is connected to the emitter terminal of the switching transistor, and the collector terminal of the switching transistor is connected. is connected to the AGC circuit, and the base control terminal of the switching transistor is connected to the emitter output terminal of the detection transistor via a resistor, so that the intermediate frequency output level from the intermediate frequency amplification circuit is equal to the detection level of the detection circuit. The switching transistor is turned on in a range equal to or higher than a predetermined level compared to the output level, and the AGC circuit is supplied with an AGC current having a magnitude corresponding to the intermediate frequency output level. detection and AGC circuit.