JPH0640604B2 - Frequency conversion circuit - Google Patents

Frequency conversion circuit

Info

Publication number
JPH0640604B2
JPH0640604B2 JP60107465A JP10746585A JPH0640604B2 JP H0640604 B2 JPH0640604 B2 JP H0640604B2 JP 60107465 A JP60107465 A JP 60107465A JP 10746585 A JP10746585 A JP 10746585A JP H0640604 B2 JPH0640604 B2 JP H0640604B2
Authority
JP
Japan
Prior art keywords
transistors
transistor
conversion circuit
intermediate frequency
frequency conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60107465A
Other languages
Japanese (ja)
Other versions
JPS61264904A (en
Inventor
常男 大久保
清彦 竹内
彰一 逸見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60107465A priority Critical patent/JPH0640604B2/en
Publication of JPS61264904A publication Critical patent/JPS61264904A/en
Publication of JPH0640604B2 publication Critical patent/JPH0640604B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • H03D7/1433Balanced arrangements with transistors using bipolar transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • H03D7/1458Double balanced arrangements, i.e. where both input signals are differential

Description

【発明の詳細な説明】 産業上の利用分野 本発明はラジオ受信機などに用いる周波数変換回路に関
するものである。
TECHNICAL FIELD The present invention relates to a frequency conversion circuit used in a radio receiver or the like.

従来の技術 近年、周波数変換回路を含むラジオ受信回路がIC化さ
れているが、従来の周波数変換回路の一例について図面
を参照しながら説明する。
2. Description of the Related Art In recent years, a radio receiving circuit including a frequency conversion circuit has been integrated into an IC. An example of a conventional frequency conversion circuit will be described with reference to the drawings.

第5図は従来の受信回路の周波数変換回路の電気的結線
図を示すものである。第5図において、1はIC化した
周波数変換回路、2は中間周波信号増幅器、3は検波回
路、6はアンテナコイル、5,52はバリコン、56は
中間周波トランス、55は中間周波フィルタ、53は局
部発振用コイル、9,10,11,12,13,14,
24,25はトランジスタ、4,7,54,51はコン
デンサ、8,19,20,90は抵抗、21,22,2
3は電流源である。
FIG. 5 shows an electrical connection diagram of a frequency conversion circuit of a conventional receiving circuit. In FIG. 5, 1 is a frequency conversion circuit integrated into an IC, 2 is an intermediate frequency signal amplifier, 3 is a detection circuit, 6 is an antenna coil, 5 and 52 are variable capacitors, 56 is an intermediate frequency transformer, 55 is an intermediate frequency filter, and 53. Is a local oscillation coil, 9, 10, 11, 12, 13, 14,
24, 25 are transistors, 4, 7, 54, 51 are capacitors, 8, 19, 20, 90 are resistors 21, 22, 2
3 is a current source.

以上のように構成された周波数変換回路について、以下
その動作について説明する。
The operation of the frequency conversion circuit configured as described above will be described below.

アンテナ6,コンデンサ4,バリコン5で同調した入力
信号は互いにエミッタ結合したトランジスタ9,10の
一方のトランジスタ9のベースに加え、トランジスタ
9,10のコレクタよりトランジスタ11,12のエミ
ッタとトランジスタ13,14のエミッタに加えるとと
もにトランジスタ24,25とコイル53,コンデンサ
51,バリコン52の同調回路とで構成される局部発振
回路の局部発振信号は抵抗20を介してトランジスタ1
1,14のベースに加え、トランジスタ11,12と1
3,14のエミッタに加えられた信号をスイッチングし
てトランジスタ11,13のコレクタに接続した中間周
波トランス56に中間周波信号を取り出し、セラミック
フィルタ55を介して中間周波増幅器2に加えて増幅
し、検波回路3で検波し、検波した信号を端子71に取
り出している。
The input signal tuned by the antenna 6, the capacitor 4, and the variable capacitor 5 is added to the base of one transistor 9 of the transistors 9 and 10 which are emitter-coupled to each other. The local oscillation signal of the local oscillation circuit composed of the transistors 24 and 25, the coil 53, the capacitor 51, and the tuning circuit of the variable capacitor 52 is applied to the transistor 1 through the resistor 20.
In addition to the bases of 1,14, transistors 11,12 and 1
The signals applied to the emitters of 3, 14 are switched to extract the intermediate frequency signal to the intermediate frequency transformer 56 connected to the collectors of the transistors 11 and 13, and the intermediate frequency signal is added to the intermediate frequency amplifier 2 via the ceramic filter 55 and amplified. The signal is detected by the detection circuit 3, and the detected signal is taken out to the terminal 71.

発明が解決しようとする問題点 しかしながら、上記のような構成では中間周波トランス
56の一次側インピーダンスは20〜30KΩと高い、
そしてセラミックフィルタ等のフィルタ55のインピー
ダンスは低く1〜3KΩのものが多い。この中間周波ト
ランスの一次巻線のインピーダンスを高く設計している
のはトランジスタ9,10,11,12,13,14で
構成する周波数変換利得を高くして中間周波トランス5
6に大きな中間周波信号を取り出すためである。そして
中間周波トランスの2次巻線を少くしてインピーダンス
を低くしてフィルタ55とインピーダンスマッチングを
行うようにしている。
Problems to be Solved by the Invention However, in the configuration as described above, the primary impedance of the intermediate frequency transformer 56 is as high as 20 to 30 KΩ,
Further, the impedance of the filter 55 such as a ceramic filter is low and often has 1 to 3 KΩ. The impedance of the primary winding of this intermediate frequency transformer is designed to be high because the frequency conversion gain formed by the transistors 9, 10, 11, 12, 13, and 14 is increased and the intermediate frequency transformer 5 is designed.
This is because a large intermediate frequency signal is taken out in FIG. Then, the secondary winding of the intermediate frequency transformer is reduced to lower the impedance to perform impedance matching with the filter 55.

そのため中間周波トランス56が必要であり、この中間
周波トランス56のコイル58とコンデンサ57で中間
周波数に同調しているが、このコイル58,コンデンサ
57の値のバラツキがあるために一般的にはコイル58
の値を外部より調整している。そのために受信機をつく
る時に中間周波トランスの調整が必要であった。
Therefore, the intermediate frequency transformer 56 is required, and the coil 58 and the capacitor 57 of the intermediate frequency transformer 56 are tuned to the intermediate frequency. However, since there are variations in the values of the coil 58 and the capacitor 57, the coil is generally a coil. 58
The value of is adjusted from the outside. Therefore, it was necessary to adjust the intermediate frequency transformer when making the receiver.

本発明は上記問題点に鑑み、周波数変換回路の出力から
中間周波信号を取り出すフィルタを無調整にし、性能も
よい周波数変換回路を提供するものである。
In view of the above problems, the present invention provides a frequency conversion circuit having good performance by eliminating the adjustment of the filter for extracting the intermediate frequency signal from the output of the frequency conversion circuit.

問題点を解決するための手段 上記問題点を解決するために本発明の周波数変換回路は
互いのエミッタを接続した第1と第2のトランジスタ
と、この第1と第2のトランジスタのエミッタを第3の
トランジスタのコレクタに接続し、互いのエミッタを接
続した第4と第5のトランジスタと、この第4と第5の
トランジスタのエミッタを第6のトランジスタのコレク
タに接続し、この第3と第6のトランジスタのエミッタ
を互いに接続し、この第3と第6のトランジスタの少く
とも一方のトランジスタのベースに入力信号または局部
発振信号を加え、この第1と第5のトランジスタのベー
スの接続点と、この第2と第4のトランジスタのベース
の接続点の少くとも一方の接続点に局部発振信号または
入力信号を加え、この第1と第4のトランジスタの接続
点と第2と第5のトランジスタのコレクタの接続点の両
方の接続点より周波数変換された互いに逆極性の2つの
信号を取り出し、この2つの信号を差動増幅器用の第7
と第8のトランジスタのベースに加えて増幅し、この信
号をこの第7と第8のトランジスタの少くとも一方から
インピーダンスを低くした出力回路を介して無調整の中
間周波フィルタに取り出すように構成を備えたものであ
る。
Means for Solving the Problems In order to solve the above problems, the frequency conversion circuit of the present invention includes a first and a second transistor whose emitters are connected to each other, and an emitter of the first and the second transistor. A fourth and fifth transistor connected to the collector of the third transistor and having their emitters connected to each other, and the emitters of the fourth and fifth transistors connected to the collector of the sixth transistor. The emitters of the six transistors are connected to each other, and an input signal or a local oscillation signal is applied to the bases of at least one of the third and sixth transistors, and a connection point of the bases of the first and fifth transistors is provided. , A local oscillation signal or an input signal is applied to at least one of the connection points of the bases of the second and fourth transistors, and the first and fourth transistors are connected. Frequency-converted two signals of opposite polarities are taken out from both the connection points of the connection point of the second transistor and the connection point of the collectors of the second and fifth transistors, and these two signals are output to the seventh node for the differential amplifier.
In addition to the bases of the 8th and 8th transistors, it is amplified, and this signal is taken out from at least one of the 7th and 8th transistors to an unadjusted intermediate frequency filter through an output circuit whose impedance is lowered. Be prepared.

作用 本発明は上記の構成によって周波数変換された互いに逆
極性の2つの信号を差動増幅器で増幅して利得をあげ、
その後にインピーダンスを低い出力回路を介して無調整
の中間周波フィルタにインピーダンスマッチングしてい
るのでS/N感度がよく、しかもセラミックフィルタ等
の中間周波フィルタを用いて無調整化ができるものであ
る。
Effect The present invention increases the gain by amplifying two signals of opposite polarities, which are frequency-converted by the above configuration, with a differential amplifier,
After that, the impedance is matched to the unadjusted intermediate frequency filter through the low output circuit, so that the S / N sensitivity is good, and the adjustment can be made by using the intermediate frequency filter such as a ceramic filter.

実施例 以下、本発明の実施例の周波数変換回路について、図面
を参照しながら説明する。
Embodiment Hereinafter, a frequency conversion circuit according to an embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例における周波数変換回路の電
気的結線図を示すものである。第1図において、1は周
波数変換回路、2は中間周波増幅器、3は検波回路、6
はアンテナコイル、5,52はバリコン、53は局部発
振用コイル、55は中間周波フィルタ、4,7,51,
54はコンデンサ、8,15,16,19,20,2
7,28,29,30,35,37,40は抵抗、2
1,22,23,26,36,39は電流源、9〜1
4,24,25,31〜34,38はトランジスタであ
る。
FIG. 1 is an electrical connection diagram of a frequency conversion circuit according to an embodiment of the present invention. In FIG. 1, 1 is a frequency conversion circuit, 2 is an intermediate frequency amplifier, 3 is a detection circuit, and 6
Is an antenna coil, 5, 52 are variable capacitors, 53 is a local oscillation coil, 55 is an intermediate frequency filter, 4, 7, 51,
54 is a condenser, 8, 15, 16, 19, 20, 2
7, 28, 29, 30, 35, 37, 40 are resistors, 2
1, 22, 23, 26, 36, 39 are current sources, 9 to 1
4, 24, 25, 31 to 34 and 38 are transistors.

以上のように構成された周波数変換回路について第1図
を用いてその動作を説明する。
The operation of the frequency conversion circuit configured as described above will be described with reference to FIG.

バリコン5,コンデンサ4と同調回路を構成するアンテ
ナコイル6の入力信号は互いにエミッタ結合したトラン
ジスタ9,10の一方のトランジスタ9のベースに加
え、トランジスタ9,10のコレクタよりトランジスタ
11,12のエミッタとトランジスタ13,14のエミ
ッタに加えるとともにトランジスタ24,25とコイル
53,コンデンサ51,バリコン52の同調回路とで構
成される局部発振回路の局部発振信号は抵抗20を介し
てトランジスタ11,14のベースに加え、トランジス
タ11,12と13,14のエミッタに加えられた信号
をスイッチングしてトランジスタ11,13のコレクタ
の接続点85とトランジスタ12,14のコレクタの接
続点86に周波数変換された互いに逆極性の2つの信号
を取り出しコンデンサ17,18を介して差動増幅器用
トランジスタ31,32のベースに加えて増幅する。ト
ランジスタ31のコレクタにダイオード接続のトランジ
スタ33(ダイオードでもよい。)を接続し、トランジ
スタ32のコレクタにPNPトランジスタ34のコレク
タを接続し、ダイオード又はダイオード接続のトランジ
スタ33とトランジスタ34はカレントミラー回路とし
て動作し、トランジスタ32,34のコレクタに増幅さ
れた信号はエミッタフォロア用のトランジスタ38のベ
ースに加え、このトランジスタ38のエミッタより抵抗
40を介して中間周波フィルタ(ここではセラミックフ
ィルタ)に中間周波信号を取り出す。そしてこの中間周
波信号は中間周波増幅回路2で増幅し、検波回路3(こ
こではAM検波回路)で検波して検波出力信号を取り出
す。検波回路3がAM検波回路の時は信号レベルの大き
さによって直流電圧が変化する信号を自動利得制御用信
号として用い、第1図の線72で中間周波増幅器2に加
えて自動利得制御を行い、線73を介して周波数変換回
路1(トランジスタ10,9のベース)に加えて自動利
得制御を行っている。この時線73の電圧低下するとト
ランジスタ9,10の電流が低下し利得制御する。
The input signal of the variable coil 5, the capacitor 4 and the antenna coil 6 which forms a tuning circuit is applied to the base of one transistor 9 of the transistors 9 and 10 which are emitter-coupled to each other and to the emitters of the transistors 11 and 12 from the collectors of the transistors 9 and 10. In addition to the emitters of the transistors 13 and 14, the local oscillation signal of the local oscillation circuit including the transistors 24 and 25, the coil 53, the capacitor 51, and the tuning circuit of the variable capacitor 52 is transmitted to the bases of the transistors 11 and 14 via the resistor 20. In addition, the signals applied to the emitters of the transistors 11, 12 and 13, 14 are switched to switch the frequency to the connection point 85 of the collectors of the transistors 11, 13 and the connection point 86 of the collectors of the transistors 12, 14 and have mutually opposite polarities. Take out the two signals of 17 and 18 is amplified in addition to the base of differential amplifier transistors 31 and 32 via the. The collector of the transistor 31 is connected to a diode-connected transistor 33 (which may be a diode), the collector of the transistor 32 is connected to the collector of a PNP transistor 34, and the diode- or diode-connected transistor 33 and the transistor 34 operate as a current mirror circuit. The signals amplified by the collectors of the transistors 32 and 34 are added to the base of the transistor 38 for the emitter follower, and the intermediate frequency signal (here, ceramic filter) is transmitted from the emitter of the transistor 38 to the intermediate frequency filter (here, ceramic filter). Take it out. Then, this intermediate frequency signal is amplified by the intermediate frequency amplifier circuit 2 and detected by the detection circuit 3 (here, the AM detection circuit) to extract a detection output signal. When the detection circuit 3 is an AM detection circuit, a signal whose DC voltage changes according to the magnitude of the signal level is used as a signal for automatic gain control, and line 72 in FIG. 1 is used to perform automatic gain control in addition to the intermediate frequency amplifier 2. In addition to the frequency conversion circuit 1 (bases of the transistors 10 and 9) via line 73, automatic gain control is performed. At this time, if the voltage of the line 73 drops, the currents of the transistors 9 and 10 drop and the gain is controlled.

ここで周波数変換回路の負荷抵抗15,16の値は従来
の第5図に示す中間周波トランス56の一次側インピー
ダンスよりも低い値である。もし、第1図のこの抵抗値
を20〜30KΩに高くすると電圧降下が大きくなり、
Vccの電源電圧が低い場合は使用できない。そのため低
い電圧で使用するためには抵抗15,16の値を小さく
する必要がある。例えばVccが1.5Vで動作させるた
めには抵抗15,16の電圧降下を0.5〜0.7V位
にする必要がある。抵抗15,16に流れる電流が200
μAとすると2.5〜3.5KΩになる。そのため従来
の中間周波トランス56を用いるよりも周波数変換回路
の変換利得が低い。そこで本発明の第1図の実施例では
この負荷抵抗15,16の2つの信号をコンデンサ1
7,18を介してトランジスタ31,32のベースに加
え、差動増幅器用トランジスタ31,32で増幅してト
ランジスタ32,34のコレクタに信号を取り出す。こ
の時、周波数変換回路のトランジスタ11,13と1
2,14のコレクタ信号の両方の信号を差動増幅器のト
ランジスタ31,32の両方に加えているのは利得を大
きくするためである。(これらの信号の一方のみを増幅
すると利得が小さい。)もし一方の信号のみを後の増幅
器で大きく増幅しても利得が上がる後の増幅器で大きく
増幅するとトランジスタの雑音を増幅するのでS/N比
が悪くなる。そのため周波数変換回路の両方の出力を用
いて前段の利得を大きくするために、前記両方の信号を
差動増幅器を用いて増幅している。
Here, the values of the load resistors 15 and 16 of the frequency conversion circuit are lower than the primary impedance of the conventional intermediate frequency transformer 56 shown in FIG. If this resistance value in FIG. 1 is increased to 20 to 30 KΩ, the voltage drop becomes large,
It cannot be used when the power supply voltage of Vcc is low. Therefore, in order to use it at a low voltage, it is necessary to reduce the values of the resistors 15 and 16. For example, in order to operate at Vcc of 1.5V, it is necessary to set the voltage drop of the resistors 15 and 16 to about 0.5 to 0.7V. The current flowing through the resistors 15 and 16 is 200
If it is μA, it becomes 2.5 to 3.5 KΩ. Therefore, the conversion gain of the frequency conversion circuit is lower than that of the conventional intermediate frequency transformer 56. Therefore, in the embodiment of FIG. 1 of the present invention, the two signals of the load resistors 15 and 16 are connected to the capacitor 1
In addition to the bases of the transistors 31 and 32 via 7 and 18, signals are taken out to the collectors of the transistors 32 and 34 after being amplified by the differential amplifier transistors 31 and 32. At this time, the transistors 11, 13 and 1 of the frequency conversion circuit
The reason why both the collector signals 2 and 14 are applied to both the transistors 31 and 32 of the differential amplifier is to increase the gain. (If only one of these signals is amplified, the gain is small.) Even if only one signal is greatly amplified by the subsequent amplifier, the gain is increased. The ratio gets worse. Therefore, in order to increase the gain of the previous stage by using both outputs of the frequency conversion circuit, both signals are amplified by using a differential amplifier.

次にエミッタフォロア用トランジスタ38を用いると、
このトランジスタ38のベースインピーダンスが高いの
で差動増幅器31,32の負荷抵抗35で利得がほぼ決
定され、大きな利得を得ることができる。さらにトラン
ジスタ38のエミッタのインピーダンスが低いのでフィ
ルタ55のインピーダンスが3KΩであれば抵抗40を
約3KΩにするとインピーダンスマッチングすることが
できる。即ちエミッタフォロアのトランジスタ38はイ
ンピーダンス変換をするために用いている。
Next, using the emitter follower transistor 38,
Since the base impedance of the transistor 38 is high, the gain is substantially determined by the load resistance 35 of the differential amplifiers 31 and 32, and a large gain can be obtained. Further, since the impedance of the emitter of the transistor 38 is low, if the impedance of the filter 55 is 3 KΩ, impedance matching can be performed by setting the resistance 40 to about 3 KΩ. That is, the emitter follower transistor 38 is used for impedance conversion.

さらに差動増幅器31,32とPNPトランジスタを用
いてもよいがIC化した時にPNPトランジスタの方が
NPNトランジスタよりもトランジスタの雑音が大きい
のでPNPトランジスタを用いなくてNPNトランジス
タを用いた。そしてこのNPNトランジスタ31,32
のベース電圧とトランジスタ11,13,12,14の
コレクタ電圧が同一にできなかったのでコンデンサ1
7,18を用いている。
Further, the differential amplifiers 31 and 32 and the PNP transistor may be used, but since the noise of the PNP transistor is larger than that of the NPN transistor when integrated into an IC, the NPN transistor is used instead of the PNP transistor. And these NPN transistors 31, 32
Since the base voltage of and the collector voltage of transistors 11, 13, 12, and 14 could not be the same, capacitor 1
7 and 18 are used.

またトランジスタ31,32のエミッタの抵抗30をト
ランジスタを用いた電流源でも動作するがトランジスタ
を用いるとトランジスタの雑音が大きくなるので抵抗3
0を用いている。
Further, the emitter resistor 30 of the transistors 31 and 32 can also be operated by a current source using a transistor, but if a transistor is used, noise of the transistor becomes large, so the resistor 3 is used.
0 is used.

以上のように周波数変換された互いに逆極性の2つの信
号を差動増幅器で増幅し、インピーダンスの低いセラミ
ックフィルタ等の無調整フィルタに中間周波信号を取り
出し、中間周波フィルタを無調整にして、しかも性能の
よい周波数変換回路を構成することができる。
Two signals of opposite polarities that have been frequency-converted as described above are amplified by a differential amplifier, an intermediate frequency signal is taken out to an unadjusted filter such as a ceramic filter having a low impedance, and the intermediate frequency filter is unadjusted. A frequency conversion circuit with good performance can be constructed.

第2図は本発明の第2の実施例を示す周波数変換回路を
示す。この第2図では周波数変換回路のトランジスタ
9,10の一方のトランジスタ9のベースに局部発振信
号を加え、トランジスタ11,14と12,13のベー
スの一方に入力信号を加えても第1図と同じように動作
するものである。この時の自動利得制御は線73に正方
向の電圧がくるとトランジスタ95がONしてトランジ
スタ9,10の電流を低下して自動利得制御をする。
FIG. 2 shows a frequency conversion circuit showing a second embodiment of the present invention. In this FIG. 2, even if a local oscillation signal is applied to the base of one of the transistors 9 and 10 of the frequency conversion circuit and an input signal is applied to one of the bases of the transistors 11, 14 and 12, 13, It works in the same way. In the automatic gain control at this time, when a positive voltage is applied to the line 73, the transistor 95 is turned on to reduce the currents of the transistors 9 and 10 to perform automatic gain control.

第3図は本発明の第3の実施例を示す周波数変換回路を
示す。この第3図ではトランジスタ31,32のコレク
タに第1図に示すカレントミラー回路をなくし、抵抗3
5のみで行ったもので、第1図の実施例と同じように動
作するものである。
FIG. 3 shows a frequency conversion circuit showing a third embodiment of the present invention. In FIG. 3, the current mirror circuit shown in FIG.
5 only, and operates in the same way as the embodiment of FIG.

第4図は本発明の第4の実施例を示す周波数変換回路で
ある。第4の実施例では第3図のエミッタフォロア用ト
ランジスタ38をなくしたものを示す。この負荷抵抗3
5を第1図〜第3図の抵抗40とほぼ同一の低いインピー
ダンスの3KΩにするとインピーダンスマッチングがで
きる。しかし、第1〜第3図のものよりトランジスタ3
1,32の利得が小さいが差動増幅器を用いて周波数変
換回路の2つの信号を増幅するようにしているのである
程度利得が大きいので、第4図の場合でも第1図のもの
とほぼ同じように動作させることができる。
FIG. 4 is a frequency conversion circuit showing a fourth embodiment of the present invention. In the fourth embodiment, the emitter follower transistor 38 shown in FIG. 3 is eliminated. This load resistance 3
Impedance matching can be achieved by setting 5 to 3 KΩ, which has a low impedance almost the same as that of the resistor 40 shown in FIGS. However, the transistor 3
Although the gains of 1 and 32 are small, the two signals of the frequency conversion circuit are amplified by using the differential amplifier, so the gain is large to some extent. Therefore, even in the case of FIG. 4, it is almost the same as that of FIG. Can be operated.

発明の効果 以上のように本発明は入力信号と局部発振信号とにより
周波数変換した互いに逆位相の2つの信号を差動増幅器
で増幅して後に低インピーダンス出力として無調整の中
間周波フィルタに取り出す構成にすることにより、S/
N感度がよい状態で中間周波数の調整をなくすることが
できる。
EFFECTS OF THE INVENTION As described above, the present invention has a configuration in which two signals having opposite phases that have been frequency-converted by an input signal and a local oscillation signal are amplified by a differential amplifier and then extracted as a low impedance output to an unadjusted intermediate frequency filter. By setting S /
It is possible to eliminate the adjustment of the intermediate frequency when the N sensitivity is good.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の第1の実施例における周波数変換回路
の電気的結線図、第2図は本発明の第2の実施例の周波
数変換回路の電気的結線図、第3図,第4図は本発明の
第3,第4の実施例を示す周波数変換回路の電気的結線
図、第5図は従来の周波数変換回路の電気的結線図であ
る。 1……周波数変換回路、2……中間周波増幅器、3……
検波器、6……アンテナコイル、5,52……バリコ
ン、53……局部発振用コイル、55……中間周波フィ
ルタ、56……中間周波トランス、9〜14,24,2
5,31〜34,38,95……トランジスタ、4,
7,51,54……コンデンサ、8,15,16,1
9,20,27,28,29,30,35,37,4
0,92,93,94……抵抗、21,22,23,2
6,36,39,91……電流源。
FIG. 1 is an electrical connection diagram of a frequency conversion circuit according to a first embodiment of the present invention, and FIG. 2 is an electrical connection diagram of a frequency conversion circuit according to a second embodiment of the present invention, FIGS. FIG. 5 is an electrical connection diagram of a frequency conversion circuit showing the third and fourth embodiments of the present invention, and FIG. 5 is an electrical connection diagram of a conventional frequency conversion circuit. 1 ... Frequency conversion circuit, 2 ... Intermediate frequency amplifier, 3 ...
Detector, 6 ... Antenna coil, 5, 52 ... Varicon, 53 ... Local oscillation coil, 55 ... Intermediate frequency filter, 56 ... Intermediate frequency transformer, 9-14, 24, 2
5,31-34,38,95 ... Transistor, 4,
7, 51, 54 ... Capacitors, 8, 15, 16, 1
9, 20, 27, 28, 29, 30, 35, 37, 4
0,92,93,94 ... Resistance 21,22,23,2
6, 36, 39, 91 ... Current source.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】互いのエミッタを接続した第1と第2のト
ランジスタと、この第1と第2のトランジスタのエミッ
タを第3のトランジスタのコレクタに接続し、互いのエ
ミッタを接続した第4と第5のトランジスタと、この第
4と第5のトランジスタのエミッタを第6のトランジス
タのコレクタに接続し、この第3と第6のトランジスタ
のエミッタを互いに接続し、この第3と第6のトランジ
スタの少くとも一方のトランジスタのベースに入力信号
または局部発振信号を加え、この第1と第5のトランジ
スタのベースの接続点とこの第2と第4のトランジスタ
のベースの接続点の少くとも一方の接続点に局部発振信
号または入力信号を加え、この第1,第4のトランジス
タのコレクタの接続点と、この第2,第5のトランジス
タのコレクタの接続点の両方の接続点より周波数変換し
た互いに逆極性の2つの信号を取り出し、この2つの信
号を差動増幅器用の第7と第8のトランジスタのベース
に加えて増幅し、この信号をこの第7と第8のトランジ
スタの少くとも一方からインピーダンスを低くした出力
回路を介して、セラミックフィルタ等の無調整の中間周
波フィルタに中間周波信号を取り出すように構成したこ
とを特徴とする周波数変換回路。
1. A first and a second transistor whose emitters are connected to each other, and a fourth transistor whose emitters are connected to a collector of a third transistor and whose emitters are connected to each other. A fifth transistor, the emitters of the fourth and fifth transistors are connected to the collector of the sixth transistor, the emitters of the third and sixth transistors are connected to each other, and the third and sixth transistors are connected. An input signal or a local oscillation signal to the base of at least one of the transistors, and the connection point of the bases of the first and fifth transistors and the connection point of the bases of the second and fourth transistors of at least one of A local oscillation signal or an input signal is applied to the connection point, and the connection point between the collectors of the first and fourth transistors and the collector of the second and fifth transistors are connected. Two signals of opposite polarities, which are frequency-converted from both connection points of the points, are taken out, these two signals are added to the bases of the seventh and eighth transistors for the differential amplifier and amplified, and this signal is A frequency conversion circuit characterized in that an intermediate frequency signal is taken out to an unadjusted intermediate frequency filter such as a ceramic filter through an output circuit having a low impedance from at least one of the seventh and eighth transistors.
JP60107465A 1985-05-20 1985-05-20 Frequency conversion circuit Expired - Lifetime JPH0640604B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60107465A JPH0640604B2 (en) 1985-05-20 1985-05-20 Frequency conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60107465A JPH0640604B2 (en) 1985-05-20 1985-05-20 Frequency conversion circuit

Publications (2)

Publication Number Publication Date
JPS61264904A JPS61264904A (en) 1986-11-22
JPH0640604B2 true JPH0640604B2 (en) 1994-05-25

Family

ID=14459878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60107465A Expired - Lifetime JPH0640604B2 (en) 1985-05-20 1985-05-20 Frequency conversion circuit

Country Status (1)

Country Link
JP (1) JPH0640604B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1213446B (en) * 1986-12-31 1989-12-20 Sgs Microelettronica Spa INTEGRATED COUPLING CIRCUIT BETWEEN A MODULATOR AND A CERAMIC FILTER FOR RECEIVERS IN AMPLITUDE MODULATION.
JPH0767050B2 (en) * 1989-10-11 1995-07-19 株式会社東芝 Frequency conversion circuit
DE4425336C1 (en) * 1994-07-18 1995-09-07 Siemens Ag IF sampling circuit for mobile communications receiver

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5252513A (en) * 1975-10-27 1977-04-27 Sony Corp Frequency converter
JPS5646328B2 (en) * 1971-12-09 1981-11-02
JPS5866140A (en) * 1981-10-15 1983-04-20 Sanyo Electric Co Ltd Word processor
JPS58225429A (en) * 1982-06-25 1983-12-27 Fujitsu Ltd Spelling error processing system of engilish sentence processor
JPS6190259A (en) * 1984-10-08 1986-05-08 Brother Ind Ltd Electronic typewriter

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6230324Y2 (en) * 1979-09-17 1987-08-04

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5646328B2 (en) * 1971-12-09 1981-11-02
JPS5252513A (en) * 1975-10-27 1977-04-27 Sony Corp Frequency converter
JPS5866140A (en) * 1981-10-15 1983-04-20 Sanyo Electric Co Ltd Word processor
JPS58225429A (en) * 1982-06-25 1983-12-27 Fujitsu Ltd Spelling error processing system of engilish sentence processor
JPS6190259A (en) * 1984-10-08 1986-05-08 Brother Ind Ltd Electronic typewriter

Also Published As

Publication number Publication date
JPS61264904A (en) 1986-11-22

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