JPS63142925U - - Google Patents

Info

Publication number
JPS63142925U
JPS63142925U JP3652087U JP3652087U JPS63142925U JP S63142925 U JPS63142925 U JP S63142925U JP 3652087 U JP3652087 U JP 3652087U JP 3652087 U JP3652087 U JP 3652087U JP S63142925 U JPS63142925 U JP S63142925U
Authority
JP
Japan
Prior art keywords
power supply
control transistor
resistor
muting
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3652087U
Other languages
Japanese (ja)
Other versions
JPH073700Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987036520U priority Critical patent/JPH073700Y2/en
Publication of JPS63142925U publication Critical patent/JPS63142925U/ja
Application granted granted Critical
Publication of JPH073700Y2 publication Critical patent/JPH073700Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Noise Elimination (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案に係るミユーテイング回路を
AM/FM受信機に適用した場合の一例を示す要
部の接続図、第2図はそのミユーテイング動作の
説明に供する波形図、第3図はこの考案に係るミ
ユーテイング回路の他の例を示す要部の接続図、
第4図は従来のミユーテイング回路の接続図、第
5図はその動作説明に供する波形図である。 2……検波回路、20……安定化電源回路、3
0……時定数回路、Qa……制御トランジスタ、
Q1……スイツチングトランジスタ、L……電源
路、S1,S2……ミユーテイング信号。
Fig. 1 is a connection diagram of the main parts showing an example of applying the muting circuit according to this invention to an AM/FM receiver, Fig. 2 is a waveform diagram to explain the muting operation, and Fig. 3 is a diagram showing this invention. A connection diagram of main parts showing another example of a muting circuit according to
FIG. 4 is a connection diagram of a conventional muting circuit, and FIG. 5 is a waveform diagram for explaining its operation. 2...Detection circuit, 20...Stabilized power supply circuit, 3
0... Time constant circuit, Qa... Control transistor,
Q1... Switching transistor, L... Power supply path, S1, S2... Muting signal.

Claims (1)

【実用新案登録請求の範囲】 (1) 安定化電源用の制御トランジスタのベース
に対して非安定化電源より電源を供給するための
電源路上に、直列接続された抵抗器とコンデンサ
よりなる時定数回路が接続され、 上記抵抗器の両端に制御トランジスタが接続さ
れ、 この制御トランジスタの出力によつて音声ミユ
ーテイング手段が制御されるようになされたこと
を特徴とするミユーテイング回路。 (2) 上記時定数回路と並列に定電圧素子が接続
されてなることを特徴とする実用新案登録請求の
範囲第1項記載のミユーテイング回路。 (3) 上記抵抗器とコンデンサの接続中点の電圧
が上記安定化電源用の制御トランジスタのベース
に供給されてなることを特徴とする実用新案登録
請求の範囲第1項及び第2項記載のミユーテイン
グ回路。
[Claims for Utility Model Registration] (1) A time constant consisting of a resistor and a capacitor connected in series on a power supply path for supplying power from an unregulated power supply to the base of a control transistor for a regulated power supply. A muting circuit, wherein a control transistor is connected to both ends of the resistor, and an audio muting means is controlled by the output of the control transistor. (2) The muting circuit according to claim 1, which is characterized in that a constant voltage element is connected in parallel with the time constant circuit. (3) Claims 1 and 2 of the utility model registration claim characterized in that the voltage at the midpoint of the connection between the resistor and the capacitor is supplied to the base of the control transistor for the stabilized power supply. Muting circuit.
JP1987036520U 1987-03-12 1987-03-12 Muting circuit Expired - Lifetime JPH073700Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987036520U JPH073700Y2 (en) 1987-03-12 1987-03-12 Muting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987036520U JPH073700Y2 (en) 1987-03-12 1987-03-12 Muting circuit

Publications (2)

Publication Number Publication Date
JPS63142925U true JPS63142925U (en) 1988-09-20
JPH073700Y2 JPH073700Y2 (en) 1995-01-30

Family

ID=30846998

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987036520U Expired - Lifetime JPH073700Y2 (en) 1987-03-12 1987-03-12 Muting circuit

Country Status (1)

Country Link
JP (1) JPH073700Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55155123U (en) * 1979-04-20 1980-11-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55155123U (en) * 1979-04-20 1980-11-08

Also Published As

Publication number Publication date
JPH073700Y2 (en) 1995-01-30

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