JPH073521B2 - Liquid crystal element drive circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a drive circuit for a liquid crystal display device, and more particularly to a drive circuit for a liquid crystal display device using a ferroelectric liquid crystal.

[Summary of Disclosure] This specification and the drawings show that, in a drive circuit for a liquid crystal display device using a ferroelectric liquid crystal, the power supply voltage of a scan side drive circuit is switched to reduce the maximum voltage applied to an output transistor. Eliminates the use of high voltage transistors,
The cost can be reduced.

[Prior Art] Conventionally, a liquid crystal display element that forms a scanning electrode group and a display electrode group in a matrix, fills a liquid crystal compound between the electrodes, and forms a large number of pixels to display an image or information is known. ,
well known. In particular, in recent years, a ferroelectric liquid crystal having bistability against an electric field has been attracting attention, and its application to a display device has also become popular.

FIG. 4 is a schematic drawing of an example of a ferroelectric liquid crystal cell. The ferroelectric liquid crystal display device utilizes the fact that liquid crystal molecules in a chiral smectic phase are confined to the substrates 11 and 11a and only have two stable states 23 and 23a as shown in the figure. At this time, the electric dipole attached to the molecule takes two directions, 24 or 24a, so by applying a pulse voltage between the upper and lower substrates 11 and 11a, the direction of these molecules can be changed from 23 to 23a depending on the electric field direction. Or from 23a to 23. That is, since the direction of optical anisotropy can be electrically changed, it can be used as an optical modulator. As a driving method of such a ferroelectric liquid crystal display device, there are disclosed in Japanese Patent Laid-Open Nos. 59-193426 and 59-193427.
And those disclosed in JP-A-60-156046 and JP-A-60-156047 are known. FIG. 2 is a timing chart showing an example thereof, in which S ₁ , S ₂ , S ₃ ... S _N are scan electrodes.
I ₁ and I ₂ represent display electrodes. The write operation will be described below with reference to FIG. Note that the writing content is written in a positive electric field with the first state being “black”. On the other hand, it is assumed that the second state is “white” and the writing is performed by a negative electric field.

First, between time t = 0 and t = ΔT, positive voltage pulses are sequentially applied to all scan electrodes, and at the same time, negative voltage pulses are applied to all display electrodes, so that all pixels are “white”. Align. Then, from time t = T to t = T
During + NΔT (N is the number of scan electrodes), a negative voltage pulse is sequentially applied to each of the scan electrodes, and in synchronization with this, a positive or negative voltage pulse is applied to the display electrodes. In each pixel on the scan electrode to which a negative voltage is applied, if the voltage of the corresponding display electrode is positive, a sufficiently strong reversal electric field is applied to the liquid crystal molecules, so that it is reversed to “black”, and if it is negative, the electric field is weak. The original "white" is retained. One screen is completed by repeating such writing operation for all the scan electrodes.

[Problems to be Solved by the Invention] As described above, in the ferroelectric liquid crystal display element, since "white" or "black" is selected depending on the direction of the electric field applied to the pixel, a voltage of both positive and negative polarities is applied to each electrode. The feature is that it must be applied, and the writing of "white" and the writing of "black" can be temporally separated as in the above example. As the drive circuit for this purpose, the one shown in FIG. 3 has been conventionally used in many cases. FIG. 3 shows a scanning side drive circuit. In FIG. 3, reference numeral 1 is a power supply line connected to a positive power supply (not shown), to which a positive voltage of V ₁ is applied.
Reference numeral 2 is a power supply line connected to a negative power supply (not shown), to which a negative voltage of V ₂ is applied. A and B are scan pulse input terminals, and C is an output terminal. Further, TR ₁ and TR ₂ are transistors on the output side.

In the drive circuit of FIG. 3, the input terminal A has a high level (hereinafter,
(Referred to as H), the transistor TR ₁ is turned on and the output terminal C has a positive voltage close to V ₁ . On the other hand, when the input terminal B becomes H, the transistor TR ₂ is turned on and the output terminal becomes a negative voltage close to V ₂ . Also, input terminal A,
When both B are at a low level (hereinafter referred to as L), both the transistors TR ₁ and TR ₂ are turned off, and the output terminal C becomes 0V. As described above, since a voltage of V ₁ -V ₂ is applied between the collectors and emitters of the transistors TR ₁ and TR _{2 at} the maximum, it is necessary to use a transistor having a breakdown voltage higher than that. For example, the third voltage value is driving method scanning side ± 2V shown in FIG. _0, since the signal side ± V _0, the breakdown voltage of the driver circuit transistor is scanning side 4V _0, must signal side 2V ₀ or more. Since V ₀ is usually 5 V or higher, the scanning side drive circuit requires a transistor having a relatively high breakdown voltage of 20 V or higher, which causes a high cost.

It is an object of the present invention to provide a drive circuit which can eliminate the drawbacks of the conventional example and reduce the withstand voltage of the drive circuit element.

[Means for Solving Problems] In the present invention, the power supply voltage of the scanning side drive circuit is switched to reduce the maximum voltage applied to the output transistor. When the output is positive, the negative power supply voltage (absolute The power supply voltage is switched to the smaller one and the positive power supply voltage is switched to the smaller one when the hand flow force is negative. Specifically, the first voltage V ₁ and the second voltage V ₂ are supplied from the power supply circuit, and the output of the drive circuit is set to the first level substantially equal to the first voltage V ₁ and the second voltage V ₁ A second level approximately equal to the voltage V ₂ , and
A voltage V _{3 of a third} level intermediate between the first level and the second level is used, and the output period of the first level and the second level
V ₁ ′ and second voltage V satisfying V ₁ > V ₁ ′> V ₃ with respect to the first voltage V ₁ by setting a third level output period during the level 1 output period. V ₃ against _2> V ₂ sets the voltage values of the '> V ₂ having a relationship of V _2', the first voltages V ₁ and the second
Is provided with a change-over switch for changing the voltage V ₂ of V _{1 to} V ₁ ′, V ₂ ′, and the first voltage is changed during the output period of the first level.
V ₁ and the second voltage are V ₂ ′, the first voltage is V ₁ ′, the second voltage is V ₂ during the output period of the second level, and the switching of the voltage is the third level. It is characterized in that it is performed during the output period.

In [work for] the output period of the first level, 'since the maximum voltage across the output transistor V ₁ -V _2' the second voltage is higher V ₂ than the V ₂ becomes. On the other hand, in the output period of the second level, 'since the maximum voltage across the output transistor V _1' the first voltage is lower V ₁ as compared with the V ₁ -V ₂
Becomes Since the maximum voltage applied to the output transistor is smaller than V ₁ −V ₂ in any period, a transistor having a lower breakdown voltage than the conventional one can be used. By performing such switching of the power supply voltage during the output period of the third level in which the output becomes the intermediate value V ₃ , it is possible to prevent the output from exceeding the maximum voltage.

[Embodiment] FIG. 1 is a schematic configuration diagram showing an example of a drive circuit according to the present invention. In the drive circuit of FIG. 1, the power supply lines 1 and 2 are connected via the switch 3 to the positive power supply terminal 4 and the negative power supply terminal 5.
The power supply line and the terminal are simultaneously switched. This changeover switch 3
This is a type in which a changeover switch having two fixed contacts a and b and one movable contact c is interlocked with one switch lever.

The operation will be described below with reference to FIGS. 1 and 2. In addition,
In FIG. 2, V ₁ and V ₂ represent power supply voltages switched by the switch 3.

First, between time t = 0 and t = ΔT, A = H, B =
L, and the switch 3 is turned on to the a side. At this time, the positive power supply becomes V ₁ and the negative power supply becomes 0 V, and the output takes a value close to V ₁ , so that the voltage applied to the transistor TR ₂ is about V ₁ . Next, from time t = ΔT to t = T, A = L, B
= 0, the output is 0V, but switch 3
Side to side b. After switching, the positive power supply side becomes 0V and the negative power supply side becomes V ₂ . In this state, A = L, B = H during a certain time ΔT after time t = T, and the output takes a value close to V ₂ at this time, but since the positive power supply is 0V, the transistor TR _The voltage applied to ₁ is about | V ₂ |.

That is, in the present invention, the negative power supply is set to 0 V during the period of outputting the positive polarity pulse, and the positive power supply is set to 0 V during the period of outputting the negative polarity pulse, so that V ₁ or | Only V ₂ | voltage is applied.
Therefore, it is possible to use a transistor having a low breakdown voltage.

In the above embodiment, the positive and negative power supplies were switched between V ₁ , V ₂ and 0V, but the latter need not always be 0V, and V ₁ > V ₁ ′ | V ₂ ′ | <| V ₂ | V ₁ that satisfies the relation ', V _2' is set and the positive power source V ₁
And V ₁ ′, the negative power supply may be switched between V ₂ and V ₂ ′. In this case, the maximum collector-emitter voltage is V ₁ + | V ₂ ′ | or V ₁ ′ + | V ₂ |. V ₁ ′, V ₂ ′
The value of is determined by the breakdown voltage of the transistor. However, these power supplies must be switched when the output is at an intermediate value (0 V in the above embodiment). because,
This is because the collector-emitter voltage may exceed the maximum value in the other periods.

[Effects of the Invention] As described above, according to the present invention, a drive voltage output switch is provided in a drive circuit that outputs pulses of both positive and negative polarities, and when a positive polarity pulse is output, the negative power source has an absolute value based on the original voltage value. By operating the changeover switch so that the positive power supply becomes a value whose absolute value is smaller than the original voltage value when the negative polarity pulse is output, it is possible to configure a circuit in which the voltage applied to the output transistor can be small. As a result, it is possible to reduce the cost without requiring a high breakdown voltage transistor or IC.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a drive circuit showing an embodiment of the present invention, FIG. 2 is a timing chart, FIG. 3 is a schematic configuration diagram of a conventional drive circuit, and FIG. 4 is a schematic view of a liquid crystal cell. It is a figure. 1,2 ... Power line, 3 ... Changeover switch, A, B ... input terminal, C ... output terminal.

Claims (1)

[Claims] 1. A first voltage V ₁ and a second voltage V ₂ from a power supply circuit.
And outputs the output of the drive circuit to a first level equal to the first voltage V ₁ , a second level equal to the second voltage V ₂ , and the first level and the second level. An intermediate third level voltage V3, wherein a _third level output period is set between the first level output period and the second level output period, and the first voltage V ₁ ＞ V ₁ ＞
A 'V ₁ having a relationship of> V _3' V _1, the second voltage V ₂
Set each voltage value of V ₂ ′ having the relationship of V ₃ > V ₂ ′> V ₂ ,
A change-over switch for changing the first voltage V ₁ and the second voltage V ₂ to V ₁ ′ and V ₂ ′ is provided, and the first voltage is changed to V ₁ and the second voltage during the output period of the first level. the voltage 'and, in the output period of the second level V ₁ of the first voltage' V _2, the second voltage is V _2, for switching the voltage in the output period of the third level A drive circuit for a liquid crystal element characterized by the above.