JPH01107237A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To improve the reliability and display quality of the title device by preventing an image signal voltage applied to a liquid crystal cell from being affected by the gate-source parasitic capacity of each picture element transistor (TR). CONSTITUTION:Either of two MOS TRs Mij and Fij (i, j=1, 2,...) of each picture element is kept on, so picture element driving electrodes Sij is connected to a column signal electrode Dj or nonselection potential supply terminal 5 and a stable potential is obtained. Therefore, variation in source potential (picture element driving electrode potential) caused by gate voltage variation when a picture element TR is turned off owing to the gate-source parasitic capacity of the picture element TR can be suppressed, and the parasitic capacity of the picture element TR exerts no influence upon display characteristics. Consequently, the liquid crystal display device is obtained which has the excellent display characteristics and high reliability.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an active matrix type liquid crystal display device, and more particularly to a liquid crystal display device that employs a pixel TPT circuit configuration and a driving method therefor that facilitate uniform display quality.

[Conventional technology]

In the conventional active matrix liquid crystal display device, each pixel is provided with a switching MOS transistor, as discussed in Technical Report 75-6 of the Television Society of Japan (1983: pages 29 to 34).

The image signal applied to the drain bus is written to the liquid crystal cell capacitor of each pixel at the timing of the sequential selection pulse applied to the gate bus, and the image signal is held until the next sequential selection and the image signal is transferred to the liquid crystal cell. The display was performed by continuously applying voltage.

[Problems to be Solved by the Invention] When an amorphous thin film transistor with an inverted star structure as described in the above-mentioned document is used as each pixel transistor, the parasitic capacitance between the gate and source becomes relatively large, and the liquid crystal of each pixel The gate voltage change when a pixel transistor changes from on to off changes the image signal voltage held in the liquid crystal cell capacitance through this parasitic capacitance, which is often not negligible compared to the cell capacitance.On the other hand, the liquid crystal Since the cell capacitance value may change by about twice as much depending on the display state (transmission, non-transmission), the change in the image signal voltage due to the change in the gate voltage is no longer constant. This shows that although the image signal voltage applied to the liquid crystal cell is changed to alternating current at a certain period from the viewpoint of reliability of the liquid crystal cell, a direct current component is actually added to the image signal voltage applied to the liquid crystal cell. Therefore, it is thought that display defects are more likely to occur.

An object of the present invention is to provide an active matrix liquid crystal display device in which the parasitic capacitance of pixel transistors does not affect display characteristics.

[Means for solving problems]

The above purpose is to provide two or more switching MOS transistors in each pixel, and to apply a predetermined voltage to each liquid crystal cell by turning on at least one MOS transistor during most of the periods. Even if a gate voltage change is transmitted to the liquid crystal cell through the gate-source parasitic capacitance of
It works to minimize the influence of parasitic capacitance between the gate and source by setting a predetermined voltage using a transistor.

achieved.

[Effect]

Since the image signal voltage applied to the liquid crystal cell is not affected by the gate-source parasitic capacitance of each pixel transistor,
Complete AC driving of each liquid crystal cell can be realized, and an active matrix liquid crystal display device with high reliability and good display quality can be obtained.

〔Example〕

FIG. 1 is a configuration diagram of a liquid crystal display device showing one embodiment of the present invention. 1 is one pixel with two Mos transistors ML
#* F L , (i vk= 1,2t3 t...
) and a liquid crystal cell L L >, 2 is a horizontal scanning circuit, 3 is a vertical scanning circuit, 4 is a shift register for vertical scanning, 5 is a non-selection potential supply terminal, 6 is a counter common electrode, Ii is an inverter, D is a column signal electrode, GL is a first row scanning electrode, HL is a second row scanning electrode, and St is a liquid crystal drive electrode of each pixel. The embodiment shown in FIG. 1 will be described below using examples of operating waveforms of each part shown in FIG. 2.

In the operational waveform example shown in FIG. 2, the horizontal axis represents time and the vertical axis represents potential. The same applies to the figures showing the operation waveforms below.

A constant potential of ov is applied to the opposing common potential 6, and potentials V□ and -v are applied to the non-selection potential supply terminal 5 every field period T1.
1 is applied alternately. The first row scanning electrode Gt is sequentially selected for one field T by the vertical scanning shift register 4 for a time T2.

Potential vo that turns on the pixel transistor ML when selected
When on is not selected, the pixel transistor ML.

The potential V that turns off. Give oj ding. The second row scanning electrode HL converts the potential of the first row scanning electrode OL into an inverter It.
Therefore, the potential Vao which turns off the pixel transistor F L when one is selected is inverted, and the potential Vaon which turns on the pixel transistor F L when it is not selected is given.

Column signal electrodes are selected.

Image signals corresponding to pixels in a row are supplied from the horizontal scanning circuit 2 to display an image.

The operating waveform example shown in Figure 2 uses a so-called normally closed liquid crystal cell that displays black when no voltage is applied.
It is assumed that pixels in the first row and second row of the first column are displayed in white and black, respectively.

At time t1, the first first row scanning electrode G□ is at the on potential vaon, and the second second row scanning electrode G2 is at the off potential Vaon.
o55Lf, pixel transistor M z in the first row)
is turned on and FL is turned off. At the same time, the first
A white display signal potential v2 is output to the column signal electrode, and a white display signal potential v2 is output to the pixel drive electrode S1□ of the first row and first column.
is applied. At this time, the first second row scan electrode G2 is at the off potential Vooj3, the second second row scan electrode H2 is at the on potential VCto11, and the second row pixel transistors M2. is off and F2) is on, making it unselected.

Since the non-selection potential supply terminal 5 is supplied with the non-selection potential V, the non-selection potential V□ is applied to the pixel drive electrode Sat in the second row and first column.

At time t2 after one row selection time T2 has elapsed from time t□, the first first row scanning electrode G□ is at the off potential Vao (4,
The second second row scanning electrode G2 becomes on-potential at 1 time ti
From then until time t4 after the field period T1 has elapsed, the first row pixel transistor M 1 i is turned off and Fnio is turned on, resulting in a non-selection state. 6 A non-selection potential V□ is applied to the non-selection potential supply terminal 5. Therefore, the non-selection potential V is applied to the pixel drive electrode s11 in the first row and first column until 1 time. At time t2 when the first row becomes non-selected, the first second row scan electrode G2 has an on potential VCOn, and the second second row scan electrode G2 has an on potential VCOn.
The row scanning electrode H2 becomes an off potential, and the second row pixel transistors M2. is on and F z k is off, resulting in a selected state.

At the same time, the black display signal potential 0 is output to the first column signal electrode D□, and the black display signal potential 0 is applied to the pixel drive electrode Szt in the second row and first column.

At t3 after one row selection period T2 has elapsed from time 2,
As described above, the non-selection potential ■□ is applied to the pixel drive electrode StX in the first row and 41st column.

On the other hand, the first second row scanning electrode G2 is at the off potential (Vooj)
.

The second second row scanning electrode H2 is at the on-potential V. turned on,
From time t2 to time 1s after the field period T has elapsed, the pixel transistors Mz in the second row are off, F2. is on and unselected. Since the non-selection potential supply terminal 5 is supplied with the non-selection potential v1 until time t4, the non-selection potential V□ is applied to the pixel drive electrode S2□ in the second row and first column until time t4.
4 is applied.

During the period from time 4 to field period T, that is, the second field, the same row scanning as in the first field, that is, from time t to field period T1, is performed. Reverse the polarity of the voltage applied to the Therefore, in the second field, the waveform of the signal applied to each pixel drive electrode SL has the polarity inverted from that of the signal waveform in the first field.

Below, the third field starts from time t7, time t.

The fourth field starting from , and the signal waveform whose polarity is sequentially inverted every field period T are applied to each pixel drive electrode SL, resulting in an alternating current waveform with a 2T period. Opposing common electrode 6
Since the potential of is 0, the voltage waveform applied across the liquid crystal cell Lt of each pixel is equal to the signal waveform of each pixel drive electrode SL, and the brightness of the L liquid crystal cell L L is It depends on the effective value of the AC signal voltage applied to the cell LA, and has display characteristics as shown in FIG. 9, for example. Here, since the voltage waveform applied to the liquid crystal cell L in the first row and first column, which displays white, is the waveform S in FIG. 2,
The effective voltage 8 is given by the following formula, and the effective voltage v2 □ applied to L2 is given by the following formula.
The effective voltage VB at which the effective voltage v2□ is the black display brightness BB
, effective voltage of liquid crystal cell L1□■, 1 is white display brightness Bvt
It can be set to the effective voltage ■w that becomes z.

In addition, by appropriately changing the voltage v2, the value of the effective voltage v4□ of the liquid crystal cell L 1 can be changed to the black display effective voltage V
Since it can be set arbitrarily within the range from B to white display effective voltage VW, halftone display can also be easily realized.

In this way, by driving the liquid crystal display device of the embodiment shown in FIG. 1 using the driving method shown in the example of operation waveforms shown in FIG. Since either one is in the on state, the pixel drive electrode S t
> is connected to the column signal electrode or the non-selection potential supply terminal 5, and a stable potential is applied. Therefore, it is possible to suppress the source potential (pixel drive electrode potential) change caused by the gate voltage change when the pixel transistor is off due to the gate-source parasitic capacitance of one pixel transistor, which was a problem in the conventional liquid crystal display device described above. This makes it possible to completely drive the liquid crystal cell with AC and obtain good display characteristics.

Another driving method for the embodiment shown in FIG. 1 will be explained using the example of operating waveforms shown in FIG. Operation waveform example and row scanning electrode Gh in Fig. 2
, H= are the same, but in contrast to the operating waveform example in FIG. 2 in which the potential of the opposing common electrode 6 was constant at O, in the operating waveform example in FIG. The major difference is that the potential of is switched between O and ■1 every field period. The voltage waveform applied to the liquid crystal cell L L j of each pixel is determined from the potential waveform of each pixel drive electrode SL,
Since the potential waveform is subtracted from
Liquid crystal cell L L of each pixel when using the operating waveform example of FIG. 3 in which the opposing common electrode 6 is switched to potentials O and V. In order to make the applied voltage waveforms equal, the operating waveform example of FIG. While the opposing common electrode 6 is at the potential O, for example from time t1 to time t4, the potential of the pixel drive electrode SL is the liquid crystal cell LL.
) applied voltage (i.e. pixel drive electrode SL in FIG.
.

While the opposing common electrode 6 is at the potential V, for example from time t4 to time t7, the pixel drive electrode Si
> potential of the liquid crystal cell L L , the applied voltage (i.e., the second
The column signal electrode D L H and the non-selection potential supply terminal 5 are driven so that the potential is the sum of the voltage v3 and the potential of the pixel drive electrodes S and O in the figure.

In other words, the signal waveforms applied to the opposing common electrode 6, the non-selection potential supply terminal 5, and the column signal electrodes are changed to the odd field (
For example, from time t to t, or from time t7 to t. In the even fields (for example, between times t4 and t), the signal waveform is the same as the operating waveform example in FIG. is used.

In this way, by using the operation waveform example shown in FIG.
The maximum signal voltage amplitude VPρ applied to the column signal electrodes is given by: Therefore, if v2=v3, the maximum output voltage amplitude VPP of the horizontal scanning circuit 2 is Vpp=v2=v,
Therefore, it is only half the maximum output voltage amplitude vpp=2V2 in the example of the operating waveform in FIG. 2, which is effective in reducing the maximum rated voltage and power consumption of the horizontal scanning circuit.

Even when using the operating waveform example in FIG. 3, as mentioned above,
By appropriately changing the voltage v2, halftone display can be easily realized.

FIG. 4 is a block diagram showing a specific implementation example of the horizontal scanning circuit 2 necessary for realizing halftone display in the liquid crystal display device of the embodiment shown in FIG. 7 is a line sequential scanning circuit, 8
is a horizontal scanning shift register, 9 is a 2-frequency divider, 10 is a logic gate, 11 is an analog switch, 12 is a hold capacitor, 13 and 16 are changeover switches, 14 is a buffer amplifier, 15 is an analog polarity inverting amplifier, and 17 is a 18 is a horizontal scanning clock terminal, 18 is a horizontal scanning start terminal, and 19 is a video signal terminal.

For example, when displaying on a TV, horizontal scanning clock terminal 1
A high-speed clock corresponding to the number of horizontal pixels of the liquid crystal panel is inputted to 7, a horizontal scanning start signal synchronized with the horizontal synchronization signal is inputted to the horizontal scanning start terminal 18, and sequential signals corresponding to the number of horizontal pixels are inputted from the shift register 8. Obtain selection signal. Two sample and hold circuits each consisting of an analog switch 11 and a hold capacitor j112 are provided for each column signal electrode Di drive output.
A logic gate 10 and a changeover switch 13 are controlled by a logic signal that is inverted every horizontal scanning period T2 obtained by inputting a horizontal scanning start signal to a frequency divider 9, so that the first system sample hold circuit converts into a shift register. During the horizontal scanning period in which sampling is performed by the sequential selection output of 8, the hold voltage of the second system sample and hold circuit is outputted through the buffer amplifier 14, and in the next horizontal scanning period, the first system outputs and the second system performs sampling. , are replaced every horizontal scanning period. The circuit 7 that operates in this manner is called a line sequential scanning circuit.

On the other hand, an image signal suitably amplified and given a DC component is input to the video signal terminal 19, and a polarity inverting amplifier forms an image signal with the polarity inverted. By obtaining an image signal and inputting it to the line sequential scanning circuit 7, a horizontal scanning circuit 2 capable of displaying halftones can be easily configured.

FIG. 5 is a block diagram showing another specific implementation example of the horizontal scanning circuit 2 that can realize halftone display in the liquid crystal display device of the embodiment shown in FIG. 20 is an A/D converter, 21 is a line memory, 22 is a pulse width modulator, 23 is a changeover switch, and 24 and 25 are voltage application terminals. The difference from the implementation example in Figure 4 is that in the implementation example in Figure 4, analog image signals are applied to the column signal electrodes, whereas in the implementation example in Figure 5, binary image signals are applied by pulse width modulation. The point is that halftone display is achieved by switching and applying voltage. First, we will explain the principle of halftone display using pulse width modulation.
This will be explained using an example of the operation waveforms of the embodiment of FIG. 1 shown in FIG.

FIG. 6, which shows an example of an operating waveform, is shown with the scale in the time axis direction of the example of an operating waveform in FIGS. 2 and 3 enlarged twice. The operating waveform example in Fig. 6 is the operating waveform example in Fig. 3.
The condition V2=V is included, for example, at time t□ and t
A certain time between 2 and 2. The difference in □ is that the potential of the column signal electrode D1 is changed from v3 to O. The driving waveforms of the row scanning electrodes G and HL are similar to those of the embodiments shown in FIGS. 2 and 3.

If the time from time t1 to time t4° is τ1, the effective voltage v applied to the liquid crystal cell L in the first row and first column is
1□' is given by the following formula, and by changing it, ■□,' is within the range shown below. As explained about halftone display, halftone display can also be done by pulse width modulation. It is possible.

Next, the operation will be described with reference to FIG. 5, which is a specific example of realizing the horizontal scanning circuit 2 using the pulse width modulation method. An analog image signal is applied to the video signal terminal 19, converted into a digital image signal by an A/D converter 20, and then added to a line memory 21, storing digital image signals for one horizontal scanning period. The signal is applied to the pulse width modulator 22 according to the number of column signal electrodes. On the other hand, voltage application terminals 24 and 25 each have a potential v3
and O, and by controlling the changeover switch 23 with the output of the pulse width modulator 22, the signal waveform of the column signal electrode D shown in FIG. 6 can be easily formatted.

In this way, since the horizontal scanning circuit can be easily operated using digital signals, it is easy to apply it to high-quality digital TVs, which are expected to become popular in the future. Also,
The expected voltage-luminance characteristics of the input image signal are
A correction circuit (so-called gamma correction circuit) that is required in case of mismatch with the liquid crystal display element may be performed by analog signal processing before passing through the A/D converter 20, or may be performed in line with the A/D converter 20. Digital processing may be performed between the memories 21. Also, a pulse width modulator? It is also possible to realize the second characteristic by making it non-linear.

Another embodiment of the invention is shown in FIG. The difference from the embodiment shown in FIG. 1 is that in the liquid crystal panel 31, each pixel has two
The difference is that each pixel transistor is configured with a different type of transistor, and the second row scanning electrode HL is omitted. That is, NL is a cold type MOS transistor, PL is a P type M
OS transistors are used, and the gates of the transistors in each pixel are connected to the same row scanning electrode GL.

In the embodiment shown in Fig. 1, the two pixel transistors in each pixel were constructed with the same type, so in order to always keep only one transistor in the on state and the other in the off state, the polarities must be reversed. It was necessary to provide two-digit row scanning electrodes for each row, but by using the embodiment shown in FIG.
Since the two transistors are of different types, only one row scanning electrode is required for each row, and the same operation as the embodiment of FIG. 1 can be expected.

In this way, in the embodiment shown in FIG. 6, the number of row scanning electrodes in the embodiment shown in FIG. 1, display characteristics can be improved and costs can be reduced.

Still another embodiment of the present invention is shown in FIG. 8.The difference from the embodiment shown in FIG. The second row scanning electrode Ht is eliminated in the same manner as in the embodiment. Pixel transistor ML,
By making the on-resistance smaller than the on-resistance of , when the row scanning electrode GA is in the selected state and the pixel transistor M L ) is turned on.

When the signal waveform of the column signal electrode is applied to the liquid crystal cell L L and the one-row scanning electrode Gt is in a non-selected state, and the pixel transistor M L is turned off, the non-select potential supply terminal 5 is applied.
The signal waveform of the liquid crystal cell Li
Since the voltage is applied to i, it is obvious that the same operation as in the embodiment of FIG. 1 can be expected. Resistance element RLb does not have to be an ideal resistance element, but can be obtained by connecting the gate and source or drain of an IMOS transistor, for example.
It may be a terminal element or a nonlinear element.

In this way, the embodiment shown in FIG. 7 requires different types of pixel transistors, but the embodiment shown in FIG. 8 requires only a single type of pixel transistor, which has the effect of improving productivity.

〔Effect of the invention〕 As described above, according to one aspect of the present invention.

It is possible to prevent the application of a DC voltage component to the liquid crystal cell of each pixel due to the parasitic capacitance between the gate and source of the MOS transistor, and this has the effect of realizing a liquid crystal display device with good display characteristics and high reliability.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing a liquid crystal display device as an embodiment of the present invention, FIGS. 2 and 3 are signal waveform diagrams of various parts explaining different driving methods of the embodiment of FIG. 1, and FIG. 4 and FIG. 5 are block diagrams showing examples in which the horizontal scanning circuit for displaying halftones in the liquid crystal display device of the embodiment shown in FIG. 1 is implemented using an analog system and a digital system, respectively.
FIGS. 7 and 8 are block diagrams showing a liquid crystal display device according to another embodiment of the present invention, and FIG. 9 is a liquid crystal cell. 3 is a graph showing an example of voltage-luminance characteristics of FIG. 1.31, 32...Liquid crystal panel, 2...Horizontal scanning circuit, 3...Vertical scanning circuit, 4,8...Shift register. 5... Non-selection potential supply terminal, 6... Opposing common electrode,
D. ...First column signal electrode yG)...First first row scanning electrode. H, . . . second first row scanning electrode g ML,, FL r
eNL keP L )...Pixel transistor, LA
,...first row, first column liquid crystal cell, Shk...second row, first column pixel drive electrode, 7...line sequential scanning circuit, 9...
2 frequency divider, 15... polarity inversion amplifier, 20... A/
D converter, 21... Line memory, 22... Pulse width modulator, RL)... Resistance element. U) \0 Kudzu 2 figure

Claims (1)

[Claims] 1. A liquid crystal element as a pixel is arranged at each intersection of a matrix constituted by row scanning electrodes and column scanning electrodes, and
M as a switching element for driving the liquid crystal for each liquid crystal element
A liquid crystal display panel is constructed by arranging OS transistors, connecting the gates of each of the MOS transistors to row scanning electrodes, connecting the drains to column scanning electrodes, and connecting the sources to liquid crystal drive electrodes of liquid crystal elements. In the liquid crystal display device, an element for supplying a non-selection potential to a liquid crystal drive electrode of a corresponding liquid crystal element when the MOS transistor is off is provided between the liquid crystal drive electrode of the liquid crystal element and a non-selection potential supply source. A liquid crystal display device featuring: 2. In the liquid crystal display device according to claim 1, the non-selective potential supply element has a gate connected to a second row scanning electrode having a signal polarity opposite to that of the row scanning electrode, and a drain connected to the second row scanning electrode. a second M connected to the liquid crystal driving electrode of the liquid crystal element and having a source connected to the non-selective potential supply source;
A liquid crystal display device comprising an OS transistor. 3. In the liquid crystal display device according to claim 1, the non-selective potential supply element is a second MOS transistor whose channel type is different from that of the MOS transistor, and whose gate is connected to the row. the second MOS, which is connected to the scanning electrode, has a drain connected to the liquid crystal drive electrode of the liquid crystal element, and a source connected to the non-selection potential supply source;
A liquid crystal display device characterized by being composed of transistors.