JPH07312710A - Head separate type ccd camera head - Google Patents

Abstract

PURPOSE:To reduce the cost without degrading image quality while using a single coaxial cable by providing a required function means to a camera head section so as to clamp a reference level signal in a CCD output signal to a prescribed level and giving the clamped signal to a signal processing section. CONSTITUTION:A power supply isolation means 17 of a camera head section 10 supplies DC power from a signal processing section 60 to each circuit. A drive pulse generator 14 outputs various clock pulses and clamp pulses to drive a CCD 411 based on a reference frequency signal from an oscillator 21, a clamp circuit 25 clamps a reference level signal to be a prescribed level to obtain a signal from which a KTC noise is eliminated. Then a signal mixture means 31 superimposes a drive timing signal and a clock synchronizing signal onto the clamped signal, and the superimposed signal is fed to a signal processing section 60 through a single coaxial cable 51. Thus, the camera head and the signal processing section are interconnected by the single coaxial cable without incurring deterioration in image quality due to the KTC noise.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a head separation type CCD having a small camera head for use in an endoscope or the like, in which a camera head section and a signal processing section are separated via a cable.
It's about the camera.

[0002]

2. Description of the Related Art Today, two-dimensional solid-state image pickup devices (hereinafter simply referred to as C
In a television camera using a CD (hereinafter referred to as a CD), the camera head is separated from the signal processing unit so that the camera head unit is small in size and arranged in a narrow space, or is used as an endoscope or the like. Such a head-separated type CCD camera, as shown in FIG.
10, power supply circuit 61, oscillator 63, synchronization signal generator
The video signal processing circuit 69 using the 64 and the image sensor drive pulse generator 67 and the signal processing integrated circuit is a signal processing unit 60 separate from the camera head unit 10, and the camera head unit 10 and the signal processing unit 60 are combined. In addition to the power supply line 53 and the CCD output signal line 54, the CCD 11
Which are connected by a horizontal drive pulse signal line 55, a vertical drive pulse signal line 56, and a reset pulse signal line 57 for driving the camera head, and as shown in FIG. The signal processing unit 60 includes a power supply circuit unit 61, an oscillator 63, a synchronization signal generator 64, and a video signal processing circuit 69.
53, reference clock signal line 58 from oscillator 63, sync signal line 59 from sync signal generator 64, and CC from CCD 11
The D output signal line 54 connects the camera head unit 10 and the signal processing unit 60.

[0003]

As described above, the CCD output signal line from the camera head section to the signal processing section is connected to the CCD.
In the case of sending the output signal of, the video data signal output from the CCD is, as shown in A of FIG. 12, a video level signal VD having a signal level VT corresponding to the amount of received light from the reference level signal SV for each pixel. However, even if the reference level signal SV should ideally be maintained at a constant reference level VA, the reset noise VX called KTC noise will be included.

When the length of the CCD output signal line becomes long, the high frequency component is weakened due to the attenuation in the CCD output signal line, so that the CCD output signal input to the signal processing unit is distorted as shown in B of FIG. Is a signal that occurs.
As described above, since the reference level signal SV including the reset noise VX called KTC noise is included in the reference level for each pixel, the ideal CCD output signal as shown in FIG. Then, even if the reference level signal SV that should be the reference level VA in the video data signal contains the reset noise VX, the signal level VT of the pixel on which the same light amount is incident becomes constant, so that correlated double sampling or the like is performed. Although a video signal from which KTC noise has been removed can be formed by the above method, in the case of a signal in which distortion as shown in B of FIG. Even if there is, the signal level Vn1 of one pixel and the signal level Vn2 of another pixel are not the same due to the level of the reset noise VX, and the reproduced video signal is not captured by each pixel. Different from the now slightly and video has, the line length of the CCD output signal lines are longer, this C
The SN ratio of the video signal formed from the video data signal which is the CD output signal is deteriorated, and there is a drawback that it is difficult to reproduce a clear image.

Further, the camera head portion composed of only the CCD or the CCD and the image pickup element driving pulse generator is
Although it is easy to reduce the size of the camera head section, many signal lines are required for connecting the camera head section and the signal processing section, and a reference clock signal line, a CCD output signal, and a CCD driving signal are required. Various pulse signal lines need to be coaxial cables because the transmission signals are high frequency signals,
Such a composite cable connecting the camera head section and the signal processing section has a drawback that the structure is complicated and the cost is high.

[0006]

According to the present invention, in addition to a CCD and an image pickup device driving pulse generator, a power source separating means and an oscillator are provided.
And a clamp circuit for clamping a reference level signal at the CCD output, and a signal mixing means for superimposing a clock synchronization signal and a drive timing signal from the pulse generator on the output signal of the CCD, which is a camera head section. The unit and the signal processing unit are connected by a single coaxial cable.

Further, in addition to providing a CCD and an image pickup device driving pulse generator, a power source separating means and a clamp circuit, a phase-locked loop type oscillator which synchronizes with a clock synchronizing signal transmitted from a signal processing section through a single coaxial cable is used as a clock. In some cases, a synchronizing signal separating circuit for separating the driving timing signal is provided as the reproducing means.

[0008]

[Operation] Since the present invention is a camera head section having a CCD, an image pickup element drive pulse generator, a power supply separating means for supplying electric power, and an oscillator, the CCD can be correctly operated only by the camera head section. The clamp circuit can clamp the level of the reference level signal to remove the KTC noise in the CCD output signal.

The signal mixing means superimposes the clock synchronization signal and the drive timing signal on the output signal of the CCD, so that the C including the reference level signal and the video level signal
A high-frequency signal including a clock synchronization signal and a drive timing signal is output from the CD head as a high-frequency signal from the camera head section, and a single cable using the same signal line as DC power is used to provide video data and essential information for signal processing to the signal processing section. Can be transmitted.

In the case where the phase-locked loop oscillator is provided in the camera head section, the reference frequency signal used as the clock of the image pickup element drive pulse generator is synchronized with the clock synchronization signal output from the signal processing section to the single cable. It is possible to control the CCD by adjusting the operation timing of the CCD by extracting the drive timing signal which the signal processing unit outputs to the single cable by the synchronization signal separation circuit. It is possible to output a high frequency signal including a reference level signal and a video level signal to be output to a single cable common to DC power.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As shown in FIG. 1, an embodiment of a camera head portion of a head-separated CCD camera according to the present invention outputs a CCD 11 as a two-dimensional solid-state image pickup device and various clock pulses for driving the CCD 11. Image sensor drive pulse generator
14, an oscillator 21 for outputting a reference frequency signal to the image sensor drive pulse generator 14, and the image sensor drive pulse generator
Clamp circuit 25 that clamps the reference level signal in the output signal of CCD 11 by the clamp pulse output by 14
And a signal mixing means 31 for superposing the drive timing signal and the clock synchronization signal output from the image pickup device drive pulse generator 14 on the output signal of the CCD 11 via the clamp circuit 25.
And a power source separating means 17 further.

The power source separating means 17 is composed of a low-pass filter 18 and a regulator 19, and the DC power output from the signal processing section 60 to the single coaxial cable 51 is used as a constant voltage for each means and circuit of the camera head section 10. Is to be supplied to. Further, the image pickup device drive pulse generator 14 outputs the transfer gate pulse, the transfer clock pulse, the read clock pulse, etc. necessary for driving the CCD 11 to the CCD 11 according to the format of the CCD 11, and also outputs them to the CCD 11. A clamp pulse that matches the timing of the reference level signal in the signal output by the CCD 11 according to the clock pulse is output to the clamp circuit 25, and the output timing of the video output signal in the CCD 11 is indicated according to the clock pulse that is output to the CCD 11. The drive timing signal and the clock synchronization signal representing the frequency and phase of the reference frequency signal for giving the reference timing of the image pickup device drive pulse generator 14 are output to the signal mixing means 31.

Then, the clamp circuit 25 uses a synchronous clamp circuit to clamp the reference level signal in the video data signal output from the CCD 11 shown in FIG. 2A by using the clamp pulse shown in FIG. 2B. As shown in FIG. 2C, the reference level signal SV is fixed to a constant level, and the signal mixing means 31 outputs the image pickup device drive pulse generator 14 to the output signal of the CCD 11 via the clamp circuit 25. The drive timing signal and the clock synchronization signal are superposed, or the adder 33 adds the drive timing signal and the clock synchronization signal to the CCD output signal.

The drive timing signal and the clock synchronization signal added to the output signal of the CCD 11 by the signal mixing means 31 are formed by the required number of pulse signals synchronized with the clock pulse output from the image pickup device drive pulse generator 14 to the CCD 11. As shown in FIG. 3, for example, as shown in FIG. 3, eight pulses serving as a reference for starting a frame are used as a drive timing signal A, and horizontal blanking is performed in accordance with a horizontal blanking period delayed by a predetermined time from the drive timing signal A. 7 pulses are output during the period to be the clock synchronization signal B, and the pulses of the drive timing signal A and the clock synchronization signal B synchronized with the clock pulse are used when performing signal processing of the CCD output signal. This signal is added to the output signal of CCD 11 as a signal indicating the phase of the clock, and this signal mixing The signal output from the means 31 is output to the single coaxial cable 51 to the signal processing unit 60 via the buffer 37, the impedance matching resistor 38 and the coupling capacitor 39.

Therefore, the single coaxial cable 51 is supplied with the power for the DC component, the CCD output signal containing the video data signal, and the high frequency signal containing the drive timing signal and the signal component of the clock synchronization signal. Book coaxial cable
At 51, all data necessary for forming power and video signals can be transmitted between the camera head unit 10 and the signal processing unit 60, and the image sensor drive pulse generator 14, the clamp circuit 25, and the signal mixing unit 31. Etc. are a few transistors and resistors,
Since it can be configured with a condenser or the like, the size of the camera head unit 10 can be easily kept small.

The signal processing unit 60 for reproducing a high frequency CCD output signal and a CCD drive clock signal and drive timing signal to form a video signal, as shown in FIG.
It is assumed that DC power is supplied to the single coaxial cable 51 from the power supply circuit unit 61 that supplies power to each means and circuit of the signal processing unit 60 through the power supply unit 62, and the timing signal separation circuit
The drive timing signal and the clock synchronization signal are extracted by 71, the clock synchronization signal and the drive timing signal are separated by the synchronization signal separation circuit 73, and extracted by the synchronization signal separation circuit 73 by the clock regeneration means 75 using the phase locked loop circuit. By comparing the clock synchronizing signal and the reference frequency signal oscillated by the clock reproducing means 75 with the phase comparator 76, the reference frequency signal whose frequency and phase have been adjusted is output from the phase locked loop oscillator 77 as the clock signal. The signal is reproduced, and further, the signal processing pulse generating circuit 68 forms a signal processing pulse based on the drive timing signal separated by the synchronizing signal separating circuit 73 and the clock signal from the clock reproducing means 75. The processing pulse is sent to the video signal processing circuit 69, and the video signal processing circuit 69 uses the single coaxial cable 5 The DC component is removed from the signal from 1 and the CCD output signal is subjected to signal processing such as detection to form a video signal.

In the above embodiment, the camera head unit 10 having the unique oscillator 21 is used. However, the oscillator 21 for forming the reference frequency signal to the image pickup device driving pulse generator 14 is used as the signal processing unit. Even in a head-separated type camera that is provided in 60 and controls a plurality of camera heads 10 in synchronization, each camera head 10 and the signal processing unit 60 should be a camera head 10 that can be connected by a single coaxial cable. You can also

In the second embodiment, for example, as shown in FIG. 5, a sync reference signal for forming a drive timing signal and a clock sync signal based on a high frequency reference frequency signal output from an oscillator 63 to a signal processing unit 60. A signal processing unit 60 that outputs the drive timing signal and the clock synchronization signal to the single coaxial cable 51 is provided with the generation unit 66, and the external synchronous camera head unit 10 connected to the signal processing unit 60 is used. The signal processing unit 60 has a power supply circuit unit 61 for supplying DC power to the single coaxial cable 51 and a power supply means 62, as in the first embodiment. The drive timing signal and the clock sync signal from the device are output to the single coaxial cable 51 as a sync reference signal via the buffer 86, impedance matching resistor 87, and coupling capacitor 88. Together, the sync reference signal generating means 66 sends a drive timing signal to the signal processing pulse generating circuit 68, the signal processing pulse generating circuit 68, a first
Similar to the embodiment, a signal processing pulse is formed by the drive timing signal and the clock signal which is the reference frequency signal input from the oscillator 63, and the signal processing pulse is sent to the video signal processing circuit 69 for video signal processing. The circuit 69 forms a video signal by performing signal processing on the video data signal obtained by removing the DC component from the signal from the single coaxial cable 51.

The separate type camera head unit 10 in the camera system in which the synchronization reference signals such as the drive timing signal and the clock synchronization signal are output from the signal processing unit 60,
As shown in FIG. 6, in addition to having the power source separating means 17, the CCD 11, the image pickup device driving pulse generator 14 and the clamp circuit 25 as in the first embodiment, a timing signal separating circuit 41 and a synchronizing signal separating circuit 43 are provided. And a clock recovery means 45. The timing signal separation circuit 41 extracts the drive timing signal and the clock synchronization signal, and further the synchronization signal separation circuit 43.
Separate the clock synchronization signal and drive timing signal with
A phase comparator 46 compares the clock synchronizing signal extracted by the synchronizing signal separating circuit 43 by the clock reproducing means 45 using a phase locked loop circuit and the signal oscillated by the clock reproducing means 45.
The clock signal whose frequency and phase have been adjusted is output from the phase-locked loop oscillator 47 while making a comparison to reproduce the clock signal, and the drive timing signal separated by the synchronous signal separation circuit 43 and the clock reproduction means 45. Based on the clock signal of
The transfer gate pulse, the transfer clock pulse, the read clock pulse, and the like are output to the CD 11, and the clamp pulse is output to the clamp circuit 25, as in the first embodiment.

When the external synchronous type camera head 10 for outputting the synchronous reference signal from the signal processing unit 60 is used, if the cable length of the single coaxial cable 51 becomes long, the video signal processing circuit 69 causes the single coaxial cable to be used. When the video data signal from 51 is processed by the signal processing pulse from the signal processing pulse generation circuit 68 to form a video signal, a deviation occurs between the timing of the video data signal and the timing of the signal processing pulse. In some cases, an image may not be formed in the video signal obtained by the processing.

Therefore, when the external synchronous type camera head section 10 using the single coaxial cable 51 having a long cable length is used, the image sensor drive pulse generator 15 to the signal mixing means.
The video timing signal may be output to 32, and the signal mixing means 32 may be added so that the video timing signal is superposed on the output from the clamp circuit 25 by the signal mixing means 32 (see FIG. 7).

As the video timing signal, as shown in FIG. 8, a large number of pulse signals having a predetermined time delay from the drive timing signal A and arranged within the vertical blanking period at a predetermined timing. The signal processing unit 60, which is used as the video timing signal C, is connected to the camera head unit 10 that outputs a signal including the video timing signal C.
As shown in FIG. 9, the synchronization reference signal generating means 66 and the buffer
A phase pixel timing adjusting means 81 is provided between the sync reference signal generating means 66 and the drive timing signal output to the phase pixel timing adjusting means 81 from the sync reference signal generating means 66, and the sync reference signal generating means 66 outputs to the signal processing pulse generating circuit 68. The drive timing signal to be driven is slightly delayed, and the drive timing signal and the clock synchronization signal input from the synchronization reference signal generation means 66 are set to be delayed in advance and output to the buffer 86. The same video timing signal C as the video timing signal C output from the image pickup device drive pulse generator 15 in the camera head unit 10 to the signal mixing means 32 in accordance with the drive timing signal output from the generation means 66 to the signal processing pulse generation circuit 68. A signal is output from the synchronization reference signal generation means 66, and this comparison video timing signal is sent to the phase pixel shift detection means 83. Then, the phase pixel shift detection unit 83 compares the comparison video timing signal from the synchronization reference signal generation unit 66 with the video timing signal included in the signal from the camera head unit 10 to match the timing of both signals. Thus, the delay amount of the drive timing signal and the clock synchronization signal in the phase pixel timing adjusting means 81 is adjusted.

Thus, in this embodiment, the CCD 11 and the C
An image sensor drive pulse generator 14 that outputs various clock pulses for driving the CD 11 and a clamp pulse that is timed to a reference level signal of the CCD 11, and an oscillator 21 that outputs a reference frequency signal to the image sensor drive pulse generator 14.
A clamp circuit 25 for clamping a reference level signal in the output signal of the CCD 11 by a clamp pulse output from the image sensor drive pulse generator 14, and a drive timing signal and a clock synchronization signal output from the image sensor drive pulse generator 14. Has a signal mixing means 31 for superimposing on the output signal of the CCD 11 and a power source separating means 17, so that it operates by being supplied with DC power from the signal processing section, and the level of the reference level signal is supplied by the clamp circuit. Is clamped to a constant level and outputs a signal from which KTC noise has been removed. Therefore, it is possible to form a video signal for reproducing a clear image even if the coaxial cable length is somewhat long.

Further, the CCD 11, the image pickup element drive pulse generator 14 for outputting various clock pulses and clamp pulses for driving the CCD 11, the timing signal separating circuit 41 and the synchronizing signal separating circuit 43, and the clock reproducing means 45, as well as,
A clamp circuit 25 for clamping the reference level signal in the output signal of the CCD 11 by the clamp pulse output from the image pickup device drive pulse generator 14, and a power source separating means 17
In the camera head unit 10 having, also, the level of the reference level signal is clamped to a constant level by the clamp circuit 25, and a signal from which KTC noise has been removed can be output. Since it becomes possible to form a signal, especially when the length of the coaxial cable is long, by adding the signal mixing means 32 for superimposing the video timing signal, the video timing signal is added to the output signal of the clamp circuit 25 to obtain the signal. By adjusting the timing of the synchronization reference signal in the processing unit 60, it is possible to easily form a video signal for reproducing a clear image.

As the clock reproducing means, not only the case of using the phase locked loop circuit but also the case of reproducing a clock signal of a specific frequency by using an appropriate resonance circuit may be used.

[0026]

The camera head portion according to the present invention is a CCD
Since it has an oscillator, a clamp circuit, and a mixing unit in addition to an image pickup device drive pulse generator, it operates by being supplied with DC power from a signal processing unit, and has a high frequency CCD output signal, a clock synchronization signal, and a drive timing signal. Since it outputs the data to the signal processing unit, the camera head unit can be connected to the signal processing unit with a single coaxial cable.
This has the advantage of not requiring an expensive connection cable, and the CCD output signal output from this camera head unit has a reference level signal clamped at a constant level by a clamp circuit, and outputs a signal with KTC noise removed. Therefore, it is possible to form a video signal for reproducing a clear image even if the length of the coaxial cable is somewhat long.

Further, in the head-separated type camera head in the camera system in which the signal processing unit outputs the synchronization reference signal, the clock generated by the clock reproduction unit by extracting the high-frequency synchronization reference signal by the synchronization signal separation circuit and the clock reproduction unit. The signal can operate the image pickup element drive pulse generator and thus the CCD, and the clamp circuit can output the output signal of the CCD from which the KTC noise is removed with the reference level kept constant. Since the signal is output as it is from the camera head section to the signal processing section, C based on a synchronization reference signal such as a drive timing signal formed in the signal processing section
It is possible to form a video signal for reproducing a clear image by controlling the operation of a CD, and to send a high-frequency video data signal to the signal processing unit through a single coaxial cable common to the power line.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit example of a camera head unit according to the present invention.

FIG. 2 is a diagram showing a signal waveform by signal processing in the camera head unit according to the present invention.

FIG. 3 is a diagram showing an output signal of a camera head unit according to the present invention.

FIG. 4 is a block diagram showing a circuit example of a signal processing unit for performing signal reproduction of the camera head unit according to the present invention.

FIG. 5 is a block diagram showing a circuit example of a signal processing unit that outputs a timing signal.

FIG. 6 is a block diagram showing an example of a circuit of a camera head unit according to the present invention which operates according to a timing signal from a signal processing unit.

FIG. 7 is a block diagram showing an example of a circuit of another embodiment of the camera head section which operates according to a timing signal from a signal processing section.

FIG. 8 is a diagram showing an example of a waveform from a camera head unit in which a timing signal is output from a signal processing unit.

FIG. 9 is a block diagram showing a circuit example of a signal processing unit in another embodiment which outputs a timing signal.

FIG. 10 is a block diagram showing a circuit example of a conventional head separated CCD camera.

FIG. 11 is a block diagram showing another circuit example of a conventional head separated CCD camera.

FIG. 12 is a diagram showing waveforms of signals in a conventional head-separated CCD camera.

[Explanation of symbols]

10 camera head section 11 CCD 13, 14, 15 image sensor driving pulse generator 17 power source separation means 21 oscillator 25 clamp circuit 31, 32 signal mixing means 41 timing signal separation circuit 43 synchronization signal separation circuit 51 single coaxial cable 53 power supply line 54 CCD output signal line 55 Horizontal drive pulse signal line 56 Vertical drive pulse signal line 58 Clock signal line 59 Synchronous signal line 60 Signal processing unit 61 Power supply unit 62 Power supply means 63 Oscillator 66 Synchronous reference signal generation means 67 Image sensor drive pulse generation 68 signal processing pulse generation circuit 69 video signal processing circuit 71 timing signal separation circuit 73 synchronization signal separation circuit 75 clock reproduction means 81 phase pixel timing adjustment means 83 phase pixel deviation detection means

Claims (2)

[Claims] 1. A camera head for a CCD camera in which a signal processing unit and a camera head unit are connected by a single cable, and a two-dimensional solid-state image pickup device, a power source separating unit, and an oscillator for outputting a reference frequency signal, An image sensor drive pulse generator that outputs a transfer pulse, a read pulse, and a clamp pulse based on a reference frequency signal output by the oscillator; and a clamp circuit that clamps a reference level signal in a signal output by a two-dimensional solid-state image sensor, Signal mixing means for superimposing a clock synchronization signal and a drive timing signal output from the image pickup device drive pulse generator on the output signal of the two-dimensional solid-state image pickup device clamped by the clamp circuit and outputting the superimposed signal from the camera head unit. A head-separated CCD camera head characterized in that 2. A camera head for a CCD camera in which a signal processing unit and a camera head unit are connected by a single cable, and a two-dimensional solid-state image pickup device, and a clock synchronization output by a power source separating unit and a signal processing unit. Clock reproduction means for forming a reference frequency signal in synchronization with the signal, a synchronization signal separation circuit for separating the drive timing signal, and a transfer pulse, a read pulse and a clamp pulse based on the reference frequency signal and the drive timing signal. A head-separated CCD camera head, comprising: an image sensor drive pulse generator; and a clamp circuit that clamps a reference level signal in a signal output from a two-dimensional solid-state image sensor and outputs the clamp level from a camera head unit.