JPH07297813A - Line switching device - Google Patents

Abstract

PURPOSE:To provide a line switching device which surely makes data phases of carriers coincide with each other with a simple circuit constitution. CONSTITUTION:Signal processing circuits 19 and 20 give data taken out from phase coincidence circuits 11 and 12 to prescribed processings and detect the degradation in quality of transmission lines of input signals and faults of apparatus to generate and output alarm signals ALM1 and ALM2. A clock selecting circuit 18 selects the clock signal of data of the line of the carrier for which the alarm signal is not inputted. The clock signal selected by the clock selecting circuit 18 is supplied as a reference clock to a timing generation circuit 13 and is converted into a timing signal and is supplied to phase coincidence circuits 11 and 12, and output signal data of synchronous switching circuits 9 and 10 are synchronized by the same timing signal, thereby making data phases of both carriers coincide with each other.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line switching device, and more particularly to a line switching device for a digital radio communication system having a function of matching data phases among a plurality of carriers.

[0002]

2. Description of the Related Art Conventionally, in a digital microwave radio communication system, in order to reduce the influence of the deterioration of the radio line quality, the data signal transmitted in the radio section is transmitted by a plurality of carriers, and the working line and the protection line are It has a redundant configuration with the line, and is provided with a line switching device that switches to the protection line when a line failure occurs on the working line (for example,
JP-A-4-208732).

FIG. 2 is a block diagram showing an example of the above conventional line switching device. Received data (first working system signal) of one working line carrier is supplied from the input terminal 1 to the frame synchronization circuit 5, and received data of the other working line carrier (second working system signal) is input terminal. 2 is supplied to the frame synchronization circuit 6. Further, the reception data (first protection system signal) of one protection line carrier is supplied to the frame synchronization circuit 7 from the input terminal 3, and the reception data (second protection system signal) of the other protection line carrier is supplied. It is supplied to the frame synchronization circuit 8 from the input terminal 4.

The frame synchronization circuits 5 and 6 establish frame synchronization of the input first and second working system signals, respectively, and supply them to the synchronization switching circuits 9 and 10. Similarly, the frame synchronization circuits 7 and 8 establish the frame synchronization of the input first and second standby system signals and supply them to the synchronization switching circuits 9 and 10.

The synchronization switching circuit 9 normally selects the first working system signal from the first working system signal inputted from the frame synchronizing circuit 5 and the first standby system signal inputted from the frame synchronizing circuit 7. However, when a line failure occurs in the working line, the first standby system signal is selected and output. Similarly, the synchronization switching circuit 10 normally selects the second working system signal from the second working system signal input from the frame synchronization circuit 6 and the second standby system signal input from the frame synchronization circuit 8. The second standby system signal is selected and output only when a line failure occurs in the working line.

In order to finally convert the data transmitted by a plurality of carriers into parallel / serial conversion into a single-line data signal, the operation of matching the data phases of the respective carriers is performed as follows. The first working system signal or the first standby system signal extracted from the synchronization switching circuit 9 is supplied to the phase matching circuit 11 and the timing generation circuit 13
Is supplied to. On the other hand, the second working system signal or the second standby system signal extracted from the synchronization switching circuit 10 is supplied to the phase matching circuit 12.

The phase matching circuits 11 and 12 respectively output the output signals of the synchronization switching circuits 9 and 10 based on the timing signal generated in the timing generation circuit 13 using the clock signal in the output signal of the synchronization switching circuit 9 as a reference clock. Do the timing. As a result, the phase matching circuit 1
From 1 and 12, signals whose data phases are matched between the carriers based on the timing signal are extracted and supplied to the signal processing circuits 14 and 15.

The signal processing circuits 14 and 15 respectively perform signal processing such as extraction of additional bits in the input signal. Parallel /
The serial conversion circuit 16 uses these signal processing circuits 14 and 15
The signals taken out in parallel are received as input signals, converted into serial signals, and output to the output terminal 17 as a column of data.

[0009]

However, in the above conventional line switching device, the first working system signal or the first standby system signal extracted from the synchronous switching circuit 9 is fixedly used as the reference clock. Since the data phases of the carriers are the same, both the working line for transmitting the first working signal and the protection line for transmitting the first protection signal cause line quality deterioration and equipment failure. In this case, the non-reference carrier (the second working system signal and the second standby system signal) is also affected, and there is a problem that the phase matching operation and the signal processing operation are not normally performed.

Further, in the above-mentioned conventional line switching device, when the reference carrier is fixedly switched to the working line or the protection line and selected, the quality of the selected line deteriorates, or Even when a device failure occurs, there is a problem that the non-reference carrier is affected and the phase matching operation and the signal processing operation are not normally performed.

The present invention has been made in view of the above points,
An object of the present invention is to provide a line switching device that can surely match the data phase between carriers with a simple circuit configuration.

[0012]

In order to achieve the above-mentioned object, the present invention provides a plurality of frame synchronization circuits which receive a plurality of data signals of respectively different carriers and separately perform frame synchronization, and a plurality of data signals. In addition, a plurality of detecting means for monitoring the quality deterioration and equipment failure of the transmission line and outputting an alarm signal when the quality deterioration or equipment failure is detected, and the detecting means not outputting the alarm signal among the plurality of detecting means are detected. The clock selection circuit that selects the clock signal of the carrier data signal from the output data signal of the frame synchronization circuit, and the phase of the multiple data signals that are output from each of the multiple frame synchronization circuits based on the output clock signal of the clock selection circuit. And a phase matching means for matching.

[0013]

According to the present invention, the timing signal for making the phases of a plurality of data signals of different carriers by the phase matching means clock the clock signal of the data signal of the carrier detected by the detection means that does not output the alarm signal. Since it is selected and generated by the selection circuit,
It is possible to use the clock signal of the data signal of the carrier, which always has good line quality and has no equipment failure, as the reference clock (timing signal) for the phase matching circuit.

[0014]

EXAMPLES Next, examples of the present invention will be described. FIG. 1 shows a block diagram of an embodiment of a line switching apparatus according to the present invention. 2, those parts which are the same as those corresponding parts in FIG. 2 are designated by the same reference numerals, and a description thereof will be omitted. In FIG. 1, circuits, signal lines and the like which are not particularly important are omitted from the illustration.

This embodiment is different from the conventional line switching device shown in FIG. 2 in that the output data signals of the synchronous switching circuits 9 and 10 and the alarm signals ALM1 and ALM2 are applied, respectively.
Synchronous switching circuit 9 according to the alarm signals ALM1 and ALM2
And a clock selection circuit 18 for selecting one of the output data signals, and the signal processing circuit 19 monitors the quality deterioration and the equipment failure of the transmission line of the input signal of the input terminals 1 and 3, and monitors the quality deterioration or When a device failure is detected, an alarm signal ALM1 is output, and the signal processing circuit 20 monitors the quality deterioration and the equipment failure of the transmission line of the input signals of the input terminals 2 and 4, and when the quality deterioration or the equipment failure is detected, the alarm signal ALM1 is output. It is characterized in that it is configured to output.

Next, the operation of this embodiment will be described.
Similar to the conventional device, the synchronization switching circuit 9 establishes the frame synchronization by the frame synchronization circuit 5 and outputs the working line data (first working system signal) which is output and the frame synchronization circuit 7 establishes the frame synchronization. The protection line data (first protection system signal) that has been output is output, and normally outputs the first working system signal. However, when a line failure occurs on the working line, the first protection system signal is output. Select a signal. When the line failure of the working line is recovered, the first working system signal of the working line is selected again by the synchronization switching circuit 9.

Similarly, the synchronization switching circuit 10 outputs the working line data (second working system signal) which is output after the frame synchronization circuit 6 establishes the frame synchronization and the frame synchronization circuit 8 establishes the frame synchronization. The protection line data (second protection system signal) that has been generated is input, and normally the second protection line signal is input.
However, when the line failure of the working line occurs, the second standby system signal is selected. When the line failure of the working line is recovered, the second working system signal of the working line is selected again by the synchronization switching circuit 10.

The data output from the synchronization switching circuits 9 and 10 respectively correspond to the phase matching circuit 11 provided correspondingly.
And 12 separately supplied to the clock selection circuit 1
8 are commonly supplied. The signal processing circuits 19 and 20 receive the data extracted from the phase matching circuits 11 and 12, respectively, as an input signal, perform the same processing as the conventional one such as the extraction of additional bits on the input signal, and apply the data to the parallel / serial conversion circuit 16. In addition to supply, the quality of the transmission line of the input signal and the presence or absence of equipment failure are monitored based on, for example, the parity bit of the input signal data, and when there is a parity error a predetermined number of times or more in a predetermined frame period, quality deterioration or equipment failure The alarm signal ALM1 or ALM2 is detected as the occurrence of quality deterioration or equipment failure even when the clock loss of the input signal data continues for a predetermined time or more.
Is generated and output.

The alarm signal ALM1 extracted by the signal processing circuit 19 and the alarm signal ALM2 extracted by the signal processing circuit 20 are supplied to the clock selection circuit 18, respectively. The clock selection circuit 18 uses the above alarm signal A.
Of LM1 and ALM2, the clock signal of the transmission data of the line where the alarm signal is not input is selected.

That is, the clock selection circuit 18 selects and outputs the clock signal of the output data of the synchronous switching circuit 10 when the alarm signal ALM1 is input, and the synchronous switching circuit when the alarm signal ALM2 is input. A clock signal of 9 output data is selected and output. When neither of the alarm signals ALM1 and ALM2 is input, all the lines are normal, so that the selected state is maintained (a clock signal of data on a predetermined side may be selected).

In this way, the clock signal selected by the clock selection circuit 18 is the timing generation circuit 1
3 is supplied as a reference clock and converted into a timing signal, and then supplied to the phase matching circuits 11 and 12, respectively, and the synchronous switching circuits 9 and 10 are supplied with the same timing signal.
By retiming both output signal data of
Match the data phase between both carriers.

The data extracted from the phase matching circuits 11 and 12 are separately subjected to the signal processing by the signal processing circuits 19 and 20, and then converted into serial data by the parallel / serial conversion circuit 16 and output terminals. It is output to 17.

As described above, according to the present embodiment, the clock signal of the carrier data, which is always good in line quality and has no equipment failure, is used as the reference clock (timing signal) for the phase matching circuits 11 and 12. Therefore, even if the line or device of one carrier that was the reference has failed, the clock signal of the data of the other carrier will be switched and used as the reference clock, and it will be used by the other carrier. It is possible to easily and surely match the data phases between both carriers without affecting.

The present invention is not limited to the above-mentioned embodiment, and it is needless to say that the present invention can be similarly applied even when the number of carriers is three or more.

[0025]

As described above, according to the present invention,
Since the clock signal of the carrier data signal, which is always good in line quality and has no equipment failure, is used as the reference clock (timing signal) for the phase matching circuit, the line or equipment of the carrier that was the reference has failed. Even if occurs, it is possible to automatically switch and use the clock signal of the data of the other carrier in which the line and the device have not failed, as a reference clock, and therefore always without affecting the other carrier, With a simple circuit configuration,
The data phase between the carriers can be surely matched.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a block diagram of an example of a conventional line switching device.

[Explanation of symbols]

 1 1st active system signal input terminal 2 2nd active system signal input terminal 3 1st standby system signal input terminal 4 2nd standby system signal input terminal 5-8 Frame synchronization circuit 9, 10 Synchronization switching circuit 11, 12 phase matching circuit 13 timing generation circuit 16 parallel / serial conversion circuit 17 output terminal 18 clock selection circuit 19 and 20 signal processing circuit

Claims (2)

[Claims] 1. A plurality of frame synchronization circuits, each of which receives a plurality of data signals of different carriers and separately performs frame synchronization, and monitors the deterioration of quality and equipment failure of the transmission line for each of the plurality of data signals, A plurality of detecting means for outputting an alarm signal when the quality deterioration or the device failure is detected, and a clock signal of a carrier data signal detected by a detecting means which does not output the alarm signal among the plurality of detecting means are provided in the frame. A clock selection circuit for selecting from the output data signals of the synchronization circuit, and a phase matching means for matching the phases of the plurality of data signals respectively output from the plurality of frame synchronization circuits based on the output clock signal of the clock selection circuit. A line switching device having. 2. The data signals of the plurality of carriers are signals transmitted on the working line and the protection line, respectively, and the plurality of frame synchronization circuits are provided for each carrier in pairs, and The data signal of the protection line is separately frame-synchronized with each other, and the data signal of the working line data signal and the protection line data signal extracted from the pair of frame synchronization circuits, whichever has no line failure. 2. The line switching device according to claim 1, further comprising a plurality of synchronous switching circuits for selecting a clock signal and outputting it to the clock selection circuit and the phase matching means.