JPH07297558A - Circuit board and connection method of terminal to circuit board - Google Patents

Circuit board and connection method of terminal to circuit board

Info

Publication number
JPH07297558A
JPH07297558A JP6090850A JP9085094A JPH07297558A JP H07297558 A JPH07297558 A JP H07297558A JP 6090850 A JP6090850 A JP 6090850A JP 9085094 A JP9085094 A JP 9085094A JP H07297558 A JPH07297558 A JP H07297558A
Authority
JP
Japan
Prior art keywords
circuit pattern
circuit board
terminal
land
joining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6090850A
Other languages
Japanese (ja)
Inventor
Kazunari Kuzuhara
一功 葛原
Hiroshi Saito
宏 齋藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP6090850A priority Critical patent/JPH07297558A/en
Publication of JPH07297558A publication Critical patent/JPH07297558A/en
Withdrawn legal-status Critical Current

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  • Multi-Conductor Connections (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Electrical Connectors (AREA)

Abstract

PURPOSE:To prevent the exfoliation of circuit pattern caused by heating in a terminal connection process. CONSTITUTION:A circuit pattern 11 and a through hole 12, with which the circuit pattern 11 and the adjacently located circuit pattern 9 are connected, are provided through an insulating layer 10. Accordingly, by connecting the circuit pattern 11 and the through hole 12, the exfoliation of the circuit pattern 11 when external force is added to a terminal 13 can be prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、回路基板に関するもの
で、特に、端子接合部分の構造及び回路基板への端子接
合方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board, and more particularly to a structure of a terminal connecting portion and a method of connecting a terminal to a circuit board.

【0002】[0002]

【従来の技術】基板上に回路パターンを形成した回路基
板に端子を接合する場合、従来は、例えば、図10に示
すように行われていた。図10(a)は端子の接合工
程、図10(b)は端子接合後の不具合点について説明
するための説明図である。(a)で、1は絶縁材料で構
成された基板、2基板1上に形成された回路パターン、
2aは後述する端子と接合される回路パターンのラン
ド、3は側面視略L字状に形成された端子、4はヒータ
ーである。図10に示す方法は、基板1が良熱伝導性の
材料で構成されている場合に用いられる方法で、回路パ
ターン2のランド2a上に端子3を配置し、基板1をヒ
ーター4で約 100〜 150℃に予熱し、半田5を供給しな
がら半田こて6で約 400℃に数秒間、端子3を加熱及び
加圧してランド2aに端子3を接合するようにしてい
た。
2. Description of the Related Art Conventionally, when a terminal is bonded to a circuit board having a circuit pattern formed on the board, it has been conventionally performed as shown in FIG. FIG. 10A is an explanatory diagram for explaining a terminal joining process, and FIG. 10B is an explanatory diagram for explaining a defect after the terminal joining. In (a), 1 is a substrate made of an insulating material, 2 is a circuit pattern formed on the substrate 1,
2a is a land of a circuit pattern to be joined to a terminal to be described later, 3 is a terminal formed in a substantially L shape in a side view, and 4 is a heater. The method shown in FIG. 10 is a method used when the substrate 1 is made of a material having good thermal conductivity, in which the terminals 3 are arranged on the lands 2a of the circuit pattern 2, and the substrate 1 is heated by the heater 4 to about 100 μm. It was preheated to ˜150 ° C., and while supplying the solder 5, the soldering iron 6 was heated and pressed to about 400 ° C. for several seconds to bond the terminal 3 to the land 2a.

【0003】ところが、上記のように端子3を接合する
と、ランド2aが高温となり、ランド2a近傍の回路パ
ターン2と基板1との密着が弱くなり、ランド2a下方
の接着剤の接着強度が低下して、端子3に外力が加わる
と回路パターン2が、(b)に示すように剥離しやすく
なっていた。
However, when the terminals 3 are joined as described above, the temperature of the land 2a becomes high, the adhesion between the circuit pattern 2 near the land 2a and the substrate 1 becomes weak, and the adhesive strength of the adhesive below the land 2a is lowered. Then, when an external force is applied to the terminal 3, the circuit pattern 2 is easily peeled off as shown in (b).

【0004】層基板において、端子4を接合する部分の
ランド形成は配線の終点に端子接合に必要な大きさにな
るようにされていた。
In the layered substrate, the land formed at the portion where the terminal 4 is joined is made to have a size necessary for terminal joining at the end point of the wiring.

【0005】[0005]

【発明が解決しようとする課題】以上に説明したよう
に、従来の回路基板では、端子3をランド2aに半田付
けした後、端子に引っ張り等の外力が加わった場合、回
路パターンが剥離するという問題点があった。
As described above, in the conventional circuit board, the circuit pattern is peeled off when an external force such as pulling is applied to the terminal 3 after the terminal 3 is soldered to the land 2a. There was a problem.

【0006】本発明は上記課題に鑑みなされたもので、
その目的とするところは、端子接合工程での加熱に起因
する回路パターン剥離を防止できる回路基板の構造及び
回路基板への端子接合方法を提供することにある。
The present invention has been made in view of the above problems,
An object of the invention is to provide a structure of a circuit board and a method of bonding the terminal to the circuit board, which can prevent the peeling of the circuit pattern due to heating in the terminal bonding step.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するた
め、請求項1記載の回路基板は、回路パターンを絶縁層
を介して複数積層した基板であって、最上部に形成され
た第1層回路パターンの端子接合用のランドの近傍に、
前記第1層回路パターンと、前記第1層回路パターンと
前記絶縁層を介して隣接する第2層回路パターンとを接
合するスルーホールを形成したことを特徴とするもので
ある。
In order to achieve the above object, a circuit board according to claim 1 is a board in which a plurality of circuit patterns are laminated with an insulating layer interposed therebetween, and a first layer formed on the uppermost part. In the vicinity of the land for joining the terminals of the circuit pattern,
A through hole for joining the first layer circuit pattern and the second layer circuit pattern adjacent to the first layer circuit pattern via the insulating layer is formed.

【0008】また、請求項2記載の回路基板への端子接
合方法は、半田濡れ性の良好な材料で構成された溶接電
極を、基板上に形成された回路パターンの端子接合用の
ランド上に半田付けする工程と、前記溶接電極上に端子
を溶接する工程とを有することを特徴とするものであ
る。
According to a second aspect of the present invention, there is provided a method of joining terminals to a circuit board, wherein a welding electrode made of a material having good solder wettability is provided on a land for joining terminals of a circuit pattern formed on the board. It has a step of soldering and a step of welding a terminal on the welding electrode.

【0009】[0009]

【作用】請求項1記載の回路基板は、回路パターンを絶
縁層を介して複数積層した基板であって、最上部に形成
された第1層回路パターンの端子接合用ランドの近傍
に、第1層回路パターンと、第1層回路パターンと絶縁
層を介して隣接する第2層回路パターンとをスルーホー
ルを介して接合したので、第1層回路パターンの剥離強
度が高くなる。つまり、回路パターンの端子接合用のラ
ンドの面積を広くして、そのランド上の端子接合に支障
のない位置にスルーホールを形成することで、半田付け
後に端子に引っ張り方向に力が加わっても、スルーホー
ルが回路パターンの基板への接着力を高め、回路パター
ンの剥離を防ぐ。
A circuit board according to a first aspect of the present invention is a circuit board in which a plurality of circuit patterns are laminated with an insulating layer interposed therebetween, and the first board is provided near the terminal bonding land of the first layer circuit pattern formed on the uppermost part. Since the layer circuit pattern and the second layer circuit pattern which is adjacent to the first layer circuit pattern via the insulating layer are joined via the through holes, the peel strength of the first layer circuit pattern is increased. In other words, by increasing the area of the land for terminal bonding of the circuit pattern and forming the through hole at a position on the land that does not hinder terminal bonding, even if force is applied to the terminal in the pulling direction after soldering. The through holes enhance the adhesion of the circuit pattern to the substrate and prevent the circuit pattern from peeling.

【0010】請求項2記載の回路基板は、端子接合用の
ランドに予め溶接電極(CuにNiメッキを施したもの等の
半田濡れ性及び導電性の良い材料)を半田付けすると共
に、その溶接電極と端子とを溶接により接続したもので
あるので、ランド近傍が端子接合時に高温にならず、回
路パターンが基板から剥がれにくくなる。
In a circuit board according to a second aspect, a welding electrode (a material having good solder wettability and conductivity such as Cu plated with Ni) is soldered to a land for joining terminals, and the welding is performed. Since the electrode and the terminal are connected by welding, the temperature in the vicinity of the land does not become high at the time of joining the terminal, and the circuit pattern does not easily peel off from the substrate.

【0011】[0011]

【実施例】本発明の回路基板の一実施例を図1に基づい
て説明する。図1は回路基板の端子接合部分の構造を示
す断面図である。図で、回路基板は、基板であるAl製の
ベース基板7の上に絶縁層8を形成し、その絶縁層8上
に第2層回路パターンである回路パターン9を形成した
後、さらに、その上部に絶縁層10、第1層回路パター
ンである回路パターン11を形成し、回路パターン11
の端子接合用のランド11aの下部付近に、回路パター
ン9と回路パターン11とを接合するスルーホール12
を形成したものである。このように構成されることによ
って、半田14によりランド11aに接合された側面視
略L字状の端子13に外力が加わっても回路パターン1
1が剥離しにくくなる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the circuit board of the present invention will be described with reference to FIG. FIG. 1 is a sectional view showing the structure of a terminal joint portion of a circuit board. In the figure, the circuit board has an insulating layer 8 formed on a base substrate 7 made of Al which is a substrate, and a circuit pattern 9 which is a second layer circuit pattern formed on the insulating layer 8 and then The insulating layer 10 and the circuit pattern 11, which is the first layer circuit pattern, are formed on the upper portion, and the circuit pattern 11 is formed.
Through hole 12 for joining the circuit pattern 9 and the circuit pattern 11 near the lower portion of the land 11a for joining terminals
Is formed. With this structure, even if an external force is applied to the terminal 13 that is joined to the land 11a by the solder 14 and is substantially L-shaped in a side view, the circuit pattern 1 is formed.
1 becomes difficult to peel off.

【0012】図2に基づいて、本発明の回路基板の異な
る実施例について説明する。図2は片面に回路パターン
を形成した基板上に、両面に回路パターンを形成した両
面ガラエポ基板を接着した回路基板の一実施例を示す断
面図である。図2で、回路基板は、基板であるAl製のベ
ース基板15上に絶縁層16を形成し、その絶縁層16
上に第2層回路パターンである回路パターン17を形成
した基板の上に、ガラエポ基台18の両面に第2層回路
パターンとなる下層回路パターン19または上層回路パ
ターン20を形成した両面ガラエポ基板を接着したもの
である。また、回路パターン20の端子接合用のランド
20aの近傍には、回路パターン17と回路パターン2
0とを接合するスルーホール21が形成されている。
A different embodiment of the circuit board of the present invention will be described with reference to FIG. FIG. 2 is a cross-sectional view showing an embodiment of a circuit board in which a double-sided glass epoxy substrate having circuit patterns formed on both sides is bonded onto a substrate having a circuit pattern formed on one side. In FIG. 2, the circuit board has an insulating layer 16 formed on an Al base substrate 15 which is a substrate.
A double-sided glass epoxy substrate in which a lower layer circuit pattern 19 or an upper layer circuit pattern 20 to be the second layer circuit pattern is formed on both sides of the glass epoxy base 18 on the substrate on which the circuit pattern 17 which is the second layer circuit pattern is formed. It is glued. In addition, the circuit pattern 17 and the circuit pattern 2 are provided in the vicinity of the land 20a for joining the terminals of the circuit pattern 20.
A through hole 21 is formed to join with 0.

【0013】本発明の回路基板のさらに異なる実施例を
図3に示す。図3は回路基板の表面構造を示す平面図
で、図において、22は絶縁層、23は第1層回路パタ
ーンである回路パターン、23aは端子接合用のランド
である。また、24はランド23aの外縁部下部に形成
されたスルーホールである。このように、スルーホール
24を複数個形成することによってさらに効果を高める
ことができる。
A further different embodiment of the circuit board of the present invention is shown in FIG. FIG. 3 is a plan view showing the surface structure of the circuit board. In the figure, 22 is an insulating layer, 23 is a circuit pattern which is a first layer circuit pattern, and 23a is a land for terminal bonding. Further, 24 is a through hole formed in the lower portion of the outer edge of the land 23a. As described above, the effect can be further enhanced by forming a plurality of through holes 24.

【0014】また、図1に示した回路基板で、スルーホ
ールを図4に示すように、端子接合用のランド11aの
直下の位置に形成すればスルーホール12形成による回
路基板上の実装面積の減少を防止することができる。さ
らに、図3に示した回路基板で、回路パターンの外縁部
に形成したスルーホール24の代わりに、図5に示すよ
うに、ランド23aの端子接合位置23bの前後にスル
ーホール25を形成するようにして剥離強度を高めるこ
ともできる。
Further, in the circuit board shown in FIG. 1, if the through hole is formed immediately below the land 11a for joining the terminals as shown in FIG. 4, the mounting area on the circuit board by forming the through hole 12 is reduced. The decrease can be prevented. Further, in the circuit board shown in FIG. 3, instead of the through hole 24 formed at the outer edge of the circuit pattern, as shown in FIG. 5, through holes 25 are formed before and after the terminal joining position 23b of the land 23a. It is also possible to increase the peel strength.

【0015】また、図6に示すように、絶縁層26上に
形成された回路パターン27の略四角形状のランド27
aの四隅にスルーホール28を形成するように構成して
も剥離強度を高めることができる。
Further, as shown in FIG. 6, a land 27 having a substantially rectangular shape of a circuit pattern 27 formed on the insulating layer 26.
The peel strength can be increased by forming the through holes 28 at the four corners of a.

【0016】図7に本発明のさらに異なる実施例を示
す。図7に示す回路基板は、基板29上に導通路として
使用する回路パターン30の他に、絶縁層31上に形成
された第1層回路パターンである回路パターン32の剥
離を防止するためだけに、第2層回路パターンとなる回
路パターン33(ダミーの回路パターン)をランド32
aの下方に設け、回路パターン33とランド32a間に
スルーホール34を形成して、回路パターン32の剥離
強度を高めたものである。
FIG. 7 shows a further different embodiment of the present invention. The circuit board shown in FIG. 7 is provided only for preventing the peeling of the circuit pattern 32, which is the first layer circuit pattern formed on the insulating layer 31, in addition to the circuit pattern 30 used as a conductive path on the substrate 29. , The circuit pattern 33 (dummy circuit pattern) which becomes the second layer circuit pattern is formed on the land 32.
The through hole 34 is formed below the circuit pattern 33 and between the circuit pattern 33 and the land 32a to enhance the peel strength of the circuit pattern 32.

【0017】図8に基づいて、本発明の回路基板のさら
に異なる実施例について説明する。図8で、35は基
板、36は絶縁層、37は回路パターン、37aは端子
接合用のランド、38は半田、39は半田濡れ性及び導
電性の良好な材料で構成された溶接電極、40は端子、
41はヒーターである。
A different embodiment of the circuit board of the present invention will be described with reference to FIG. In FIG. 8, 35 is a substrate, 36 is an insulating layer, 37 is a circuit pattern, 37a is a land for joining terminals, 38 is solder, 39 is a welding electrode composed of a material having good solder wettability and conductivity, 40 Is a terminal,
41 is a heater.

【0018】次に、図8に示した回路基板に端子を接合
する方法を図9に基づいて説明する。まず、(a)に示
すように、 2〜 3mm厚のAl製の基板35上に100 〜 200
μmの絶縁層36を形成し、その上に約 100μm の銅箔
の回路パターン37を形成した回路基板で、半田38を
スクリーン印刷により端子接合用のランド37a及びそ
の他の実装部品42の半田付け用ランド(符号省略)に
塗布し、その後、例えば、CuにNiメッキを施し半田濡れ
性をよくした溶接電極39、実装部品42をそれぞれの
所定の位置に配置し半田接合を行う。次に、(b)に示
すように、溶接電極39と端子40に電源43からの電
極43a,43bをそれぞれ接続し、溶接電極39と端
子40間に電流を流して、そのジュール熱で局部的に約
1000℃に上げて溶接電極39と端子40を溶接する。以
上に説明した方法により端子接合を行うことによって、
端子接合用のランド37aの温度上昇を抑えることがで
きるので、回路パターン37の絶縁層36への密着力の
低下、回路パターン37の剥離を防止することができ
る。また、溶接電極は、他の実装部品と同時にリフロー
にて回路基板に接続できるので、余分な工程が増加する
こともない。
Next, a method of joining terminals to the circuit board shown in FIG. 8 will be described with reference to FIG. First, as shown in (a), 100 to 200 is placed on an Al substrate 35 having a thickness of 2 to 3 mm.
A circuit board on which an insulating layer 36 of μm is formed, and a circuit pattern 37 of copper foil of about 100 μm is formed on the insulating layer 36. Solder 38 is used by screen printing to solder lands 37a for terminal connection and other mounting components 42. It is applied to a land (reference numeral omitted), and thereafter, for example, a welding electrode 39 and a mounting component 42, which have Ni plating on Cu to improve solder wettability, are arranged at respective predetermined positions, and solder joining is performed. Next, as shown in (b), the electrodes 43a and 43b from the power source 43 are connected to the welding electrode 39 and the terminal 40, respectively, a current is passed between the welding electrode 39 and the terminal 40, and the Joule heat locally causes the current to flow. About
The temperature is raised to 1000 ° C. and the welding electrode 39 and the terminal 40 are welded. By joining the terminals by the method described above,
Since the temperature rise of the land 37a for joining terminals can be suppressed, it is possible to prevent the adhesion of the circuit pattern 37 to the insulating layer 36 from decreasing and the peeling of the circuit pattern 37 from occurring. Further, since the welding electrode can be connected to the circuit board by reflow at the same time as other mounting components, an extra step is not added.

【0019】なお、回路パターン及び溶接電極の形状は
実施例に限定されない。また、スルーホールを設ける位
置も実施例に限定されない。
The circuit patterns and the shapes of the welding electrodes are not limited to those in the embodiment. Further, the position where the through hole is provided is not limited to the example.

【0020】[0020]

【発明の効果】以上のように、請求項1記載の回路基板
によれば、端子と接合される回路パターンとスルーホー
ルを接合したことにより、端子に外力が加わった場合の
回路パターンの剥離を防止することができる。
As described above, according to the circuit board of the first aspect, by peeling off the circuit pattern when an external force is applied to the terminal, by bonding the circuit pattern bonded to the terminal and the through hole. Can be prevented.

【0021】また、請求項2記載の回路基板への端子接
合方法によれば、回路パターンのランドと溶接電極を半
田により接合し、端子と溶接電極を溶接により接合する
ので、接合時のランドの温度上昇を抑えることができ、
回路パターンの剥離を防止することができる。
According to the method of joining terminals to the circuit board of the second aspect, the land of the circuit pattern and the welding electrode are joined by solder, and the terminal and the welding electrode are joined by welding. The temperature rise can be suppressed,
It is possible to prevent peeling of the circuit pattern.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の回路基板の一実施例を示す断面図であ
る。
FIG. 1 is a cross-sectional view showing an embodiment of a circuit board of the present invention.

【図2】本発明の回路基板の異なる実施例を示す断面図
である。
FIG. 2 is a cross-sectional view showing another embodiment of the circuit board of the present invention.

【図3】本発明の回路基板のさらに異なる実施例を示す
断面図である。
FIG. 3 is a sectional view showing a further different embodiment of the circuit board of the present invention.

【図4】本発明の回路基板のさらに異なる実施例を示す
断面図である。
FIG. 4 is a sectional view showing still another embodiment of the circuit board of the present invention.

【図5】本発明の回路基板のさらに異なる実施例を示す
断面図である。
FIG. 5 is a sectional view showing still another embodiment of the circuit board according to the present invention.

【図6】本発明の回路基板のさらに異なる実施例を示す
断面図である。
FIG. 6 is a sectional view showing still another embodiment of the circuit board of the present invention.

【図7】本発明の回路基板のさらに異なる実施例を示す
断面図である。
FIG. 7 is a sectional view showing still another embodiment of the circuit board of the present invention.

【図8】本発明の回路基板への端子接合方法を用いて構
成した回路基板の一実施例を示す断面図である。
FIG. 8 is a cross-sectional view showing an embodiment of a circuit board configured by using the method of joining terminals to the circuit board of the present invention.

【図9】本発明の回路基板への端子接合方法の一実施例
を示す断面図である。
FIG. 9 is a cross-sectional view showing an example of a method of joining terminals to a circuit board according to the present invention.

【図10】従来の回路基板への端子接合方法の一例を示
す断面図である。
FIG. 10 is a cross-sectional view showing an example of a conventional method of joining terminals to a circuit board.

【符号の説明】[Explanation of symbols]

11,20a,23,27,32 第
1層回路パターン 10,18,31 絶
縁層 11a,20a,23a,27a,32a,37a ラ
ンド 9,17,33 第
2層回路パターン 12,21,25,28,34 ス
ルーホール 39 溶
接電極 35 基
板 37 回
路パターン 37a ラ
ンド 40 端
11, 20a, 23, 27, 32 First layer circuit pattern 10, 18, 31 Insulating layer 11a, 20a, 23a, 27a, 32a, 37a Land 9, 17, 33 Second layer circuit pattern 12, 21, 25, 28 , 34 through hole 39 welding electrode 35 substrate 37 circuit pattern 37a land 40 terminal

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 回路パターンを絶縁層を介して複数積層
した基板であって、最上部に形成された第1層回路パタ
ーンの端子接合用のランドの近傍に、前記第1層回路パ
ターンと、前記第1層回路パターンと前記絶縁層を介し
て隣接する第2層回路パターンとを接合するスルーホー
ルを形成したことを特徴とする回路基板。
1. A substrate in which a plurality of circuit patterns are laminated via an insulating layer, wherein the first layer circuit pattern is provided in the vicinity of a land for terminal bonding of the first layer circuit pattern formed on the uppermost portion, A circuit board having a through hole for joining the first layer circuit pattern and the second layer circuit pattern adjacent to each other through the insulating layer.
【請求項2】 半田濡れ性及び導電性の良好な材料で構
成された溶接電極を、基板上に形成された回路パターン
の端子接合用のランド上に半田付けする工程と、前記溶
接電極上に端子を溶接する工程とを有することを特徴と
する回路基板への端子接合方法。
2. A step of soldering a welding electrode made of a material having good solder wettability and conductivity on a land for joining terminals of a circuit pattern formed on a substrate, and the step of forming a solder on the welding electrode. A method of joining terminals to a circuit board, the method comprising: welding the terminals.
JP6090850A 1994-04-28 1994-04-28 Circuit board and connection method of terminal to circuit board Withdrawn JPH07297558A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6090850A JPH07297558A (en) 1994-04-28 1994-04-28 Circuit board and connection method of terminal to circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6090850A JPH07297558A (en) 1994-04-28 1994-04-28 Circuit board and connection method of terminal to circuit board

Publications (1)

Publication Number Publication Date
JPH07297558A true JPH07297558A (en) 1995-11-10

Family

ID=14010065

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6090850A Withdrawn JPH07297558A (en) 1994-04-28 1994-04-28 Circuit board and connection method of terminal to circuit board

Country Status (1)

Country Link
JP (1) JPH07297558A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021171200A1 (en) * 2020-02-27 2021-09-02 3M Innovative Properties Company Multilayer circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021171200A1 (en) * 2020-02-27 2021-09-02 3M Innovative Properties Company Multilayer circuit board

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A300 Withdrawal of application because of no request for examination

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Effective date: 20010703