JPH07283269A - Bonding method between electrode pattern and bump electrode pattern on circuit substrate - Google Patents

Bonding method between electrode pattern and bump electrode pattern on circuit substrate

Info

Publication number
JPH07283269A
JPH07283269A JP8913694A JP8913694A JPH07283269A JP H07283269 A JPH07283269 A JP H07283269A JP 8913694 A JP8913694 A JP 8913694A JP 8913694 A JP8913694 A JP 8913694A JP H07283269 A JPH07283269 A JP H07283269A
Authority
JP
Japan
Prior art keywords
electrode pattern
photo
resin
circuit board
circuit substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8913694A
Other languages
Japanese (ja)
Inventor
Atsushi Ito
厚 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Avionics Co Ltd
Original Assignee
Nippon Avionics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Avionics Co Ltd filed Critical Nippon Avionics Co Ltd
Priority to JP8913694A priority Critical patent/JPH07283269A/en
Publication of JPH07283269A publication Critical patent/JPH07283269A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives

Landscapes

  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To obtain a conductivity even through bump electrodes having level differences and to considerably reduce the rate of defectives by connecting an electrode pattern of a clear circuit substrate to a bump electrode pattern of chips by using a photo-curing resin. CONSTITUTION:A photo-curing resin 14 is prepared by mixing fine particles 13 formed of a conductive material with photo-curing insulation resin, and this photo-curing resin 14 is applied to a clear circuit substrate 1 on which an electrode pattern 2 is formed. Next, the electrode pattern 2 of a circuit substrate 1 is positioned to a bump electrode pattern 12 of a chip 11, and it is pressed from a position above the chip 11. At the same time, light capable of setting the photo-curing resin 14 is radiated from back of the circuit substrate 1, and the pressing force is removed after the photo-curing resin 14 is hardened by the light. For example, it is pressed with a pressing tool 10, ultraviolet light 9 is radiated in a state of a linear light source and then the photo-curing resin 14 is hardened.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は,液晶に用いるガラス
板の透明な回路基板に形成された電極パタ−ンとチップ
に形成されたバンプ電極パタ−ンとをボンディングする
方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of bonding an electrode pattern formed on a transparent circuit board of a glass plate used for liquid crystal and a bump electrode pattern formed on a chip.

【0002】[0002]

【従来の技術】従来,TABパッケ−ジをOLB接続す
る方法としては,図4に示すように,最も一般的な半田
付け方法や,図5に示すように,異方性導電シ−トを用
いる方法あるいは,図6〜図9に示すように,光硬化性
絶縁樹脂8を用いる方法等,各種の方法が開発され,実
用化された。これは,TABパッケ−ジを搭載する回路
基板1が多様化し,これら,回路基板1上の配線材料の
中には,ITO(IndiumTin Oxide) 等のように半田付
け出来ない材料が用いられ始めたためである。
2. Description of the Related Art Conventionally, as a method for connecting TAB packages by OLB, the most general soldering method as shown in FIG. 4 or the anisotropic conductive sheet as shown in FIG. Various methods such as a method of using, or a method of using a photo-curable insulating resin 8 as shown in FIGS. 6 to 9 have been developed and put into practical use. This is because the circuit board 1 on which the TAB package is mounted is diversified, and a material that cannot be soldered such as ITO (Indium Tin Oxide) has begun to be used as a wiring material on the circuit board 1. Is.

【0003】最も一般的な半田付け方法としては,図4
に示すように,回路基板1上に形成されている電極パタ
−ン2に,半田層3を形成した後,この半田層3の上か
らフィルムリ−ド4を位置合わせし,加熱して電極パタ
−ン2とフィルムリ−ド4とを半田付けする方法であ
る。
The most common soldering method is shown in FIG.
As shown in FIG. 1, after the solder layer 3 is formed on the electrode pattern 2 formed on the circuit board 1, the film lead 4 is positioned on the solder layer 3 and the electrodes are heated. This is a method of soldering the pattern 2 and the film lead 4 together.

【0004】又,その他の方法としては,図5に示すよ
うに,ガラスエポキシ樹脂の回路基板1に形成されてい
る電極パタ−ン2の上に載置された熱可塑性または熱硬
化性樹脂5中に金属微粒子(Ni,半田,Cu,Au)
6を分散させた異方性導電シ−ト7を介してフィルムリ
−ド4と電極パタ−ン2を接続する方法である異方性導
電シ−トを用いる方法がある。
As another method, as shown in FIG. 5, a thermoplastic or thermosetting resin 5 placed on an electrode pattern 2 formed on a glass epoxy resin circuit board 1 is used. Fine metal particles (Ni, solder, Cu, Au)
There is a method using an anisotropic conductive sheet which is a method of connecting the film lead 4 and the electrode pattern 2 through the anisotropic conductive sheet 7 in which 6 is dispersed.

【0005】これは,液晶ディスプレイの普及とともに
急速に開発され実用化された方法で,シ−ト状に形成さ
れている異方性導電シ−ト7を回路基板1の電極パタ−
ン2表面上に貼り付ける。この場合,異方性導電シ−ト
7を所定長さに切断したものを貼り付ける方法とリ−ル
(図示せず)に巻いた異方性導電シ−ト7をそのまま電
極パタ−ン2に貼り付けた後切断する方法とがある。こ
の貼り付ける際,異方性導電シ−ト7の粘着力で貼り付
ける場合と電極パタ−ン2上に異方性導電シ−ト7を置
いてから仮り止めした後,100°C前後の温度と軽い
圧力をボンディング用のツ−ル(図示せず)で加えるこ
とにより貼り付ける方法とがある。
This is a method rapidly developed and put into practical use with the spread of liquid crystal displays, and the anisotropic conductive sheet 7 formed in the shape of a sheet is used as an electrode pattern of the circuit board 1.
Paste on the surface In this case, the anisotropic conductive sheet 7 cut into a predetermined length is attached, and the anisotropic conductive sheet 7 wound around a reel (not shown) is used as it is for the electrode pattern 2. There is a method of cutting after pasting on. In this pasting, when sticking by the adhesive force of the anisotropic conductive sheet 7 and after placing the anisotropic conductive sheet 7 on the electrode pattern 2 and temporarily fixing it, There is a method of attaching by applying temperature and light pressure with a tool for bonding (not shown).

【0006】次に,回路基板1の下面から電極パタ−ン
2とフィルムリ−ド4とを位置合わせした後,ヒ−タブ
ロック(ボンディング用のツ−ル)で所定時間加熱加圧
した後,ヒ−タブロックを取り去る。これによって,分
散した金属微粒子6を介して電極パタ−ン2とフィルム
リ−ド4とは完全に接続される。
Next, after the electrode pattern 2 and the film lead 4 are aligned from the lower surface of the circuit board 1, after heating and pressurizing for a predetermined time with a heater block (tool for bonding). , Remove the heater block. As a result, the electrode pattern 2 and the film lead 4 are completely connected via the dispersed metal fine particles 6.

【0007】さらに,その他の方法としては,図6〜図
9に示すように,光硬化性絶縁樹脂8を硬化させ,この
樹脂の接着力によってフィルムリ−ド4と回路基板1の
電極パタ−ン2とを接続する方法である光硬化性絶縁樹
脂8を用いる方法は,一番新しい方法である。
Further, as another method, as shown in FIGS. 6 to 9, the photo-curable insulating resin 8 is cured, and the adhesive force of the resin cures the film lead 4 and the electrode pattern of the circuit board 1. The method of using the photo-curable insulating resin 8 which is a method of connecting with the connector 2 is the latest method.

【0008】この光硬化性絶縁樹脂8を用いる方法は,
液晶ディスプレイに実用化されている方法であって,ま
ず,図7に示すように,ガラスで形成されている透明な
回路基板1上には,ITOの電極パタ−ン2が形成され
ている。この電極パタ−ン2の上面に,光硬化性絶縁樹
脂8が塗布される。
The method using the photo-curable insulating resin 8 is as follows.
First, as shown in FIG. 7, an electrode pattern 2 of ITO is formed on a transparent circuit board 1 made of glass, which is a method put to practical use in a liquid crystal display. A photocurable insulating resin 8 is applied to the upper surface of the electrode pattern 2.

【0009】この光硬化性絶縁樹脂8は,アクリル系
で,粘度は1000〜2000cpsであり,その接続
条件は,加圧力20〜40kg/cm2 ,紫外光9の照
射200mw/cm2 の光源で,5〜8秒である。この
紫外光9の照射は,回路基板1がガラスで形成されてい
るので,ディスプレイの反対面から線光源の状態で一括
して照射され光硬化性絶縁樹脂8を硬化させている。
[0009] The photo-curable insulating resin 8 is an acrylic, a viscosity of 1000~2000Cps, the connection conditions, pressure 20~40kg / cm 2, in the light source radiation 200 mw / cm 2 of ultraviolet light 9 , 5 to 8 seconds. Since the circuit board 1 is made of glass, the ultraviolet light 9 is collectively irradiated from the opposite surface of the display in the state of a linear light source to cure the photocurable insulating resin 8.

【0010】この際,フィルムリ−ド4と電極パタ−ン
2との間に介在する光硬化性絶縁樹脂8は絶縁物である
が,加圧ツ−ル10で加圧することにより,この間から
除去され,完全に電極パタ−ン2とフィルムリ−ド4と
が電気的に接続される。
At this time, the photo-curable insulating resin 8 interposed between the film lead 4 and the electrode pattern 2 is an insulator, but by applying pressure with the pressure tool 10, After removal, the electrode pattern 2 and the film lead 4 are completely electrically connected.

【0011】[0011]

【発明が解決しようとする問題点】異方性導電シ−ト7
を使用する方法の場合には,回路基板1と異方性導電シ
−ト7とフィルムリ−ド4の電極パタ−ン2との3者を
位置合わせしなければならず,この工程が面倒である。
その上,両面が被膜で保護されている3層構造の異方性
導電シ−ト7は,一旦,仮り止めをして1層の被膜を剥
離し,その後で,他方の被膜を剥離しながら回路基板1
上に貼着していかなければならず,それにともなう装置
および工程数が複雑であるという問題があった。
Problems to be Solved by the Invention Anisotropic conductive sheet 7
In the case of using the method, the circuit board 1, the anisotropic conductive sheet 7, and the electrode pattern 2 of the film lead 4 must be aligned with each other, and this step is troublesome. Is.
In addition, the anisotropic conductive sheet 7 having a three-layer structure, whose both surfaces are protected by a coating, is temporarily fixed to peel off one layer of the coating, and then peel off the other coating. Circuit board 1
There was a problem in that the device and the number of steps involved were complicated because it had to be attached on top.

【0012】一方,光硬化性絶縁樹脂8を使用する方法
は,基板1のITO電極パタ−ン2にフィルムリ−ド4
を接続する場合には,両者の位置合わせを厳しくしなけ
ればならない。その上,図10に示すように,LSIチ
ップ11の電極パタ−ン2をITO電極パタ−ン2に接
続する場合には,LSIチップ11の電極パタ−ン2上
にバンプ電極12を形成し,このバンプ電極12とIT
O電極パタ−ン2とが接続される。この形成されたバン
プ電極12の形状,高さ等にばらつきがある場合には,
間隙15が形成されて接続不良箇所が生じるという問題
があった。
On the other hand, in the method of using the photo-curable insulating resin 8, the ITO electrode pattern 2 on the substrate 1 and the film lead 4 are used.
When connecting the two, the alignment of the two must be strict. Moreover, as shown in FIG. 10, when the electrode pattern 2 of the LSI chip 11 is connected to the ITO electrode pattern 2, bump electrodes 12 are formed on the electrode pattern 2 of the LSI chip 11. , This bump electrode 12 and IT
The O electrode pattern 2 is connected. If there are variations in the shape, height, etc. of the formed bump electrodes 12,
There is a problem in that the gap 15 is formed and a connection failure occurs.

【0013】[0013]

【問題点を解決するための手段】この発明は,光硬化性
の絶縁樹脂に,導電性部材で形成した微粒子を混入して
光硬化型樹脂を作成し,電極パタ−ンが形成されている
透明な回路基板上に,光硬化型樹脂を塗布し,回路基板
の電極パタ−ンとチップのバンプ電極のパタ−ンとを位
置合わせした後,このチップの上方向から加圧するとと
もに,回路基板の下面方向から光硬化型樹脂を硬化可能
な光を照射し,この光硬化型樹脂が光により硬化した
後,加圧力を除去するようにしたものである。
According to the present invention, an electrode pattern is formed by mixing a photocurable insulating resin with fine particles formed of a conductive member to form a photocurable resin. After a photo-curing resin is applied on a transparent circuit board and the electrode pattern of the circuit board and the bump electrode pattern of the chip are aligned with each other, pressure is applied from above the chip and the circuit board The photo-curable resin is irradiated with light that can cure the photo-curable resin from the lower surface direction, and the pressure is removed after the photo-curable resin is cured by the light.

【0014】[0014]

【作用】加圧しつつ紫外光9を照射することにより,光
硬化型樹脂14が硬化する。この際,バンプ電極12の
高低差のために,バンプ電極12のパタ−ンと電極パタ
−ン2との間に間隙15がある場合,この間隙15に介
在する余分な光硬化型樹脂14は除去されるが,間隙1
5には導電性の微粒子13が密になった状態として残存
する。従って,バンプ電極12のパタ−ンと電極パタ−
ン2とは,電気的に導通が得られるが,パタ−ンとパタ
−ンとの間は,導電性の微粒子13が疎の状態であるた
め,電気的には絶縁された状態となる。
The photo-curable resin 14 is cured by irradiating it with the ultraviolet light 9 while applying pressure. At this time, if there is a gap 15 between the pattern of the bump electrode 12 and the electrode pattern 2 due to the height difference of the bump electrode 12, the extra photocurable resin 14 present in this gap 15 is Removed, but gap 1
5, the conductive fine particles 13 remain as a dense state. Therefore, the bump electrode 12 pattern and the electrode pattern are
Electrical conduction is obtained with the pattern 2, but since the conductive fine particles 13 are in a sparse state between the patterns, they are electrically insulated from each other.

【0015】[0015]

【発明の実施例】この発明の実施例を,図1〜図3に基
づいて詳細に説明する。図1〜図3は,この発明による
回路基板1の電極パタ−ン2とLSIチップ11に形成
されているバンプ電極12のパタ−ンとのボンディング
方法を示す説明図である。なお,従来例と同一のもの
は,同一名称を使用するとともに,同一符号を付してそ
の説明を省略する。
Embodiments of the present invention will be described in detail with reference to FIGS. 1 to 3 are explanatory views showing a method of bonding the electrode pattern 2 of the circuit board 1 and the pattern of the bump electrode 12 formed on the LSI chip 11 according to the present invention. The same parts as those of the conventional example have the same names, are given the same reference numerals, and explanations thereof are omitted.

【0016】図1〜図3において,従来型の光硬化性絶
縁樹脂8は,アクリル系で,粘度は1000〜2000
cpsのものが使用されている。そこで,まず,紫外光
等の光で硬化するゲル状のアクリル系の光硬化性の絶縁
樹脂を母材として,この母材の中に,導電性パ−ティク
ルのような導電性の微粒子13を所望量混入して光硬化
型樹脂14を製造する。
1 to 3, the conventional photocurable insulating resin 8 is an acrylic resin and has a viscosity of 1000 to 2000.
cps is used. Therefore, first, a gel-like acrylic photo-curable insulating resin that is cured by light such as ultraviolet light is used as a base material, and conductive fine particles 13 such as conductive particles are contained in the base material. The photocurable resin 14 is manufactured by mixing in a desired amount.

【0017】この混入される導電性の微粒子13の大き
さ,混入率等は,互いに接続される電極パタ−ン2,バ
ンプ電極12の大きさ,パタ−ンのピッチ等により適当
な値が設定される。なお,母材である絶縁樹脂として
は,アクリル系樹脂に限定されることなく,その他,紫
外光等の光を照射されることにより硬化する絶縁樹脂で
あれば,いかなるものであっても良い。
The size, the mixing ratio, etc. of the conductive fine particles 13 to be mixed are set to appropriate values according to the sizes of the electrode patterns 2 and the bump electrodes 12 connected to each other, the pattern pitch, etc. To be done. The insulating resin as the base material is not limited to the acrylic resin, and any insulating resin that is cured by being irradiated with light such as ultraviolet light may be used.

【0018】このようにして,光硬化型樹脂14を製造
した後,図1に示すように,ITOの電極パタ−ン2が
形成されているとともに,ガラス等で形成されている透
明な回路基板1上全体に,光硬化型樹脂14が塗布され
る。
After the photo-curing resin 14 is manufactured in this manner, as shown in FIG. 1, an ITO electrode pattern 2 is formed and a transparent circuit board formed of glass or the like. A photo-curable resin 14 is applied on the entire surface of 1.

【0019】次いで,この光硬化型樹脂14が塗布され
ている回路基板1の上にバンプ電極12が形成されてい
るLSIチップ11が載置されるとともに,電極パタ−
ン2とバンプ電極12のパタ−ンとは位置合わせされ
る。
Next, the LSI chip 11 having the bump electrodes 12 formed thereon is placed on the circuit board 1 coated with the photocurable resin 14, and the electrode pattern is formed.
The pattern of the bump 2 and the pattern of the bump electrode 12 are aligned.

【0020】位置合わせ終了後,LSIチップ11の上
方向から加圧ツ−ル10で加圧するとともに,回路基板
1の下面方向から紫外光9が線光源の状態で一括して照
射して光硬化型樹脂14を硬化させる。
After the alignment is completed, pressure is applied from above the LSI chip 11 by the pressure tool 10, and ultraviolet light 9 is collectively emitted from the lower surface direction of the circuit board 1 in the state of a line light source to photo-cure. The mold resin 14 is cured.

【0021】この実施例の場合には,製造した光硬化型
樹脂14は,従来から使用していたアクリル系で,粘度
は1000〜2000cps程度の絶縁樹脂を母材とし
ているので,加圧ツ−ル10の加圧力は,従来加圧され
ていた程度加圧すれば,バンプ電極12と電極パタ−ン
2との間に介在する光硬化型樹脂14は除去される。
又,照射する光としては,紫外光9の照射200mw/
cm2 の光源で,5〜8秒程度照射した。
In the case of this embodiment, the photocurable resin 14 produced is an acrylic resin which has been conventionally used, and the insulating resin having a viscosity of about 1000 to 2000 cps is used as a base material. The photocurable resin 14 present between the bump electrode 12 and the electrode pattern 2 is removed by applying the pressure applied to the tool 10 to the extent conventionally applied.
The irradiation light is 200 mw / irradiation of ultraviolet light 9.
Irradiation with a light source of cm 2 for about 5 to 8 seconds.

【0022】この際,加圧しつつ紫外光9を照射するこ
とにより,光硬化型樹脂14が硬化すると,図3に示す
ように,バンプ電極12の高低差のために,バンプ電極
12と電極パタ−ン2との間に間隙15がある場合,こ
の間隙15に介在する余分な光硬化型樹脂14は除去さ
れるが,間隙15には導電性の微粒子13が密になった
状態として残存する。従って,バンプ電極12のパタ−
ンと電極パタ−ン2とは,電気的に導通が得られるが,
パタ−ンとパタ−ンとの間は,導電性の微粒子13が疎
の状態のままであるから,電気的には絶縁された状態と
なり非導通となる。
At this time, when the photo-curing resin 14 is cured by irradiating the ultraviolet light 9 while applying pressure, as shown in FIG. 3, due to the height difference of the bump electrode 12, the bump electrode 12 and the electrode pattern are If there is a gap 15 with the gap 2, the excess photo-curable resin 14 existing in the gap 15 is removed, but the conductive fine particles 13 remain in the gap 15 as a dense state. . Therefore, the pattern of the bump electrode 12
The electrode and the electrode pattern 2 can be electrically connected,
Since the conductive fine particles 13 remain sparse between the patterns, they are electrically insulated and non-conductive.

【0023】[0023]

【発明の効果】この発明は,光硬化性の絶縁樹脂に,導
電性部材で形成した微粒子を混入して光硬化型樹脂を作
成し,電極パタ−ンが形成されている透明な回路基板上
に,光硬化型樹脂を塗布し,回路基板の電極パタ−ンと
チップのバンプ電極のパタ−ンとを位置合わせした後,
このチップの上方向から加圧するとともに,回路基板の
下面方向から光硬化型樹脂を硬化可能な光を照射し,こ
の光硬化型樹脂が光により硬化した後,加圧力を除去す
るようにしたので,バンプ電極に高低差がある場合でも
導通状態が得られ,不良品の発生率が格段に少なくな
る。即ち,バンプ電極の高低差の大きなものまでカバ−
することが出来る。又,回路基板の電極パタ−ンとLS
Iチップのバンプ電極のパタ−ンとを位置合わせした
後,ゲル状の光硬化型樹脂を回路基板に塗布するだけで
あるから,従来の異方性導電シ−トを用いた方法に比較
して,位置合わせの工程数が少なく簡単であるととも
に,単にゲル状の光硬化型樹脂を塗布するだけであるか
ら,従来のように,異方性導電シ−トの被膜を剥離する
ための工程およびそれに伴う装置も必要なく,経済的で
ある。その上,異方性導電シ−トに比較して光の照射に
より硬化する絶縁樹脂は安価であるから,材料費も節約
出来る。
According to the present invention, a photocurable resin is produced by mixing fine particles formed of a conductive member into a photocurable insulating resin, and a transparent circuit board on which an electrode pattern is formed. After applying a photo-curable resin to the circuit board and aligning the pattern of the circuit board electrode and the chip bump electrode,
Since pressure is applied from above the chip and light that can harden the photo-curable resin is applied from the bottom surface of the circuit board, and the pressure is removed after the photo-curable resin is cured by light. However, even if there is a difference in height between bump electrodes, a conductive state can be obtained, and the incidence of defective products is significantly reduced. That is, even bump electrodes with large height differences are covered.
You can do it. Also, the electrode pattern and LS of the circuit board
After aligning the pattern of the bump electrode of the I-chip, the gel-like photo-curable resin is only applied to the circuit board, so compared with the conventional method using an anisotropic conductive sheet. Since the number of alignment steps is small and simple and the gel photo-curable resin is simply applied, the conventional process for removing the anisotropic conductive sheet film is performed. Also, it is economical because there is no need for a device associated therewith. In addition, the insulating resin that is cured by irradiation with light is cheaper than the anisotropic conductive sheet, so that the material cost can be saved.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の実施例を示すもので,ボンディング
方法の1工程を示す説明図である。
FIG. 1 is an explanatory view showing an embodiment of the present invention and showing one step of a bonding method.

【図2】この発明の実施例を示すもので,ボンディング
方法の1工程を示す説明図である。
FIG. 2 shows an embodiment of the present invention and is an explanatory view showing one step of the bonding method.

【図3】この発明の実施例を示すもので,ボンディング
方法の1工程を示す説明図である。
FIG. 3 shows an embodiment of the present invention and is an explanatory view showing one step of the bonding method.

【図4】従来例を示すもので,半田付けによる接続方法
を示す説明図である。
FIG. 4 shows a conventional example and is an explanatory diagram showing a connection method by soldering.

【図5】従来例を示すもので,異方性導電シ−トによる
接続方法を示す説明図である。
FIG. 5 shows a conventional example and is an explanatory diagram showing a connection method using an anisotropic conductive sheet.

【図6】従来例を示すもので,光硬化性絶縁樹脂による
接続方法を示す説明図である。
FIG. 6 shows a conventional example and is an explanatory view showing a connection method using a photo-curable insulating resin.

【図7】従来例を示すもので,光硬化性絶縁樹脂による
接続方法の1工程を示す説明図である。
FIG. 7 shows a conventional example and is an explanatory view showing one step of a connection method using a photocurable insulating resin.

【図8】従来例を示すもので,光硬化性絶縁樹脂による
接続方法の1工程を示す説明図である。
FIG. 8 is an explanatory view showing a conventional example and showing one step of a connection method using a photocurable insulating resin.

【図9】従来例を示すもので,光硬化性絶縁樹脂による
接続方法の1工程を示す説明図である。
FIG. 9 is an explanatory view showing a conventional example and showing one step of a connection method using a photocurable insulating resin.

【図10】従来例を示す説明図である。FIG. 10 is an explanatory diagram showing a conventional example.

【符号の説明】[Explanation of symbols]

1 回路基板 2 電極パタ−ン 9 紫外光 10 加圧ツ−ル 11 LSIチップ 12 バンプ電極 13 導電性の微粒子 14 光硬化型樹脂 DESCRIPTION OF SYMBOLS 1 Circuit board 2 Electrode pattern 9 Ultraviolet light 10 Pressure tool 11 LSI chip 12 Bump electrode 13 Conductive fine particles 14 Photocurable resin

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 光硬化性の絶縁樹脂に,導電性部材で形
成した微粒子を混入して光硬化型樹脂を作成し,電極パ
タ−ンが形成されている透明な回路基板上に,前記光硬
化型樹脂を塗布し,前記回路基板の電極パタ−ンとチッ
プのバンプ電極パタ−ンとを位置合わせした後,このチ
ップの上方向から加圧するとともに,前記回路基板の下
面方向から前記光硬化型樹脂を硬化可能な光を照射し,
この光硬化型樹脂が前記光により硬化した後,前記加圧
力を除去することを特徴とする回路基板の電極パタ−ン
とバンプ電極パタ−ンのボンディング方法。
1. A photocurable resin is produced by mixing fine particles formed of a conductive member into a photocurable insulating resin, and the photocurable resin is formed on a transparent circuit board on which an electrode pattern is formed. After applying a curable resin and aligning the electrode pattern of the circuit board and the bump electrode pattern of the chip, pressure is applied from above the chip and the photo-curing is performed from the bottom surface of the circuit board. Irradiate light that can cure the mold resin,
A bonding method for an electrode pattern and a bump electrode pattern on a circuit board, wherein the pressure is removed after the photo-curable resin is cured by the light.
JP8913694A 1994-04-04 1994-04-04 Bonding method between electrode pattern and bump electrode pattern on circuit substrate Pending JPH07283269A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8913694A JPH07283269A (en) 1994-04-04 1994-04-04 Bonding method between electrode pattern and bump electrode pattern on circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8913694A JPH07283269A (en) 1994-04-04 1994-04-04 Bonding method between electrode pattern and bump electrode pattern on circuit substrate

Publications (1)

Publication Number Publication Date
JPH07283269A true JPH07283269A (en) 1995-10-27

Family

ID=13962470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8913694A Pending JPH07283269A (en) 1994-04-04 1994-04-04 Bonding method between electrode pattern and bump electrode pattern on circuit substrate

Country Status (1)

Country Link
JP (1) JPH07283269A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1117045A (en) * 1997-06-26 1999-01-22 Hitachi Chem Co Ltd Substrate for mounting semiconductor chip
JP2001135672A (en) * 1999-11-01 2001-05-18 Sony Chem Corp Anisotropic conducting connection body, manufacturing method therefor and paste connection material
US6515869B2 (en) 1997-05-26 2003-02-04 Nec Corporation Supporting substrate for a semiconductor bare chip
JP2014045013A (en) * 2012-08-24 2014-03-13 Bondtech Inc Method and device for positioning object onto substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6515869B2 (en) 1997-05-26 2003-02-04 Nec Corporation Supporting substrate for a semiconductor bare chip
JPH1117045A (en) * 1997-06-26 1999-01-22 Hitachi Chem Co Ltd Substrate for mounting semiconductor chip
JP2001135672A (en) * 1999-11-01 2001-05-18 Sony Chem Corp Anisotropic conducting connection body, manufacturing method therefor and paste connection material
JP2014045013A (en) * 2012-08-24 2014-03-13 Bondtech Inc Method and device for positioning object onto substrate

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