JPH07282035A - Weighted mean circuit - Google Patents

Abstract

PURPOSE:To reduce the number of multipliers, to simplify the circuit constitution and to shorten the response time in a weighted mean circuit. CONSTITUTION:A switch 5 changing over an input signal, an adder 6, a first register 7, a multiplier 8 and a second register 9, are provided. A signal from the first register 7 is fed back to the adder 6 and a signal from the multiplier 8 is polarity-inverted and is fed back to the adder 6 through the change-over switch 5. The second register 9 is constituted to output the signal from the multiplier 8. Output from the first register 7 and output from the multiplier 8 are polarity-inverted and they are fed back. Thus, the two kinds of the signals are fed back to the first register 7 and therefore the function of the multiplier is given. Then, the multiplier is saved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a weighted average circuit which is one of digital filters for extracting an average value of an arbitrary numerical value sequence.

[0002]

2. Description of the Related Art FIG. 3 shows a configuration of a conventional technique often used in a weighted average circuit.

In FIG. 3, 1 is a multiplier, 2 is an adder, 3 is a register, and 4 is a multiplier.

The data Xn input to the multiplier 1 is multiplied by the coefficient α and output to the adder 2, and the adder 2 outputs a signal obtained by multiplying the output from the register 3 by the coefficient β by the multiplier 4. Is fed back, and the output from the multiplier 1 and the output from the multiplier 4 are added in the adder 2 and input to the register 3.

Thus, the time (n +
The time average output M (n + 1) in 1) is expressed by the following mathematical expression 1.

[0006]

## EQU1 ## M (n + 1) = αXn + βMn

Here, X represents the data input to the weighted average circuit, and M represents the time average output output from the weighted average circuit.

From the equation (1), the time (n
The output M (n + 1) of +1) is a weighted average of the input Xn and the output Mn at time n, which are weighted by the coefficients α and β, respectively, and the output form is included in the filter form. Belongs to the recursive filter.

[0009]

However, in the above-mentioned conventional example, two sets of multipliers are required to multiply the series Xn and Mn by the coefficients α and β, and the scale of the circuit of the multiplier is generally that of the adder. Considering that the circuit is larger than the circuit scale, there are problems that the circuit is complicated and the response time is long.

[0010]

The present invention comprises a switch for switching an input signal, an adder, a first register, a multiplier, and a second register, and a signal from the first register is provided as described above. It is configured such that the signal from the multiplier is returned to the adder, the polarity of the signal from the multiplier is inverted, and the signal is returned to the adder via the changeover switch, and the second register outputs the signal from the multiplier. It is what

[0011]

Since the output from the first register and the output from the multiplier are inverted and fed back, two kinds of signals are fed back to the first register, and thus have a multiplier function. Therefore, the multiplier can be omitted.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

The weighted average circuit of this embodiment shown in FIG. 1 is mainly composed of a changeover switch 5, an adder 6, a first register 7, a multiplier 8, a second register 9 and a polarity inverter 10.

The change-over switch 5 selectively inputs either the data Xn or the feedback signal from the polarity inverter 10 to the adder 6, and the adder 6 receives the signal from the change-over switch 5 and the first signal. The signal from the first register 7 is added, the first register 7 stores and accumulates the signal from the adder 6 at a predetermined time interval m, and the multiplier 8 adds the signal from the first register 7 to the time interval m. 1 / m, and the second register 9 operates the signal from the multiplier 8 at a predetermined interval longer than the time interval m. Further, the polarity inverter 10 feeds back the signal from the multiplier 8 multiplied by -1 to the changeover switch 5.

The operation will be described below.

FIG. 1 has a function equivalent to that of the weighted average circuit of FIG. 3 described above. Therefore, the general term of the weighted average circuit is

[0017]

## EQU00002 ## M (n + 1) = (1 / m) Xn + {(m-1) / m} Mn

In the present embodiment shown in FIG. 1, the changeover switch 5 is opened and closed to output a signal satisfying the above mathematical expression 2. This will be described below.

In FIG. 1, considering the output Mn as a reference, the output of the 1 / m times multiplier 8 becomes the output of the entire circuit, and thus can be expressed as Mn. Therefore, the input to the multiplier 8 is m
It becomes Mn. Therefore, the input to the first register 7 is
It becomes mM (n + 1).

When the switch 5 is connected to the contact A, the input mM (n + 1) to the first register 7 has the following expression because there is no feedback component to the adder 6.

[0021]

[Equation 3] mM (n + 1) = Xn

This value is stored in the first register 7.

Next, consider the case where the switch 5 is connected to the contact B. Input to the first register 7 in the figure mM (n + 1)
Is represented by the sum of Mn and the output of the first register 7, since the output of the multiplier 8 is Mn.

[0024]

[Formula 4] mM (n + 1) = -Mn + mMn

From Equations 3 and 4, the general term of the weighted average circuit according to this embodiment is

[0026]

## EQU5 ## mM (n + 1) = Xn + (m-1) Mn∴M (n + 1) = (1 / m) Xn + {(m-1) / m} Mn

Equation 5 is equivalent to Equation 2 in the general term of the conventional weighted average circuit.

FIG. 2 is a flowchart showing the operation of the weighted average circuit of this embodiment described in detail above.

In FIG. 2, when the power of this circuit is turned on (START), the input signal Xn first enters step 11, and the switch 5 is switched to the contact A. Therefore, in step 12, the adder 6 is added. to go into. Since there is no feedback input at this time, the output of the first register 7, which is the next step 13, is zero, and as a result, what is stored in the first register 7 in step 14 is M which corresponds to the above-mentioned expression. It becomes (n + 1).

In the next step 15, 1 / m in the multiplier 8
Double multiplication is performed and Mn / m is output. In step 16, since the switch 5 is currently connected to the contact A, the process proceeds to step 17. In step 17, the polarity reversing device 10 changes to -Mn / m, and in step 18, the switch 5 is switched to the contact B and the process proceeds to step 12.

-Mn / m in step 12 is added in step 13 with Xn previously stored in the first register 7 in the adder 6. This result is Step 1
4 is stored in the first register 7 and then step 15
Is multiplied by 1 / m. After this, in step 16,
Since the switch 5 is connected to the contact B, the process directly proceeds to step 19. In step 19, the second register 9
The value is stored in and the value is output.

In the multiplier 8, 1 / m is m
By setting = 2 ⁿ , the multiplier becomes unnecessary and the circuit scale is further reduced. That is, m = 2 ⁿ can realize an arbitrary n (including −n) by increasing or decreasing the number of digits, avoiding troublesome addition repetition, and realizing a small-scale circuit.

[0033]

As described above, according to the present invention, redundant multipliers can be omitted, the circuit configuration can be simplified, the size can be reduced, and the response time can be shortened. Be effective.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing an embodiment of the present invention.

FIG. 2 is a flowchart of the same embodiment.

FIG. 3 is a circuit block diagram showing a conventional example.

[Explanation of symbols]

 5 Changeover Switch 6 Adder 7 First Register 8 Multiplier 9 Second Register 10 Polarity Inverter

Claims (3)

[Claims] 1. A switch for switching an input signal, an adder, a first register, a multiplier, and a second register are provided, and a signal from the first register is fed back to the adder and the multiplication is performed. A weighted average circuit configured to invert the polarity of a signal from the multiplier and feed it back to the adder via the changeover switch, and to output the signal from the multiplier to the second register. 2. The first register accumulates an input signal at a predetermined time interval, the second register operates at a time interval longer than the predetermined time, and the multiplier multiplies the reciprocal of the predetermined time interval. Weighted average circuit. 3. A multiplier for multiplying an inverse of 2 ^n.
Weighted average circuit.