JPH07276871A - Printed wiring board for ic card - Google Patents
Printed wiring board for ic cardInfo
- Publication number
- JPH07276871A JPH07276871A JP7110187A JP11018795A JPH07276871A JP H07276871 A JPH07276871 A JP H07276871A JP 7110187 A JP7110187 A JP 7110187A JP 11018795 A JP11018795 A JP 11018795A JP H07276871 A JPH07276871 A JP H07276871A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- hole
- card
- contact terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
- H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85444—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01028—Nickel [Ni]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、電子部品（例えばＩＣ
チップ）をワイヤボンディングにより接続するＩＣカー
ド用プリント配線板に関し、詳しくは良好なボンディン
グ特性を有し、しかも品質の安定した、安価なＩＣカー
ド用プリント配線板に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to electronic parts (eg ICs).
The present invention relates to a printed wiring board for an IC card in which chips are connected by wire bonding, and more particularly to an inexpensive printed wiring board for an IC card which has good bonding characteristics and is stable in quality.
【０００２】[0002]
【従来の技術】近年において、この種のＩＣカード用プ
リント配線板は、軽薄短小化の代表としての性格を有す
ること、及び信頼性に優れていることから各分野におい
て多用されてきている。そしてこの種のＩＣカード用プ
リント配線板は、より一層の軽薄短小化を目指して改良
が加えられてきているのである。従来この種のＩＣカー
ド用プリント配線板（２０）の構造は、通常、次のよう
になっている。2. Description of the Related Art In recent years, this type of printed circuit board for an IC card has been widely used in various fields because it has a characteristic as a representative of lightness, thinness, shortness and miniaturization and is excellent in reliability. Further, this type of printed wiring board for an IC card has been improved with the aim of further reduction in size, weight, and size. Conventionally, the structure of this type of IC card printed wiring board (20) is usually as follows.
【０００３】すなわち、実開昭５８−１３１６５６号公
報あるいは図６に示すように、ＩＣカード用プリント配
線板（２０）の基材（２１）に複数の貫通孔（２７）を
形成し、この各貫通孔（２７）内に導体層（２７ａ）を
形成する。このように形成した導体層（２７ａ）を介し
て、基材（２１）の表面側に固着した外部コンタクト端
子（２５）と基材（２１）の裏面側に形成したワイヤボ
ンディング端子（２６）とを電気的に接続し、さらにワ
イヤボンディング端子（２６）とキャビティ（２２）内
のＩＣチップ（２３）とをワイヤボンディングにより接
続することによって、従来のＩＣカード用プリント配線
板（２０）は形成されている。ところが、前述のような
従来のＩＣカード用プリント配線板（２０）において
は、基材（２１）の貫通孔（２７）内の導体層（２７
ａ）を介して表面側と裏面側との導通をとるようになっ
ており、基材（２１）の裏面にワイヤボンディング端子
（２６）が形成されていた。そのために、以下に示すよ
うな項目が問題となっている。That is, as shown in Japanese Utility Model Laid-Open No. 58-131656 or FIG. 6, a plurality of through holes (27) are formed in a base material (21) of a printed wiring board (20) for an IC card. A conductor layer (27a) is formed in the through hole (27). The external contact terminal (25) fixed to the front surface side of the base material (21) and the wire bonding terminal (26) formed on the back surface side of the base material (21) through the conductor layer (27a) formed in this manner. , And the wire bonding terminal (26) and the IC chip (23) in the cavity (22) are connected by wire bonding to form a conventional printed wiring board (20) for an IC card. ing. However, in the conventional printed wiring board (20) for an IC card as described above, the conductor layer (27) in the through hole (27) of the base material (21).
The front surface side and the back surface side are electrically connected via a), and the wire bonding terminal (26) is formed on the back surface of the base material (21). Therefore, the following items are a problem.
【０００４】第１に、基材（２１）の貫通孔（２７）が
外部に露出しているため、この貫通孔（２７）中にゴミ
や湿気が容易に侵入し、ボンディングワイヤ（２４）及
びその接点の腐食、あるいはＩＣチップ（２３）の破壊
等が起こりやすい。第２に、基材（２１）の貫通孔（２
７）及びこの内側に導体層（２７ａ）を形成する必要が
あり、このためコスト高となる。第３に、ガラス転移温
度（以下、ガラス転移温度のことをＴｇと略記する）の
低い基材、例えばポリエステル基材等を用いると、金の
ワイヤボンディングが行えず、このため基材（２１）の
材質が制限される。その理由は、従来のＩＣチップ搭載
用基板は、ワイヤボンディングを行うために耐熱性が必
要であり、例えば金のワイヤボンディングにおいては、
１２０〜１５０℃の予熱が基材に加えられる。従って、
ポリエステル基材を用いると基材表面が軟化してしまう
ために、ワイヤボンディングができなかったからであ
る。First, since the through hole (27) of the base material (21) is exposed to the outside, dust and moisture easily enter the through hole (27), and the bonding wire (24) and Corrosion of the contacts or destruction of the IC chip (23) is likely to occur. Secondly, the through hole (2
7) and the conductor layer (27a) needs to be formed on the inside thereof, which increases the cost. Thirdly, when a base material having a low glass transition temperature (hereinafter, the glass transition temperature is abbreviated as Tg), for example, a polyester base material or the like is used, gold wire bonding cannot be performed, and therefore the base material (21) The material is limited. The reason is that the conventional substrate for mounting an IC chip needs heat resistance for wire bonding. For example, in gold wire bonding,
A preheat of 120-150 ° C is applied to the substrate. Therefore,
This is because when the polyester base material is used, the surface of the base material is softened, so that wire bonding cannot be performed.
【０００５】そこで、特開昭６０−６８４８８号公報の
「メモリーカードとその製造方法」にて提案されている
ように、絶縁基板に形成された開口部分の一部を、金属
化したコンタクト部分によって塞ぐことが行われている
が、この公報に記載されている方法によれば、コンタク
ト部分によって塞がれてはいない他の開口部分に、吸引
によって加熱軟化されたプラスチック材料を充填させな
ければならないものであって、これが開口部分からコン
タクト部分の表面側に流れ出ることがあり得るものであ
る。プラスチック材料の一部がコンタクト部分の表面側
に流れ出て硬化すると、この種のＩＣカードの受入装置
内へ挿入を円滑にするための表面平滑性を確保すること
ができないだけでなく、コンタクト部分の表面を絶縁し
てしまうことにもなって、この方法はＩＣカード用のモ
ジュールを製造するには不適当なものなのである。Therefore, as proposed in Japanese Unexamined Patent Publication No. 60-68488, "Memory Card and Manufacturing Method Thereof", a part of the opening formed in the insulating substrate is replaced by a metalized contact part. Although the plugging is performed, according to the method described in this publication, the other opening portion that is not blocked by the contact portion must be filled with the plastic material that has been heated and softened by suction. It is possible that this may flow out from the opening portion to the surface side of the contact portion. If a part of the plastic material flows out to the surface side of the contact portion and hardens, it is not possible to ensure the surface smoothness for smooth insertion of this type of IC card into the receiving device, and also the contact portion This method is unsuitable for manufacturing a module for an IC card because it also insulates the surface.
【０００６】また、この特開昭６０−６８４８８号公報
に記載された方法においては、導電線（接続リード）の
一端を集積回路の端子にハンダ付けし、各他端を開口部
分の一つに挿入し、超音波等によって金属膜の露出面上
に接続するものであるが、そのための金属膜側の条件を
全く考慮していないものである。つまり、ボンディン
グ。端子面明は、金めっきを施しておくことが接続信頼
性を確保する上で有利なのであるが（上記実開昭５８−
１３１６５６号のマイクロフィルム等）、この金めっき
を確実かつ経済的に行う条件、及び特開昭６０−６８４
８８号公報は何等明示していないのである。In the method disclosed in Japanese Patent Laid-Open No. 60-68488, one end of a conductive wire (connection lead) is soldered to a terminal of an integrated circuit, and the other end of the conductive wire (connection lead) is used as one of the openings. It is inserted and connected to the exposed surface of the metal film by ultrasonic waves or the like, but the conditions on the metal film side for that purpose are not considered at all. That is, bonding. It is advantageous to gold-plat the terminal surface in order to secure the connection reliability.
131656, microfilm, etc.), conditions for reliably and economically performing this gold plating, and JP-A-60-684.
The 88 publication does not specify anything.
【０００７】特に、ＩＣカード用プリント配線板におい
ては、コンタクト端子となるべき銅箔をその裏面にて基
材と熱圧着しなければならないが、その接着状態を強固
にするためには、銅箔の裏面にはある程度の粗さが必要
である。ところが、この粗さが余りに粗いと、ここにニ
ッケルめっき、さらに金めっきを施した場合に、粗さが
金めっき表面にそのまま出てしまうことになる。従っ
て、この部分をワイヤボンディング端子とした場合に、
その粗い表面によってボンディングワイヤーの接続を良
好に行えなくなる。つまり、ボンディング特性が非常に
悪いものとなってしまうのである。勿論、この銅箔の粗
い面に形成すべき金めっき層の厚さを厚くすれば、この
金めっき表面は平滑なものとなって良好なボンディング
特性を得られるが、そのためには高価な金を大量に必要
とすることになって、経済的でない。従って、従来技術
の問題項目として、第４に、コンタクト端子に対する金
めっきを、良好なボンディング特性を維持しながら経済
的に行うにはどうしたらよいかの点が明らかになってい
ない。という点を挙げることができるのである。Particularly, in a printed wiring board for an IC card, a copper foil to be a contact terminal must be thermocompression-bonded to the base material on its back surface, but in order to strengthen the adhesion state, the copper foil is required. The back surface of the is required to have some roughness. However, if this roughness is too rough, when nickel plating or gold plating is applied thereto, the roughness will appear on the gold plating surface as it is. Therefore, when this part is used as a wire bonding terminal,
The rough surface prevents good bonding wire connection. In other words, the bonding characteristics will be very poor. Of course, if the thickness of the gold plating layer to be formed on the rough surface of this copper foil is increased, this gold plating surface becomes smooth and good bonding characteristics can be obtained, but for that purpose expensive gold is required. It's not economical because it requires a large amount. Therefore, as the problematic item of the prior art, fourthly, it has not been clarified how to economically perform gold plating on the contact terminal while maintaining good bonding characteristics. That is the point.
【０００８】[0008]
【発明が解決しようとする課題】本発明の目的は、以上
のような問題点を克服し、良好なボンディング特性を有
し、しかも品質の安定した、安価なＩＣカード用プリン
ト配線板を提供することである。SUMMARY OF THE INVENTION An object of the present invention is to provide an inexpensive printed wiring board for an IC card which overcomes the above problems, has good bonding characteristics, and has stable quality. That is.
【０００９】[0009]
【課題を解決するための手段】以上の問題点を解決する
ために、本発明が採った手段は、実施例に対応する図１
及び図２を参照して説明すると、 「表面が外部に露出して外部接点となるコンタクト端子
（１５）を有して、前記コンタクト端子（１５）は基材
に形成された貫通孔（１７）を塞いでおり、その貫通孔
（１７）内のコンタクト端子（１５）裏面に、ニッケル
めっき、さらに金めっきを施し、その部分を搭載される
電子部品（１３）とのワイヤボンディング端子（１６）
とするＩＣカード用プリント配線板であって、前記貫通
孔（１７）内のコンタクト端子裏面（１５）は、銅箔の
粗化面であり、その表面粗さがＲｍａｘ０．１〜８μｍ
であり、前記貫通孔（１７）内のコンタクト端子（１
５）裏面の金めっきは、９９．９％以上の金めっきであ
り、その厚みが０．０１〜０．３μｍであることを特徴
とするＩＣカード用プリント配線板（１０）」 である。Means for Solving the Problems In order to solve the above problems, the means adopted by the present invention is shown in FIG.
2 will be described with reference to "a contact terminal (15) having a surface exposed to the outside and serving as an external contact, the contact terminal (15) being a through hole (17) formed in a base material. Of the contact terminal (15) in the through hole (17) is nickel-plated and then gold-plated, and the portion is wire-bonded with the electronic component (13) to be mounted (16).
In the printed wiring board for an IC card, the back surface (15) of the contact terminal in the through hole (17) is a roughened surface of copper foil, the surface roughness of which is Rmax 0.1 to 8 μm.
And the contact terminal (1) in the through hole (17).
5) The gold plating on the back surface is 99.9% or more gold plating, and the thickness thereof is 0.01 to 0.3 μm. This is a printed wiring board (10) for an IC card ”.
【００１０】[0010]
【作用】本発明が以上のような手段を採ることによっ
て、以下のような作用がある。すなわち、このＩＣカー
ド用プリント配線板にあっては、基材に固着したコンタ
クト端子によって、各貫通孔が完全に塞がれた状態とな
る。このコンタクト端子は、孔を有するものではないか
ら、従来問題となっていた貫通孔からＩＣ実装部分への
ゴミや湿気の侵入は完全に阻止される。また、基材の貫
通孔を塞いだ状態で、基材の表面に固着したコンタクト
端子の裏面を、そのままワイヤボンディング端子とする
ことにより、貫通孔内に導体層を形成する必要がなくな
る。さらに、前記ワイヤボンディング端子は、基材の裏
面に形成されたものではなく、基材の貫通孔を塞いだ銅
箔の裏面に直接形成されるので、基材のＴｇに無関係に
ワイヤボンディングを行なえる。The present invention has the following effects by adopting the above means. That is, in this IC card printed wiring board, each through hole is completely closed by the contact terminal fixed to the base material. Since this contact terminal does not have a hole, dust and moisture are prevented from entering the IC mounting portion through the through hole, which has been a problem in the past. In addition, it is not necessary to form a conductor layer in the through hole by directly using the back surface of the contact terminal fixed to the surface of the base material as the wire bonding terminal with the through hole of the base material closed. Furthermore, since the wire bonding terminal is not formed on the back surface of the base material but is directly formed on the back surface of the copper foil that closes the through hole of the base material, wire bonding can be performed regardless of the Tg of the base material. It
【００１１】そして、本発明においては、各貫通孔内に
露出している銅箔の裏面が粗化面であり、その表面粗さ
がＲｍａｘ０．１〜８μｍであり、しかもこの粗化面に
形成した純度９９．９％以上の金めっき層の厚みが０．
０１〜０．３μｍであるので、各貫通孔内に露出してい
る銅箔をボンディング端子とした場合に、そのボンディ
ング特性が極めて良好なものとなるのである。しかも、
本発明にあっては、金めっき層を０．０１〜０．３μｍ
の厚さにできることによって、高価な金の使用を抑える
ことができて経済的なボンディング端子を有したＩＣカ
ード用プリント配線板とし得るものである。In the present invention, the back surface of the copper foil exposed in each through hole is a roughened surface, the surface roughness is Rmax 0.1 to 8 μm, and the roughened surface is formed. The thickness of the gold plating layer having a purity of 99.9% or more is 0.
Since the thickness is 01 to 0.3 μm, when the copper foil exposed in each through hole is used as a bonding terminal, the bonding characteristic becomes extremely good. Moreover,
In the present invention, the gold plating layer is 0.01 to 0.3 μm.
Since the thickness can be made smaller, the use of expensive gold can be suppressed and the printed wiring board for an IC card having an economical bonding terminal can be obtained.
【００１２】[0012]
【実施例】次に、本発明を図面に示した実施例に基づい
て、さらに詳細に説明する。図１には、本発明に係るＩ
Ｃカード用プリント配線板（１０）が示してある。この
ＩＣカード用プリント配線板（１０）は、主として基材
（１１）と、この基材（１１）に複数形成した貫通孔
（１７）と、ＩＣチップ（１３）を保持するためのキャ
ビティ（１２）と、この基材（１２）に固着したコンタ
クト端子（１５）と、このコンタクト端子（１５）の裏
面に位置するワイヤボンディング端子（１６）とからな
っている。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in more detail based on the embodiments shown in the drawings. FIG. 1 shows the I according to the present invention.
A printed wiring board (10) for a C card is shown. This IC card printed wiring board (10) mainly includes a base material (11), a plurality of through holes (17) formed in the base material (11), and a cavity (12) for holding an IC chip (13). ), A contact terminal (15) fixed to the base material (12), and a wire bonding terminal (16) located on the back surface of the contact terminal (15).
【００１３】基材（１１）は、コンタクト端子（１５）
やＩＣチップ（１３）等を保持し、ＩＣカード用プリン
ト配線板（１０）としての形状を維持するためのもので
あり、この最も代表的なものはガラス繊維強化エポキシ
樹脂からなり、片面接着剤層付のものである。この基材
（１１）としては、上記のようなものの他、紙フェノー
ル、紙エポキシ等の複合材料、トリアジン変性樹脂、ポ
リイミド樹脂フィルム、ポリエステルフィルムなどから
なるリジッドあるいはフレキシブルな材料が用いられ
る。なお、上記片面接着剤層付基材の接着層としては、
通常、未硬化の熱硬化性樹脂、または熱可塑性樹脂が用
いられる。この基材（１１）には、各貫通孔（１７）及
びキャビティ（１２）が形成されるが、これらの貫通孔
（１７）及びキャビティ（１２）はドリル穿孔あるいは
金型による打抜きによって形成されたものである。そし
てこれらの貫通孔（１７）及びキャビティ（１２）の表
面側に銅箔を熱プレス等によって貼り合わせる。レジス
ト形成、エッチング、剥膜等の工程を経てコンタクト端
子（１５）は形成される。もちろん、このコンタクト端
子（１５）は何等の孔を有するものではない。従って、
これら各コンタクト端子（１５）により、貫通孔（１
７）は完全に塞がった状態となる。The base material (11) is a contact terminal (15).
It is for holding the IC chip (13) and the like and maintaining the shape as the printed wiring board (10) for an IC card. The most typical one is made of glass fiber reinforced epoxy resin and has a single-sided adhesive. Layered. As the base material (11), in addition to the above materials, a rigid or flexible material such as a composite material such as paper phenol or paper epoxy, a triazine-modified resin, a polyimide resin film, a polyester film or the like is used. In addition, as the adhesive layer of the substrate with a single-sided adhesive layer,
Usually, an uncured thermosetting resin or a thermoplastic resin is used. Through holes (17) and cavities (12) are formed in the base material (11), and the through holes (17) and cavities (12) are formed by drilling or punching with a die. It is a thing. Then, a copper foil is attached to the surface side of the through hole (17) and the cavity (12) by hot pressing or the like. The contact terminal (15) is formed through steps such as resist formation, etching, and film removal. Of course, this contact terminal (15) does not have any holes. Therefore,
Through each of these contact terminals (15), the through hole (1
7) is completely closed.
【００１４】さらには、銅箔の裏面を、電解研摩あるい
は化学研摩などによって平滑化し、ワイヤボンディング
端子（１６）上の表面粗さを調整する。もちろん、銅箔
の表面粗さを調整するかわりに、はじめから裏面が平滑
な圧延箔を用いることにより、ワイヤボンディング端子
（１６）上の表面粗さを調整してもよい。特に、銅箔の
裏面に形成されているワイヤボンディング端子（１６）
の表面を平滑化し、その表面粗さを０．１〜８μｍにす
ることにより、金めっき厚が０．３μｍ以下の場合であ
っても、充分なボンディングの信頼性が得られるように
なる。実際に、金めっき厚０．０５μｍの製品に、Ａｌ
（Ｓｉが１％）３２μｍφワイヤを使って超音波ボンデ
ィングを行った際の図５に示すモードｂにおける強度を
表１に示す。また、金めっき厚０．３μｍのボンディン
グ端子上にＡｌ（Ｓｉが１％）３２μｍφワイヤを使っ
て超音波ボンディングを行った際のボンディング端子の
表面粗さ（Ｒｍａｘ）と界面剥がれ（図５に示すモード
ａ，ｅ）の発生率を図４に示す。Further, the back surface of the copper foil is smoothed by electrolytic polishing or chemical polishing to adjust the surface roughness on the wire bonding terminal (16). Of course, instead of adjusting the surface roughness of the copper foil, the surface roughness on the wire bonding terminal (16) may be adjusted by using a rolled foil having a smooth back surface from the beginning. In particular, wire bonding terminals (16) formed on the back surface of the copper foil
By smoothing the surface of and the surface roughness of 0.1 to 8 μm, sufficient bonding reliability can be obtained even when the gold plating thickness is 0.3 μm or less. Actually, for products with a gold plating thickness of 0.05 μm, Al
Table 1 shows the strength in mode b shown in FIG. 5 when ultrasonic bonding is performed using a 32 μmφ wire (Si is 1%). Further, the surface roughness (Rmax) of the bonding terminal and the interface peeling when ultrasonic bonding was performed on a bonding terminal having a gold plating thickness of 0.3 μm using an Al (Si is 1%) 32 μmφ wire (shown in FIG. 5). The occurrence rates of modes a and e) are shown in FIG.
【００１５】[0015]
【表１】 [Table 1]
【００１６】予め平滑化した銅箔に、ニッケルめっき、
さらに金めっきが施されたワイヤボンディング端子（１
６）とＩＣチップ（１３）とを金ワイヤあるいはアルミ
ワイヤ等により接続する。この際、ワイヤボンディング
端子（１６）の金めっきを９９．９％以上の金めっきと
し、その厚みを０．０１〜０．３μｍとするのが好適で
ある。これは、図３に示すように、０．０１μｍ未満で
あると界面剥がれ発生率が増加するためであり、また、
０．３μｍで界面剥がれ発生率を０％とすることがで
き、０．３μｍ以上にしてもあまり意味がなく、経済的
でないためである。電解箔裏面（Ｒｍａｘ８μｍ）を下
地としたボンディング端子上にＡｌ（Ｓｉが１％）３２
μｍφワイヤを使って超音波ボンディングを行った際の
金めっき厚と界面剥がれ（図５に示すモードａ，ｅ）の
発生率を図３に示す。金ワイヤあるいはアルミワイヤ等
の接続の手段としては、超音波ボンディングや超音波熱
圧着併用ボンディングが一般的である。[0016] Nickel plating,
In addition, gold-plated wire bonding terminals (1
6) and the IC chip (13) are connected by a gold wire, an aluminum wire or the like. At this time, it is preferable that the gold plating of the wire bonding terminal (16) is 99.9% or more and the thickness thereof is 0.01 to 0.3 μm. This is because, as shown in FIG. 3, if it is less than 0.01 μm, the occurrence rate of interface peeling increases, and
This is because the occurrence rate of interfacial peeling can be set to 0% at 0.3 μm, and if 0.3 μm or more, there is little meaning and it is not economical. Al (Si is 1%) 32 on the bonding terminal using the back surface of electrolytic foil (Rmax 8 μm) as a base.
FIG. 3 shows the gold plating thickness and the occurrence rate of interface peeling (modes a and e shown in FIG. 5) when ultrasonic bonding was performed using a μmφ wire. Ultrasonic bonding or ultrasonic thermocompression bonding is generally used as a means for connecting gold wires or aluminum wires.
【００１７】次に、本発明の最も代表的なものを具体的
数値を挙げて説明する。 実施例１ ０．１３ｍｍ厚さ（以下、ｍｍ厚さのことをｔと略記す
る）のガラスエポキシ樹脂基板（利昌工業製、商品名Ｅ
Ｓ−３５２４、片面０．０２５ｔ接着剤層付）を用い
て、キャビティ孔及び直径１．０ｍｍ（以下、ｍｍ直径
のことをφと略記する）の貫通孔（１７）を金型により
打抜き、０．０７ｔの電解銅箔を接着剤層面に熱圧着プ
レスにより接着する。レジスト形成及びエッチングの
後、貫通孔内の銅箔面を化学研摩により平滑化し、電解
ニッケルめっき３μｍ、電解金めっき０．３μｍを施す
ことにより、図１に示すような本発明に係るＩＣカード
用プリント配線板（１０）を得た。Next, the most typical example of the present invention will be described by giving specific numerical values. Example 1 A glass epoxy resin substrate having a thickness of 0.13 mm (hereinafter, the thickness of mm is abbreviated as t) (manufactured by Risho Kogyo, trade name E)
A cavity hole and a through hole (17) having a diameter of 1.0 mm (hereinafter, the mm diameter is abbreviated as φ) are punched out with a die using S-3524, 0.025 t adhesive layer on one side, and 0 An electrolytic copper foil of 0.07t is bonded to the adhesive layer surface by a thermocompression bonding press. After the resist formation and etching, the copper foil surface in the through hole is smoothed by chemical polishing, and electrolytic nickel plating 3 μm and electrolytic gold plating 0.3 μm are applied to the IC card according to the present invention as shown in FIG. A printed wiring board (10) was obtained.
【００１８】実施例２ 片面０．０２５ｔ接着剤層付の０．１ｔポリエステル基
材（東レ製、商品名ルミラー １００Ｓ）を用いて、キ
ャビティ部及び１．０φの貫通孔（１７）を金型により
打ち抜いた後、０．０３５ｔの圧延銅箔を熱圧着プレス
により接着し、レジスト形成及びエッチングの後、無電
解めっき０．０１μｍを施すことにより、図１に示すよ
うなＩＣカード用プリント配線板（１０）を得た。Example 2 A 0.1 t polyester base material (trade name: Lumirror 100S, manufactured by Toray) having a 0.025 t adhesive layer on one side was used to form a cavity portion and a through hole (17) of 1.0φ by a mold. After punching, 0.035 t of rolled copper foil is bonded by thermocompression bonding, resist formation and etching are performed, and then electroless plating of 0.01 μm is performed, so that a printed wiring board for an IC card as shown in FIG. 10) was obtained.
【００１９】[0019]
【効果】本発明は、ＩＣチップ（１３）及びその結線部
の封止を、簡単な構成によって確実に行うことができ
る。しかも、ゴミや湿気の侵入を確実に防止することが
できるＩＣカード用プリント配線板を提供することがで
きるのである。すなわち、当該ＩＣカード用プリント配
線板のボンディングの接点部分、ワイヤボンディング端
子、ボンディングワイヤ、ＩＣチップにおける腐食及び
断線等の劣化を防ぐことができ、ＩＣカード用プリント
配線板としての信頼性を高めることができるのである。
また、従来のＩＣチップ搭載用基板は、ワイヤボンディ
ングを行うために耐熱性が必要であり、例えば金のワイ
ヤボンディングにおいては、１２０〜１５０℃の予熱が
基材に加えられる。従って、ポリエステル基材を用いる
と基材表面が軟化してしまうためにワイヤボンディング
ができなかった。これに対して、本発明のＩＣカード用
プリント配線板は、ワイヤボンディング端子が銅箔上に
形成されているので、基材のＴｇに関係なく良好なボン
ディングができるのである。さらには、本発明のＩＣカ
ード用プリント配線板は、貫通孔内に導体層を形成する
必要がないので、製造工程が簡素化され、基板の製造コ
ストの低減を図ることができる。[Effects] According to the present invention, the IC chip (13) and its connecting portion can be reliably sealed with a simple structure. Moreover, it is possible to provide a printed wiring board for an IC card that can reliably prevent dust and moisture from entering. That is, it is possible to prevent deterioration such as corrosion and disconnection in the bonding contact portion of the IC card printed wiring board, the wire bonding terminal, the bonding wire, and the IC chip, and improve the reliability as the IC card printed wiring board. Can be done.
Further, the conventional substrate for mounting an IC chip needs heat resistance to perform wire bonding, and for example, in wire bonding of gold, preheating at 120 to 150 ° C. is applied to the base material. Therefore, when the polyester base material is used, the surface of the base material is softened, so that wire bonding cannot be performed. On the other hand, in the IC card printed wiring board of the present invention, since the wire bonding terminals are formed on the copper foil, good bonding can be performed regardless of the Tg of the base material. Further, in the printed wiring board for an IC card of the present invention, since it is not necessary to form the conductor layer in the through hole, the manufacturing process can be simplified and the manufacturing cost of the board can be reduced.
【００２０】そして、本発明のＩＣカード用プリント配
線板によれば、各貫通孔内に露出している銅箔の裏面が
粗化面であり、その表面粗さがＲｍａｘ０．１〜８μｍ
であり、しかもこの粗化面に形成した金めっき層は厚さ
０．０１〜０．３μｍで９９．９％以上の金めっきであ
るので、各貫通孔内に露出している銅箔をボンディング
端子とした場合に、そのボンディング特性を極めて良好
なものとすることができるのである。しかも、このＩＣ
カード用プリント配線板によれば、金めっき層を０．０
１〜０．３μｍの厚さにできることによって、高価な金
の使用を抑えることができて経済的なものとすることが
できるのである。According to the printed wiring board for an IC card of the present invention, the back surface of the copper foil exposed in each through hole is a roughened surface, and the surface roughness is Rmax 0.1 to 8 μm.
Moreover, since the gold plating layer formed on the roughened surface has a thickness of 0.01 to 0.3 μm and is 99.9% or more of gold plating, the copper foil exposed in each through hole is bonded. When it is used as a terminal, its bonding characteristics can be made very good. Moreover, this IC
According to the printed wiring board for cards, the gold plating layer is 0.0
The thickness of 1 to 0.3 μm makes it possible to suppress the use of expensive gold and make it economical.
【図面の簡単な説明】[Brief description of drawings]
【図１】本発明に係るＩＣカード用プリント配線板にＩ
Ｃチップを搭載した状態を示す断面図。FIG. 1 shows a printed wiring board for an IC card according to the present invention.
Sectional drawing which shows the state which mounted the C chip.
【図２】図１のワイヤボンディング端子部の部分拡大断
面図。FIG. 2 is a partially enlarged sectional view of the wire bonding terminal portion of FIG.
【図３】金めっき厚と界面剥がれ発生率との関係を示す
グラフ。FIG. 3 is a graph showing the relationship between gold plating thickness and interface peeling occurrence rate.
【図４】表面粗さと界面剥がれの発生率との関係を示す
グラフ。FIG. 4 is a graph showing the relationship between surface roughness and the occurrence rate of interfacial peeling.
【図５】各モードを示す断面図。FIG. 5 is a cross-sectional view showing each mode.
【図６】従来のＩＣカード用プリント配線板にＩＣチッ
プを搭載した状態を示す断面図。FIG. 6 is a cross-sectional view showing a state in which an IC chip is mounted on a conventional printed wiring board for an IC card.
１０：ＩＣカード用プリント配線板 １１：基材
１２：キャビティ １３：ＩＣチップ １４：ボンディングワイヤ
１５：コンタクト端子 １６：ワイヤボンディング端子 １７：貫通孔10: Printed wiring board for IC card 11: Base material
12: Cavity 13: IC chip 14: Bonding wire
15: Contact terminal 16: Wire bonding terminal 17: Through hole
Claims (1)
ンタクト端子を有して、前記コンタクト端子は基材に形
成された貫通孔を塞いでおり、その貫通孔内のコンタク
ト端子裏面に、ニッケルめっき、さらに金めっきを施
し、その部分を搭載される電子部品とのワイヤボンディ
ング端子とするＩＣカード用プリント配線板であって、
前記貫通孔内のコンタクト端子裏面は、銅箔の粗化面で
あり、その表面粗さがＲｍａｘ０．１〜８μｍであり、
前記貫通孔内のコンタクト端子裏面の金めっきは、９
９．９％以上の金めっきであり、その厚みが０．０１〜
０．３μｍであることを特徴とするＩＣカード用プリン
ト配線板1. A contact terminal having a surface exposed to the outside to serve as an external contact, the contact terminal closing a through hole formed in a base material, and the contact terminal rear surface in the through hole, A printed wiring board for an IC card, which is nickel-plated and further gold-plated, and uses that portion as a wire bonding terminal for mounting an electronic component,
The contact terminal back surface in the through hole is a roughened surface of copper foil, and the surface roughness is Rmax 0.1 to 8 μm,
The gold plating on the back surface of the contact terminal in the through hole is 9
Gold plating of 9.9% or more, with a thickness of 0.01-
Printed wiring board for IC card characterized by being 0.3 μm
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7110187A JP2660397B2 (en) | 1995-04-10 | 1995-04-10 | Printed wiring board for IC card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7110187A JP2660397B2 (en) | 1995-04-10 | 1995-04-10 | Printed wiring board for IC card |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62091505A Division JPH0615275B2 (en) | 1987-04-13 | 1987-04-13 | Printed wiring board for IC card |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07276871A true JPH07276871A (en) | 1995-10-24 |
| JP2660397B2 JP2660397B2 (en) | 1997-10-08 |
Family
ID=14529258
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7110187A Expired - Lifetime JP2660397B2 (en) | 1995-04-10 | 1995-04-10 | Printed wiring board for IC card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2660397B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007300121A (en) * | 2006-04-28 | 2007-11-15 | Infineon Technologies Ag | Chip module, chip card and their manufacturing method |
| US7728422B2 (en) | 2007-02-21 | 2010-06-01 | Samsung Electronics Co., Ltd. | Semiconductor package, integrated circuit cards incorporating the semiconductor package, and method of manufacturing the same |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0615275A (en) * | 1992-06-30 | 1994-01-25 | Showa Kikai Shoji Kk | Method for washing electrode plate for oil-containing waste water purifying treatment |
-
1995
- 1995-04-10 JP JP7110187A patent/JP2660397B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0615275A (en) * | 1992-06-30 | 1994-01-25 | Showa Kikai Shoji Kk | Method for washing electrode plate for oil-containing waste water purifying treatment |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007300121A (en) * | 2006-04-28 | 2007-11-15 | Infineon Technologies Ag | Chip module, chip card and their manufacturing method |
| US7728422B2 (en) | 2007-02-21 | 2010-06-01 | Samsung Electronics Co., Ltd. | Semiconductor package, integrated circuit cards incorporating the semiconductor package, and method of manufacturing the same |
| US8329507B2 (en) | 2007-02-21 | 2012-12-11 | Samsung Electronics Co., Ltd. | Semiconductor package, integrated circuit cards incorporating the semiconductor package, and method of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2660397B2 (en) | 1997-10-08 |
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