TW550714B - Bonding material, semiconductor device, method of manufacturing semiconductor device, circuit board and electronic device - Google Patents

Bonding material, semiconductor device, method of manufacturing semiconductor device, circuit board and electronic device Download PDF

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Publication number
TW550714B
TW550714B TW089102447A TW89102447A TW550714B TW 550714 B TW550714 B TW 550714B TW 089102447 A TW089102447 A TW 089102447A TW 89102447 A TW89102447 A TW 89102447A TW 550714 B TW550714 B TW 550714B
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TW
Taiwan
Prior art keywords
resin
layer
semiconductor device
semiconductor wafer
bonding member
Prior art date
Application number
TW089102447A
Other languages
Chinese (zh)
Inventor
Nobuaki Hashimoto
Original Assignee
Seiko Epson Corp
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Publication date
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Publication of TW550714B publication Critical patent/TW550714B/en

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    • H—ELECTRICITY
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

This invention provides a bonding material, a semiconductor device, a method of manufacturing semiconductor device, a circuit board and an electronic device. A semiconductor device (1) comprises a semiconductor chip (10), a substrate (20) with wiring patterns (22), and bonding material (30) that connects the semiconductor chip (10) and the wiring patterns (22) electrically. The bonding material (30) has a two-layer structure which includes a first layer (32) having a first resin base and opposed to the semiconductor chip (10) and a second layer (34) having a second resin base and opposed to the substrate (20). The first resin and the second resin have different physical properties such as thermal expansion coefficient.

Description

550714 A7 B7 五、發明說明（1 )550714 A7 B7 V. Description of the invention (1)

〔技術領域-L 本發明係有關於一種接著構件，半導體裝置及其製造 方法，電路基板以及電子機器。 〔背景技術〕 半導體晶片與基板，就熱膨脹係數而言，多半是大不 相同的，尤其是加熱後被冷卻時，因熱膨脹係數之差而產 生的應力，會加諸在接著構件。有可能會產生接著構件剝 離。 甚至例如利用各向異性導電接著構件做爲接著構件時 ，利用半導體晶片及基板，對各向異性導電膜進行加壓時 ，會在半導體晶片的突出電極和形成在基板的配線圖型之 間，殘留導電粒子，而難以流出絕緣樹脂的情形。 '該些問題乃起因於針對接著構件的兩面，被要求爲不 同的性質，然習知接著構件卻無法對應此一要求。 本發明爲解決如上所述之課題的發明，其目的在於提 供一種可因應兩面爲不同性質要求的接著構件，使用此之 半導體裝置及其製造方法，電路基板以及電子機器。 〔發明之揭示〕 (1 )有關本發明之接著構件，被使用來接著電子零 件，就厚度方向而言.，其物性不同。 按此，因就接著構件的兩面而言，其物性不同，可構 成適合被接著在各面的材料。 本纸張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） -4- (請先閱讀背面之注意事項再IPk本頁)[Technical Field-L The present invention relates to a bonding member, a semiconductor device and a manufacturing method thereof, a circuit board, and an electronic device. [Background Art] The thermal expansion coefficients of semiconductor wafers and substrates are largely different. Especially when they are cooled after heating, the stress caused by the difference in thermal expansion coefficients is applied to the adhering members. There may be peeling of the adhering member. Even when an anisotropic conductive bonding member is used as the bonding member, for example, when a semiconductor wafer and a substrate are used to press the anisotropic conductive film, a protruding electrode on the semiconductor wafer and a wiring pattern formed on the substrate are formed. When conductive particles remain and it is difficult to flow out of the insulating resin. 'These problems are caused by the different properties of the two sides of the adhering component, but the conventional adhering component cannot meet this requirement. The present invention is an invention that solves the problems described above, and an object thereof is to provide a semiconductor device, a method for manufacturing the same, a circuit board, and an electronic device that can be used in accordance with the bonding members whose two sides have different properties. [Disclosure of Invention] (1) The bonding member of the present invention is used to bond electronic parts, and its physical properties are different in terms of thickness. According to this, because the two sides of the bonding member have different physical properties, it is possible to constitute a material suitable for being bonded to each side. This paper size applies to China National Standard (CNS) A4 (210 x 297 mm) -4- (Please read the precautions on the back before IPk this page)

-線_ 經濟部智慧財產局員工消費合作社印製 550714 A7 B7 五、發明說明（2 ) (2I此接著構件可爲各向異性導電膜。 連各向異性導電膜也可構成適合被接著在各面的材料 〇 (3 )此接著構件係做成以第1樹脂爲基材之第1層 、和以第2樹脂爲基材之第2層的兩層構造，且前述第1 樹脂與第2樹脂，具有不同的物性。 按此，構成第1層之第1樹脂和構成第2層之第2樹 脂，具有不同的物性。因而，欲具有適合密貼在第1層之 構件、和密貼在第2層之構件的物性，可選擇第1樹脂和 第2樹脂。 (4) 就此接著構件而言， 前述第1樹脂之熱膨脹係數係較前述第2樹脂之熱膨 脹係數小。 按此，第1層乃密貼熱膨脹係數小的構件，第2層密 貼熱膨脹係數大的構件時，因具有各別對應第1及第2樹 脂的熱膨脹係數，故不易產生剝離。 (5) 就此接著構件而言， 矽系塡充物只混入前述第1樹脂。 經濟部智慧財產局員工消費合作社印製 如此一來，第1樹脂之熱膨脹係數小，詳細而言爲接 近矽之熱膨脹係數。 (6 )就此接著構件而言，矽系塡充物係被混入前述 第1樹脂及前述第2樹脂，對前述第1樹脂的前述矽系塡 充物之混入率，則較第2樹脂之前述矽系塡充物的混入率 爲大。 本纸張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） -5- 550714 A7 __ B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（3 ) 如此一來，第1樹脂的熱膨脹係數較第2樹脂的熱膨 脹係數爲小，詳細而言爲接近矽之熱膨脹係數。 (7) 就此接著構件而言， 前述第2樹脂彈性化較前述第1樹脂低。 如此一來，第2層密貼熱膨張係數大的構件時，因第 2樹脂易延伸，且隨動性高，故不易剝離。 (8) 就此接著構件而言， 前述第2樹脂可爲被變成的環氧樹脂。 按此，第2樹脂即可爲低彈性化。 (9) 就此接著構件而言， 前述第1樹脂爲環氧樹脂。 前述第2樹脂可爲聯苯樹脂。 按此，第2樹脂彈性化較第1樹脂低。 (1 0 )就此接著構件而言， 導電粒子只被分散在前述第2樹脂。 如此一來，因導電粒子不會接觸到密貼在第1層的構 件表面，就不會產短路。 (1 1 )就此接著構件而言， 導電粒子只被分散在前述第2樹脂， 前述第2層厚度比前述第1層薄，前述第2樹脂溶融 時的粘度較前述第1樹脂高。 按此，因導電粒子只被分散在第2樹脂，導電粒子不 會接觸到密貼在第1層的構件表面之故，因此不會產生短 路。又因第2層較第1層薄，導電粒子數量少，可防止短 (請先閱讀背面之注意事項-Line_ Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 550714 A7 B7 V. Description of the Invention (2) (2I This bonding member can be an anisotropic conductive film. Even the anisotropic conductive film can also be constructed to be suitable for being attached to each Material of the surface 〇 (3) This adhesive member has a two-layer structure with a first layer using a first resin as a base material and a second layer using a second resin as a base material, and the first resin and the second resin are Resins have different physical properties. According to this, the first resin constituting the first layer and the second resin constituting the second layer have different physical properties. Therefore, it is desirable to have a member suitable for adhesion to the first layer and adhesion. For the physical properties of the second layer member, the first resin and the second resin can be selected. (4) In terms of the following members, the thermal expansion coefficient of the first resin is smaller than the thermal expansion coefficient of the second resin. The first layer is a member having a small thermal expansion coefficient, and the second layer is a member having a large thermal expansion coefficient, because it has the thermal expansion coefficients corresponding to the first and second resins, so it is not easy to peel off. In other words, the silicon-based filler is mixed with the first resin only. The Ministry of Intellectual Property Bureau ’s consumer cooperative has printed this way. The thermal expansion coefficient of the first resin is small, in detail, it is close to the thermal expansion coefficient of silicon. (6) As far as the next component is concerned, the silicon-based filling material system is mixed into the aforementioned The mixing ratio of the 1 resin and the second resin to the silicon-based filler of the first resin is larger than the mixing ratio of the silicon-based filler to the second resin. This paper applies the Chinese national standard (CNS) A4 specification (210 x 297 mm) -5- 550714 A7 __ B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (3) In this way, the thermal expansion coefficient of the first resin is higher than that of the second resin The coefficient of thermal expansion is small, in detail, it is close to the coefficient of thermal expansion of silicon. (7) In this case, the second resin is less elastic than the first resin. In this way, the second layer is closely adhered to the thermal expansion coefficient. In the case of a large member, the second resin is easy to extend and has a high followability, so it is not easy to peel off. (8) In the case of this bonded member, the second resin may be an epoxy resin that is changed. In this way, the second resin Can be low elasticity. 9) For the bonding member, the first resin is epoxy resin. The second resin may be biphenyl resin. According to this, the second resin is less elastic than the first resin. (1 0) In terms of the bonding member, The conductive particles are dispersed only in the aforementioned second resin. In this way, since the conductive particles will not contact the surface of the member that is closely adhered to the first layer, a short circuit will not occur. (1 1) As far as the next member is concerned, the conductive The particles are dispersed only in the second resin, the thickness of the second layer is thinner than that of the first layer, and the viscosity of the second resin when melted is higher than that of the first resin. Accordingly, the conductive particles are dispersed only in the second resin. Because the conductive particles do not contact the surface of the component that is closely adhered to the first layer, a short circuit does not occur. Because the second layer is thinner than the first layer, the number of conductive particles is small, which can prevent shortness (please read the precautions on the back first)

本頁) 訂j. 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）-6- 550714 A7 B7 五、發明說明（4 ) 路。甚至不管導電粒子數量多少，只要第2樹脂的 度高，導電粒子就會確實地保 第2樹脂低的第1樹脂，就易 (12)就此接著構件而 矽系塡充物只被混入前述 溶融粘 另一方面，溶融粘度比 經濟部智慧財產局員工消費合作社印製 如此一來，即可提高第2 (13) 就此接著構件而 矽系塡充物被混入前述第 第2樹脂的前述矽系塡充的混 矽系塡充物的混入率大。 如此一來，即可提高第2 (14) 就此接著構件而 前述第2樹脂的分子量可 如上一來，即可提高.第2 (15) 有關本發明之半 晶片、和形成配線圖型之基板 片與前述配線圖型之接著構件 前述接著構件，就厚度方 按此，就接著構件的兩面 適合被接著在各面的材料。 (16) 就半導體裝置而 前述接著構件可爲各向異 連各向異性導電膜也可構 流出。 言， 第2樹脂。 樹脂的溶融粘度。 言， 1樹脂及第2樹脂，對前述 入率，可較第1樹脂的前述 樹脂的溶融粘度。 言， 較前述第1樹脂大。 樹脂的溶融粘度。 導體裝置，係包括：半導體 、和導電連接前述半導體晶 > 向而言，其物性不同。 來看，其物性不同，可構成 言， 性導電膜。 成適合被接著在各面的材料 本纸張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 請 先 閱 讀 背 φ 之 注 意 事 項This page) Order j. This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -6-550714 A7 B7 V. Description of the invention (4) Road. Regardless of the number of conductive particles, as long as the degree of the second resin is high, the conductive particles will surely keep the first resin with the second resin low, and it is easy (12) to follow the component and the silicon based filler is only mixed into the aforementioned melt On the other hand, the melt viscosity is higher than that printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, which can improve the second (13) component, and the silicon-based filler is mixed into the aforementioned silicon-based second resin. The mixing rate of the mixed silicon based fillings is large. In this way, the second (14) component can be increased and the molecular weight of the second resin can be increased as described above. The second (15) semi-chip of the present invention and the substrate forming the wiring pattern can be increased. According to the thickness of the sheet and the bonding member of the wiring pattern described above, the two sides of the bonding member are suitable for the material to be bonded to each side. (16) In the case of a semiconductor device, the aforementioned bonding member may be an anisotropically connected anisotropic conductive film or may be structured to flow out. In other words, the second resin. Melt viscosity of the resin. In other words, the first resin and the second resin can have a higher melt ratio than the first resin's melt viscosity. In other words, it is larger than the first resin. Melt viscosity of the resin. The conductor device includes: a semiconductor, and the semiconductor crystal which is conductively connected to the semiconductor device. The physical properties are different from each other. It can be seen that its physical properties are different, and it can form a conductive film. This material is suitable for being adhered to all sides. The paper size is in accordance with the Chinese National Standard (CNS) A4 (210 X 297 mm). Please read the note of φ first.

頁 訂 線 550714 Α7 __ Β7 經濟部智慧財產局員工消費合作社印製 五、發明說明（5 ) (1 7. λ就半導體裝置而言， 前述接著構件·亦可做成以第1樹脂爲基材，被配置在 則述半導體晶片之第1層、和以第2樹脂爲基材，被配置 在前述基板之第2層的兩層構造，且前述第1樹脂與前述 第2樹脂具有不同的物性。因而，欲具有分別適合密貼在 第1層的半導體晶片和密貼在第2層的基板的物性，即可 選擇第1樹脂與第2樹脂。 (1 8 )就此半導體裝置而言， 前述接著構件可爲上述之接著構件。 (1 9 )上述半導體裝置可被搭載在有關本發明之電 路基板。 (2 0 )有關本發明之電子機器係具備有上述半導體 裝置。 (2 1 )有關本發明之半導體裝置之製造方法，係包 括：在半導體晶片和形成配線圖型的基板之前述配線圖型 間，設接著構件，並予以加壓前述半導體晶片和前述基板 ，且對前述半導體晶片和配線圖型進行導電連接的工程； 前述接著構件，就厚度方向而言，其物性不同。 按此，因就接著構件而言，其物性不同，可構成適合 被接著在各面的材料。 (2 2 )就此半導體裝置之製造方法而言’ 前述接著構件可爲各向異性導電膜。 連各向異性導電膜也可構成適合被接著在各面的材料 (請先閱讀背面之注意. 事項再 本頁) 裝 訂· •線- 本纸張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -8 - 550714 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（6 ) (2 3_>.就半導體裝置之製造方法而言’ 可將前述接著構件設爲以第1樹脂爲基材之第1層、 和以具有與前述第1樹脂不同物性的第2樹脂爲基材之第 2層的兩層構造。 按此，接著構件之構成第1層的第1樹脂和構成第2 層的第2樹脂，具有不同的物性。因而欲具有適合密貼在 半導體晶片及基板的物性，可選擇第1樹脂及第2樹脂。 (2 4 )就此半導體裝置之製造方法而言， 可依序設置前述第1及第2層。 (2 5 )就此半導體裝置之製造方法而言， 即可將前述第1層配置在前述半導體晶片，還可將前 述第2層配置在前述基板。 按此，欲具有分別適合密貼在第1層的半導體晶片和 密貼在第2層的基板之物性，可選擇第1樹脂和第2樹脂 〇 (2 6 )就半導體裝置之製造方法而言， 前述接著構件爲可上述之接著構件。 〔用以實施發明之最佳形態〕 以下，針對本發明之最佳實施形態’參照圖面做一說 明。 第1 A圖至第1 C圖係表示有關本發明之實施形態之 半導體裝置之製造方法圖。第1 C圖係表示利用其製造所 完成之半導體裝置1。半導體裝置1係包括：半導體晶片 (請先閱讀背面之注意事項 !裝—— 本頁) -丨線· 本纸張瓦度適用中國國家標準（CNS)A4規格（210x 297公釐） -9- 550714 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（7 ) 1 0、和基_板2 0。半導體晶片1 〇之平面形狀爲矩形（ 正方形或長方形）時，至少沿著一邊（包括相對之二邊或 所有的邊），在半導體晶片之一方的面（能動面）， 形成複數電極1 2。或者亦可在半導體晶片1 〇之一方的 面之中央，形成複數電極1 2。在電極1 2多半是利用焊 球、金線球、鍍金等來設置突出電極1 4，但並非必須。 電極12本身也可做成突出電極的形狀。電極12和突出 電極1 4之間，爲突出電極金屬的擴散防止層，可附加鎳 、鉻、欽等。 基板2 0的全體形狀並未特別加以限制，可做成半導 體晶片1 0的平面形狀之相似形。基板2 0的厚度多半根 據其材質來決定，但此並不受限制。基板2 0可由有機系 或無機系之任一材料所形成，也可由該些複合構造所構成 ，但以沖孔爲佳。可對由有機系材料形成的錐狀可撓性基 板進行沖孔，形成基板2 0。 基板可用多層基或組合型基板。利用組合型基板和多 層基板時，因只要在平面擴大的最主層上形成配線圖型， 成爲無多餘配線圖型之微去光阻構.造，即可提升信號的傳 送物性。 在基板2 0之一方的面，形成複數配線（引線），以 構成配線圖型2 2。複數配線中之至少一個或全部，不與 其他配線導電連接爲獨立的電性。或是複數配線中，被 連接在半導體晶片1 0的電源和接地等共通的情形下，可 互相連接。在各個配線的兩端，形成條紋部。條紋部多半 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐) ^10- (請先閱讀背面之注意事項本頁)Page order line 550714 Α7 __ Β7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (5) (1 7. λ In the case of semiconductor devices, the aforementioned bonding members can also be made with the first resin as the base material Is arranged on the first layer of the semiconductor wafer and a two-layer structure with the second resin as a base material and on the second layer of the substrate, and the first resin and the second resin have different physical properties. Therefore, in order to have physical properties suitable for the semiconductor wafer adhered to the first layer and the substrate adhered to the second layer, respectively, the first resin and the second resin can be selected. (1 8) In this semiconductor device, the aforementioned The bonding member may be the bonding member described above. (19) The semiconductor device may be mounted on the circuit board of the present invention. (20) The electronic device of the present invention is provided with the semiconductor device. (2 1) The method for manufacturing a semiconductor device according to the invention includes: providing a bonding member between the semiconductor wafer and the wiring pattern on which the wiring pattern is formed, and applying pressure to the semiconductor wafer and the substrate, and The semiconductor wafer and the wiring pattern are conductively connected; the bonding member has different physical properties in terms of thickness direction. According to this, because the bonding member has different physical properties, it is possible to form a bonding device suitable for being bonded on each side. (2 2) In terms of the manufacturing method of this semiconductor device, the aforementioned bonding member may be an anisotropic conductive film. Even the anisotropic conductive film may constitute a material suitable for being bonded on each side (please read the note on the back first) . Matters on this page) Binding · Thread-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -8-550714 A7 B7 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Explanation (6) (2 3_ >. With regard to the method of manufacturing a semiconductor device, the aforementioned bonding member may be a first layer using a first resin as a base material, and a second layer having a physical property different from that of the first resin. The resin is a two-layer structure of the second layer of the base material. According to this, the first resin that constitutes the first layer and the second resin that constitutes the second layer of the member have different physical properties. Therefore, it is desirable to have a suitable adhesion to the semiconductor For the physical properties of the sheet and the substrate, the first resin and the second resin can be selected. (2 4) In terms of the manufacturing method of the semiconductor device, the aforementioned first and second layers can be provided in sequence. (2 5) Manufacturing of the semiconductor device In terms of the method, the first layer can be arranged on the semiconductor wafer, and the second layer can be arranged on the substrate. According to this, it is desirable to have a semiconductor wafer suitable for being adhered to the first layer and an adherence to the first layer respectively. For the physical properties of the two-layer substrate, the first resin and the second resin can be selected. (2 6) In terms of the method of manufacturing a semiconductor device, the aforementioned bonding member is the aforementioned bonding member. Hereinafter, the best embodiment of the present invention will be described with reference to the drawings. 1A to 1C are diagrams showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. Fig. 1C shows a semiconductor device 1 completed by its manufacturing. The semiconductor device 1 series includes: semiconductor wafers (please read the precautions on the back first! Installation-this page)-line · This paper's wattage applies to China National Standard (CNS) A4 specification (210x 297 mm) -9- 550714 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the Invention (7) 1 0 and Base_Board 2 0. When the planar shape of the semiconductor wafer 10 is rectangular (square or rectangular), a plurality of electrodes 12 are formed on at least one side (including two opposite sides or all sides) of one side (active surface) of the semiconductor wafer. Alternatively, a plurality of electrodes 12 may be formed in the center of one of the surfaces of the semiconductor wafer 10. The electrodes 12 are mostly provided with a solder ball, a gold wire ball, gold plating, etc. to provide the protruding electrode 14, but this is not necessary. The electrode 12 itself may be formed in the shape of a protruding electrode. Between the electrode 12 and the protruding electrode 14 is a diffusion preventing layer for the protruding electrode metal, and nickel, chromium, zinc, etc. may be added. The overall shape of the substrate 20 is not particularly limited, and it may be similar to the planar shape of the semiconductor wafer 10. The thickness of the substrate 20 is mostly determined by its material, but it is not limited. The substrate 20 may be formed of any of organic or inorganic materials, and may also be composed of these composite structures, but punching is preferred. A tapered flexible substrate made of an organic material can be punched to form the substrate 20. The substrate can be a multilayer substrate or a combination substrate. When using a combination substrate and a multi-layer substrate, as long as the wiring pattern is formed on the most enlarged layer of the plane, it becomes a micro-photoresist structure without unnecessary wiring patterns, which can improve the transmission properties of the signal. A plurality of wirings (leads) are formed on one surface of the substrate 20 to form a wiring pattern 22. At least one or all of the plurality of wirings are not electrically connected to the other wirings independently. Alternatively, the plurality of wirings can be connected to each other in a case where the power source and the ground of the semiconductor wafer 10 are commonly used. Stripe portions are formed at both ends of each wiring. Most of the streaks This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ^ 10- (Please read the precautions on the back page first)

彳訂- --線- 550714 A7 B7 五、發明說明（8 ) 請 先 閱 讀 背 面 之 注 意 事 項 本 頁 被形成具有_比連接此間之部分大的寬度。將一方之條紋部 形成在接近成爲基板2 Ό最終製品的半導體裝置端部的位 置，且可將另一方之條紋部，形成在接近基板2 0中央的 位置。可在與配線圖型2 2中之半導體晶片1 0的電極 1 2接合的部分（例如條紋部），形成突出電極。此情形 下可省略半導體晶片1 〇的突出電極1 4。 在基板2 0形成複數接觸孔2 4。以任一配線通過各 個接觸孔2 4上的方式，形成配線圖型2 2。配線端部可 位於接觸孔2 4上。在配線端部形成條紋部時，條紋部是 位於接觸孔2 4上。 如第1 C圖所示，在基板2 0設置外部端子4 0。焊 球可作爲外部端子4 0。外部端子4 0被導電連接在配線 圖型2 2。例如在接觸孔2 4內，以電鍍等來設置導電構 件，或在接觸孔內設焊鍚，即可將外部端子4 0導電連接 在配線圖型2 2。在配線圖型2 2施行電鍍。以銅形成配 線圖型2 2，可以鎳、金或鍚施行電鍍。施行電鍍，以確 保導電性。具體而言，可造成與外部端子4 0良好的焊接 ，防止配線表面氧化，降低與突出電極的導電連接電阻。 經濟部智慧財產局員工消費合作社印製 半導體晶片1 〇係針對基板2 〇而被面下實裝。半導 體晶片1 0的突出電極1 4和形成在基板2 0的配線圖型 2 2爲導電連接。本發明不一定需要上述之外部端子4 0 。最低限度只要有半導體晶片1 0、和相對的形成配線圖 型2 2之基板2 0，並在其間保留接著構件3 0的構成即 可。接著構件3 0也是只要最低限度具有樹脂（內充滿樹 本紙張尺度適用中國國家標準（CNS)A4規格（210x297公釐）-11 - 550714 Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明說明（9 ) 脂）即可，.亦可爲具有各向異性導電性的樹脂。半導體晶 片1 0的突出電極1 4和基板2 0的配線圖型2 2之面下 接合，據知有藉由焊鍚等利用蠟材等之金屬間接合的方法 、利用樹脂收縮保留機械接合強度之方法、對附有金突出 電極的半導體晶片進行加熱加壓之方法（對應需求進行超 音波接合）、用各向異性導電膜之方法等，亦可應用任何 方法。 接著構件3 0係做成第1層3 2及第2層3 4之兩層 構造。第1層3 2是由第1樹脂構成的，第2層3 4是由 第2樹脂構成的。本實施形態的第1樹脂和第2樹脂，具 有不同的物性。於第1 A圖表示使用各向異性導電膜作爲 接著構件3 0的例子。接著構件3 0係爲在粘合劑分散導 電粒子3 6。 (熱膨脹係數不同之場合） 第1樹脂之熱膨脹係數（例如2 0至4 0 ( 1 0 — 6 / °C))可較第2樹脂之熱膨脹係數（40至200 ( 1 〇 _ 6 / °C ))小。以第1樹脂構成的第1層3 2是密貼 # /半_體晶片1 〇，以第2樹脂構成的第2層3 4是密貼 0。此例，半導體晶片丨〇多半是由熱膨脹係數 /J、@材·料（例如矽等）構成的，基板2 〇則多半是由熱膨 月長丨系Μ多的材料（例如聚醯亞胺樹脂等）構成的。在由熱 @張f系數小的第1樹脂構成的第1層3 2和熱膨脹係數小 @ _ Μ晶片1 〇之間，因熱膨脹係數之差小，故接著構 (請先閱讀背面之注意事項Binding --- Line-550714 A7 B7 V. Description of the invention (8) Please read the note on the back side first. This page is formed to have a width larger than the part connecting it. One of the stripe portions may be formed at a position close to the end of the semiconductor device that becomes the final product of the substrate 2 and the other stripe portion may be formed at a position close to the center of the substrate 20. A protruding electrode can be formed at a portion (for example, a striped portion) that is bonded to the electrode 12 of the semiconductor wafer 10 in the wiring pattern 22. In this case, the protruding electrode 14 of the semiconductor wafer 10 can be omitted. A plurality of contact holes 24 are formed in the substrate 20. A wiring pattern 22 is formed so that any wiring passes through each of the contact holes 24. The wiring end portion may be located on the contact hole 24. When a stripe portion is formed at the wiring end portion, the stripe portion is located on the contact hole 24. As shown in FIG. 1C, an external terminal 40 is provided on the substrate 20. Solder balls can be used as external terminals 40. The external terminal 40 is electrically connected to the wiring pattern 22. For example, in the contact hole 24, a conductive member is provided by plating or the like, or a solder pad is provided in the contact hole, and the external terminal 40 can be conductively connected to the wiring pattern 22. Plating is performed on the wiring pattern 22. The wiring pattern 22 made of copper can be plated with nickel, gold or rhenium. Electroplating is performed to ensure conductivity. Specifically, it can cause good soldering to the external terminal 40, prevent oxidation of the wiring surface, and reduce the conductive connection resistance with the protruding electrode. The semiconductor chip 10 printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs is mounted on the substrate 200. The protruding electrodes 14 of the semiconductor wafer 10 and the wiring pattern 22 formed on the substrate 20 are electrically connected. The present invention does not necessarily require the external terminal 40 described above. At a minimum, the semiconductor wafer 10 and the opposite substrate 20 forming the wiring pattern 22 may be provided, and a structure in which the member 30 is adhered therebetween is sufficient. Next, the component 30 is also provided with a minimum of resin (the inside is filled with tree-based paper and the Chinese National Standard (CNS) A4 specification (210x297 mm) is applicable) -11-550714 Α7 Β7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Note (9) grease), or it can be a resin with anisotropic conductivity. It is known that the protruding electrodes 14 of the semiconductor wafer 10 and the wiring pattern 2 2 of the substrate 20 are bonded under the surface. It is known that a method such as soldering or the like is used for intermetallic bonding using a wax material or the like. Resin shrinkage is used to retain the mechanical bonding strength. Any method can be used, such as a method of heating and pressing a semiconductor wafer with a gold protruding electrode (ultrasonic bonding according to requirements), a method using an anisotropic conductive film, and the like. Next, the member 30 has a two-layer structure of a first layer 32 and a second layer 34. The first layer 32 is made of a first resin, and the second layer 34 is made of a second resin. The first resin and the second resin in this embodiment have different physical properties. Fig. 1A shows an example using an anisotropic conductive film as the bonding member 30. Next, the member 30 is a system in which conductive particles 36 are dispersed in a binder. (When the coefficient of thermal expansion is different) The coefficient of thermal expansion of the first resin (for example, 20 to 40 (1 0 — 6 / ° C)) can be higher than the coefficient of thermal expansion of the second resin (40 to 200 (1 〇_ 6 / ° C) ))small. The first layer 3 2 made of the first resin is a close-contact # / half-body wafer 10, and the second layer 34 made of the second resin is a close-contact 0. In this example, semiconductor wafers are mostly composed of the coefficient of thermal expansion / J, @ material · material (such as silicon, etc.), and the substrate 20 is mostly composed of materials with a large thermal expansion month, such as polysilicon. Amine resin, etc.). Between the first layer 3 2 made of the first resin with a small thermal coefficient, the coefficient of thermal expansion is small, and the coefficient of thermal expansion is small @ _M wafer 1 〇, because the difference in thermal expansion coefficient is small, the next step (please read the precautions on the back first)

Ν本頁) -丨線 本紙張尺度適用中國园家標準（CNS)A4規格（210x 297公爱）-12 - 550714 A7 _________ B7 五、發明說明（]〇 ) 件3 0不易產生剝離。第1樹脂的熱膨脹係數接近矽的熱 膨脹係數，可用例如3 0至6 0%的混入率將矽系塡充物 混入第1樹脂。此時，矽系塡充物最好不要混入第2樹脂 。或是連第1樹脂及第2樹脂均混入矽系塡充物，對第1 樹脂的矽系塡充物之混入率可較第2'樹脂的矽系塡充物之 混入率大。此時，矽系塡充物的混入率之差最好爲3 0至 3 0 %左右。 在由熱膨脹係數大的第2樹脂構成的第2層3 4和熱 膨脹係數大的基板2 0之間，因熱膨脹係數之差小，故接 著構件3 0不易產生剝離。 用各向異性導電膜作爲接著構件3 0的場合，第1及 第2樹脂的熱膨脹係數不同時，可以只在一方分散導電粒 子3 6。具體而言，最好只在半導體晶片1 0之突出電極 1 4較密貼在電氣連接面積大的配線圖型2 2的第2層 3 4分散導電粒子3 6。如此一來，當突出電極1 4沈積 至接著構件3 0 (各向異性導電膜）時，導電粒子3 6保 留在突出電極1 4之下的確率高，且導電連接的可靠性亦 高。而因未在密貼半導體晶片1 0的第1層3 2分散導電 粒子3 6，故可防止半導體晶片1 0的電極1 2間短路。 (彈性率不同之場合） 第2樹脂的彈性化可較第1樹脂低。例如第1樹脂的 彈性率約爲3至1 0 ( G P a )，第2樹脂的彈性率約爲 1至3GPa。如此一來，由第2樹脂製成的第2層34 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） -13- 請 先 閱 讀 背 面 之 注 意 事 項Ν This page)-丨 line This paper size is in accordance with Chinese Gardener's Standard (CNS) A4 (210x 297 public love) -12-550714 A7 _________ B7 V. Description of the invention (] 〇) Piece 3 0 is not easy to peel off. The thermal expansion coefficient of the first resin is close to the thermal expansion coefficient of silicon. For example, the silicon-based filler can be mixed into the first resin at a mixing ratio of 30 to 60%. At this time, it is best not to mix the second resin with the silicon-based filler. Or even the first resin and the second resin are mixed into the silicon based filler, the mixing rate of the silicon based filler of the first resin may be larger than that of the second based resin. At this time, the difference in the mixing ratio of the silicon-based pseudo-filler is preferably about 30 to 30%. Between the second layer 34 made of the second resin having a large thermal expansion coefficient and the substrate 20 having a large thermal expansion coefficient, since the difference in the thermal expansion coefficient is small, the joint member 30 is unlikely to be peeled. When an anisotropic conductive film is used as the bonding member 30, when the thermal expansion coefficients of the first and second resins are different, the conductive particles 36 can be dispersed only on one side. Specifically, it is preferable to disperse the conductive particles 3 6 only on the protruding electrodes 14 of the semiconductor wafer 10 on the second layer 3 4 of the wiring pattern 22 having a large electrical connection area. In this way, when the protruding electrode 14 is deposited on the bonding member 30 (anisotropic conductive film), the accuracy with which the conductive particles 36 remain under the protruding electrode 14 is high, and the reliability of the conductive connection is also high. On the other hand, since the conductive particles 36 are not dispersed in the first layer 32 of the semiconductor wafer 10, the electrodes 12 of the semiconductor wafer 10 can be prevented from being short-circuited. (When the elastic modulus is different) The elasticity of the second resin may be lower than that of the first resin. For example, the elastic modulus of the first resin is about 3 to 10 (G P a), and the elastic modulus of the second resin is about 1 to 3 GPa. In this way, the second layer made of the second resin is 34. This paper size applies the Chinese National Standard (CNS) A4 specification (210 x 297 mm). -13- Please read the notes on the back first

頁 經濟部智慧財產局員工消費合作社印製 550714 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（11 ) ，密貼在熱·膨脹係數大的基板2 0時，因第2樹脂易延伸 ，隨動性高，故不易產生剝離。 將第2樹脂予以低彈性化，係可使之變成環氧樹脂以 作爲第2樹脂。或者第1樹脂爲環氧樹脂，第2樹脂爲聯 苯樹脂。 用各向異性導電膜作爲接著構件3 0時，第1樹脂及 第2樹脂的彈性率不同時，亦可只在其一方分散導電粒子 3 6。具體而言，最好只在半導體晶片1 0之突出電極 1 4較構成密貼在電氣連接面積大的配線圖型2 2的第2 層3 4之第2樹脂分散導電粒子3 6。如此一來，當突出 電極1 4沈積至接著構件3 0時，導電粒子3 6保留在突 出電極1 4之下的確率高，且導電連接的可靠性亦高。而 因未在構成密貼半導體晶片1 0的第1層3 2之第1樹脂 分散導電粒子3 6，故可防止半導體晶片1 〇的電極1 2 間短路。 (溶融粘度不同之場合） 用各向異性導電膜作爲接著構件3 0時，第2樹脂溶 融時的粘度可較第1樹脂高。按此，當突出電極1 4沈積 至接著構件3 0時，溶融粘度低的第1樹脂易流出，溶融 粘度高的第2樹脂不易流出。因第2樹脂的溶融粘度高， 故導電粒子3 6易保留在配線圖型2 2上。此時，可以只 在密貼配線圖型2 2的第2層3 4的第2樹脂分散導電粒 子3 6。因未在構成密貼半導體晶片1 〇的第1層3 2之 (請先閱讀背面之注意 -事項 本頁) 裝 一-WJ· 本纸張&度適用中國國家標準（CNS)A4規格（210 x 297公釐）-14- 550714 A7 ______ ' B7 五、發明說明（ 第1樹脂分胃散 極1 2間短路 進‘而第2 粒子3 6的數 的數量多少， 實的保留在配 用各向異 溶融粒度較第 物。或者在第 脂的矽系塡充 入率大。或者 12 ) 導電粒子3 6，故可防半導體晶片1〇的電 〇 請 先 閱 讀 背 之 注 意 事 項 ¥ 本 頁 層3 4厚度可較第1層3 2薄，按此，導電 量少，可防止電氣短路，不管導電粒子3 6 第2樹脂的溶融粒度高，導電粒子3 6可確 線圖案2 2上。 性導電膜作爲接著構件3 0時，第2樹脂的 1樹脂高，可以只在第2樹脂混入矽系塡充 1樹脂第2樹脂混入矽系塡充物，對第2樹 物之混入率可較第1樹脂的矽系塡充物之混 第2樹脂的分子量可較第1樹脂的分子量大 對兩層物性不同的樹脂 物性差爲沒有階段連續 差是很有益處的。在兩 。因此，具體而言，除 多層所構成的樹脂或是 各向異性導電膜做爲錐 有別的物性的一層各向 向異性導電膜同。多層 度方向形成物性不同的 層各向異性導電膜時所 層間產生相互擴散。藉 以上就本實施形態而言，乃針 做一槪述，更理想的情況是層間的 改變的方法，但厚度方向不具物性 層界面因物性差而不易產生剝離等 小的差異外，可使用由物性不同的 連續在厚度方向改變物性的樹脂。 經濟部智慧財產局員工消費合作社印製 兩層各向異性導電膜在將一層 狀後，更在該層上取得作成錐狀具 異性導電膜。之後的處理與一層各 的場合，乃重覆此作業。連續於厚 各向異性導電膜，利用作兩層或多 使用的溶劑，或利用稍微加熱，使 本纸張尺度適用中國國家標準（CNS)A4規格（210x297公釐） -15- 550714 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（13 ) 此取得連續層。 有關本實施形態之半導體裝置，乃如上述所構成，以 下針對其製造方法做一說明。 如第1 A圖所示，使形成半導體晶片1 〇的電極1 2 (或突出電極1 4 )之面、和形成基板2 0的配線圖型 2 2之面相對的配置。並在半導體晶片1 0和基板2 0之 間，配置接著構件30。詳細而言，乃將第1層32向著 半導體晶片1〇，將第2層3 4向著基板2 0，來設置接 著構件3 0。再者，接著構件3 0最好是貼固在半導體晶 片1 0和基板2 0之任一方。 接著構件3 0以複數層（例如第1及第2層3 2、 3 4之兩層）製成時，可依序設置複數層（例如第1層 3 2和第2層3 4)之各層。詳細而言，可在半導體晶片 1 0或基板2 0之一方依序設置各層，可在半導體晶片 1 0設置任一層，也可在基板2 〇設其他層（例如第2層 3 4)。 如第1 B圖所示，將半導體晶片1 〇和基板2 〇，介 由接著構件3 0來密貼。詳細而言.，係將半導體晶片1 〇 和基板2 0，向著兩者間隔狹窄的方向推壓。藉此，隔著 導電粒子3 6介設在半導體晶片1 〇和基板2 〇之間，達 到兩者間導電連接。 如第1 C圖所示，將外部端子4 〇設在基板2 〇，以 獲得半導體裝置丨。於第1C圖表示外部端子40只設在 半導體晶片10的搭載範圍內之FAN-IN型半導體裝 (請先閱讀背面之注意事項Page Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 550714 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (11), when it is closely adhered to the substrate with a large thermal and expansion coefficient 20, the second resin It is easy to extend and has high followability, so it is not easy to peel. The second resin is made low in elasticity so that it can be turned into an epoxy resin as the second resin. Alternatively, the first resin is an epoxy resin, and the second resin is a biphenyl resin. When an anisotropic conductive film is used as the bonding member 30, when the elastic modulus of the first resin and the second resin are different, the conductive particles 36 may be dispersed only on one side. Specifically, it is preferable that only the protruding electrodes 1 4 of the semiconductor wafer 10 disperse the conductive particles 36, which are the second resins constituting the second layer 3 4 of the wiring pattern 22 which is closely adhered to the large electrical connection area. In this way, when the protruding electrode 14 is deposited on the bonding member 30, the accuracy with which the conductive particles 36 remain under the protruding electrode 14 is high, and the reliability of the conductive connection is also high. On the other hand, since the conductive particles 36 are not dispersed in the first resin constituting the first layer 32 of the semiconductor wafer 10, the short circuit between the electrodes 12 of the semiconductor wafer 10 can be prevented. (When the melt viscosity is different) When an anisotropic conductive film is used as the bonding member 30, the viscosity of the second resin when melted can be higher than that of the first resin. Accordingly, when the protruding electrode 14 is deposited on the bonding member 30, the first resin having a low melt viscosity is liable to flow out, and the second resin having a high melt viscosity is not likely to flow out. Since the second resin has a high melt viscosity, the conductive particles 36 easily remain on the wiring pattern 22. In this case, the conductive particles 36 may be dispersed only in the second resin which is closely adhered to the second layer 34 of the wiring pattern 22. Since it is not on the first layer 3 2 which constitutes the semiconductor wafer 10 (please read the precautions on the back first-this page) Packing -WJ · This paper & degree applies the Chinese National Standard (CNS) A4 specification ( 210 x 297 mm) -14- 550714 A7 ______ 'B7 V. Description of the invention (the first resin is divided into the stomach and the pole 12 and short-circuited between them and the number of the second particles is 36, the actual number is retained in each The particle size of the anisotropic melt is larger than that of the first. Or the filling rate of the silicon-based silicon is larger. Or 12) The conductive particles 36, so it can prevent the electricity of the semiconductor wafer 10. Please read the precautions on the back first. The thickness of 3 4 can be thinner than that of the first layer 32. According to this, the amount of conductivity is small and electrical short circuit can be prevented. Regardless of the high melting particle size of the conductive particles 3 6 and the second resin, the conductive particles 36 can be confirmed on the line pattern 2 2. When the conductive conductive film is used as the bonding member 30, the first resin of the second resin is high, and the second resin can be mixed into the silicon resin and the second resin can be mixed into the silicon resin. The molecular weight of the second resin may be larger than the molecular weight of the first resin, and the molecular weight of the second resin may be larger than the molecular weight of the first resin. The two resins with different physical properties are inferior in physical properties and have no continuous difference in stages. In two. Therefore, specifically, an anisotropic conductive film having the same physical properties as a cone except for a resin composed of a plurality of layers or an anisotropic conductive film as a cone. When anisotropic conductive films having different physical properties are formed in the multilayer direction, interdiffusion occurs between layers. Based on the above description of this embodiment, it is a brief description. The more ideal method is the method of changing between layers. However, there is no physical difference in the thickness direction. The interface of the layer is not easy to cause small differences such as peeling due to poor physical properties. Resins with different physical properties that continuously change physical properties in the thickness direction. The two layers of anisotropic conductive film were printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. After forming one layer, a cone-shaped anisotropic conductive film was obtained on this layer. This process is repeated for each subsequent process and each occasion. Continuous to thick anisotropic conductive film, using two or more layers of solvent, or using slight heating to make this paper size applicable to Chinese National Standard (CNS) A4 (210x297 mm) -15- 550714 A7 B7 Economy Printed by the Consumer Cooperatives of the Ministry of Intellectual Property Bureau. 5. Description of Invention (13) This acquisition has successive layers. The semiconductor device according to this embodiment is constructed as described above, and a method for manufacturing the semiconductor device will be described below. As shown in FIG. 1A, the surface of the electrode 12 (or the protruding electrode 1 4) forming the semiconductor wafer 10 and the surface of the wiring pattern 22 forming the substrate 20 are arranged so as to face each other. A bonding member 30 is arranged between the semiconductor wafer 10 and the substrate 20. Specifically, the first member 32 is provided toward the semiconductor wafer 10, and the second layer 34 is provided toward the substrate 20 to provide the contact member 30. The bonding member 30 is preferably attached to either the semiconductor wafer 10 or the substrate 20. Then, when the component 30 is made of a plurality of layers (for example, two layers of the first and second layers 3 2, 3, 4), each layer of the plurality of layers (for example, the first layer 32 and the second layer 34) may be sequentially arranged. . In detail, each layer may be sequentially arranged on one of the semiconductor wafer 10 or the substrate 20, any layer may be provided on the semiconductor wafer 10, and other layers may be provided on the substrate 20 (for example, the second layer 34). As shown in FIG. 1B, the semiconductor wafer 10 and the substrate 20 are closely adhered through the bonding member 30. Specifically, the semiconductor wafer 10 and the substrate 20 are pressed in a direction where the distance between them is narrow. Thereby, the conductive particles 36 are interposed between the semiconductor wafer 10 and the substrate 20 to achieve a conductive connection therebetween. As shown in FIG. 1C, an external terminal 40 is provided on the substrate 20 to obtain a semiconductor device. Figure 1C shows a FAN-IN type semiconductor device in which the external terminal 40 is provided only within the mounting range of the semiconductor chip 10. (Please read the precautions on the back first

π本頁) · 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐)-16: 550714 A7 _____ B7 五、發明說明（14 ) 請 先 閱 讀 背 & 之 注 意 事 項 ¥ 本 頁 置，但並不_限於此。例如只在半導體晶片1 0的搭載範圍 外設置外部端子4 0的FAN - OUT型半導體裝置，或 是在此組合FAN—IN型的FAN—IN/OUT型半 導體裝置也適用本發明。再者，FAN - OUT型或 FAN — I N/OUT型半導體裝置，也可利用各向異性 導電膜，在半導體晶片外側貼固加強板。 本實施形態因使用以第1及第2層3 2、34製成的 接著構件3 0，故可達到上述之效果。 本實施形態是以半導體晶片1 〇面下實裝在B A G ( Ball Gnd Array )型的基板2 0爲例所做的說明，但如前所 述’雖爲基板2 0之形態，卻可應用在將半導體晶片1 0 面下實裝在基板2 0的所有實裝形態。 於第2圖表示有關本實施形態之半導體裝置1之電路 基板5 0。一般電路基板5 0是採用例如玻璃環氧基板等 之有機系基板。於電路基板5 0以預期的電路形成例如以 銅等製成的配線圖型5 2，並機械連接該些配線圖型和半 導體裝置1的外部端子4 0，以達到該些之導電連通。 經濟部智慧財產局員工消費合作社印製 並製成具有應用本發明的半導體裝置1之電子機器 60，於第3圖表示筆記型電腦。再者，將上述本發明之 構成要件「半導體晶片」置換成「電子元件」，並與半導 體晶片相同，將電子元件（不管是主動元件或被動元件） 實裝在基板予以製造成電子零件。使用此種電子元件所製 造的電子零件，例如有電阻器、電容器、振盪器、過濾器 、溫度感應器、熱敏電阻、可變電阻、電位器或保險絲等 本纸張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） -17- 550714 A7 一 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（15 ) 〔圖面之簡單說明〕 第1A圖至第1c圖係表示有關本發明之實施形態之 半導體裝置之製造方法圖。 第2圖係表示有關本發明之實施形態之電路基板圖。 第3圖係表示具備有應用有關本發明之方法所製造的 半導體裝置之電子機器圖。 〔符號之說明〕 1 0 :半導體晶片 2 0 :基板 3 0 :接著構件 3 2 :第1層3 4 :第2層 3 6 :導電粒子 4 0 :外部端子 5 0 :電路基板 6 0 :電子機器 (請先閱讀背面之注意事項寫本頁) •裝 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公爱） -18-π this page) · This paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) -16: 550714 A7 _____ B7 V. Description of the invention (14) Please read back & Precautions ¥ This page Settings, but not limited to this. For example, the present invention is also applicable to a FAN-OUT type semiconductor device in which an external terminal 40 is provided only outside the mounting range of the semiconductor chip 10, or a FAN-IN type FAN-IN / OUT type semiconductor device is combined here. Furthermore, a FAN-OUT type or FAN-IN / OUT type semiconductor device can also use an anisotropic conductive film to attach a reinforcing plate to the outside of a semiconductor wafer. In the present embodiment, the above-mentioned effect can be achieved because the bonding member 30 made of the first and second layers 3 2, 34 is used. This embodiment is described by taking as an example a substrate 20 of a BAG (Ball Gnd Array) type mounted on a semiconductor wafer under 10 planes, but as described above, although it is in the form of a substrate 20, it can be applied to The semiconductor wafer 10 is mounted on all surfaces of the substrate 20 under the surface. Fig. 2 shows a circuit board 50 of the semiconductor device 1 according to this embodiment. A general circuit substrate 50 is an organic substrate such as a glass epoxy substrate. A wiring pattern 52 made of, for example, copper is formed on the circuit substrate 50 with a desired circuit, and the wiring patterns and the external terminals 40 of the semiconductor device 1 are mechanically connected to achieve the conductive communication. The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs has printed and produced an electronic device 60 having the semiconductor device 1 to which the present invention is applied. FIG. 3 shows a notebook computer. Furthermore, the above-mentioned constituent element "semiconductor wafer" of the present invention is replaced with "electronic component", and the same as a semiconductor wafer, an electronic component (whether an active component or a passive component) is mounted on a substrate to manufacture an electronic component. Electronic parts manufactured using such electronic components include, for example, resistors, capacitors, oscillators, filters, temperature sensors, thermistors, variable resistors, potentiometers, or fuses. CNS) A4 size (210 x 297 mm) -17- 550714 A7-B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of invention (15) [Simplified description of drawings] Figures 1A to 1c The figure which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. Fig. 2 is a circuit board diagram showing an embodiment of the present invention. Fig. 3 is a diagram showing an electronic device including a semiconductor device manufactured by applying the method of the present invention. [Description of Symbols] 1 0: semiconductor wafer 20: substrate 3 0: bonding member 3 2: first layer 3 4: second layer 3 6: conductive particles 4 0: external terminal 5 0: circuit board 6 0: electron Machine (please read the notes on the back to write this page) • The size of this paper is applicable to China National Standard (CNS) A4 (210 x 297 public love) -18-

Claims (1)

550714 經濟部智慧財產局員工消費合作社印製 Α8 Β8 C8 D8 六、申請專利範圍 第89102447號專利申請案 中文申請專利範圍修正本 民國92年3月20日修正 1 · 一種接著構件，係用於接著電子零件，於厚度方 向具不同物性之接著構件，其特徵爲： 構成以第1樹脂爲基材之第1層，和以第2樹脂爲基 材之第2層的兩層構造， 僅於前述第2樹脂分散導電粒子， 前述第2層之厚度係較前述第1層薄，前述第2樹脂 ，其溶融時之粘度係較上述第1樹脂爲高。 2 ·如申請專利範圍第1項之接著構件，其中 僅於前述第2樹脂混入矽系塡充物。 3 ·如申請專利範圍第1項之接著構件，其中 於前述第1樹脂及前述第2樹脂混入矽系塡充物，前 述第2樹脂之前述矽系塡充物之混入率大於前述第1樹脂 之前述矽系塡充物之混入率。 4 ·如申請專利範圍1第項之接著構件，其中 前述第2樹脂之分子量大於前述第1樹脂之分子量。 5·—種半導體裝置，係包含有： 半導體晶片’形成有配線圖型的基板·，及電連接前述 半導體晶片與前述配線圖型的接著構件； 前述接著構件，係於厚度方向具不同物性，且構成以 第1樹脂爲基材之第1層，和以第2樹脂爲基材.之第2層 的兩層構造， 本紙張尺度適用中國國家標準（CNS )八4規格（2ΐ〇χ297公釐） . —1τ^ (請先閱讀背面之注意事項再填寫本頁) 550714 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 D8 六、申請專利範圍 僅於前述第2樹脂分散導電粒子， 前述第2層之厚度係較前述第1層薄，前述第2樹脂 ’其溶融時之粘度係較上述第1樹脂爲高。 6·—種電路基板，係搭載有半導體裝置者，該半導 體裝置，係包含有： 半導體晶片’形成有配線圖型的基板，及電連接前述 半導體晶片與述配線圖型的接著構件； 前述接著構件，係於厚度方向具不同物性，且構成以 第1樹脂爲基材之第1層，和以第2樹脂爲基材之第2層 的兩層構造， 僅於前述第2樹脂分散導電粒子， 前述第2層之厚度係較前述第1層薄，前述第2樹脂 ’其溶融時之粘度係較上述第1樹脂爲高。 7 · —種電子機器，係具有半導體裝置者，該半導體 裝置，係包含有： 半導體晶片，形成有配線圖型的基板，及電連接前述 半導體晶片與前述配線圖型的接著構件； 前述接著構件，係於厚度方向具不同物性，且構成以 第1樹脂爲基材之第1層，和以第2樹脂爲基材之第2層 的兩層構造， 僅於前述第2樹脂分散導電粒子， 前述第2層之厚度係較前述第1層薄，前述第2樹脂 ’其溶融時之粘度係較上述第1樹脂爲高。 . 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ------------訂·------0 (請先閲讀背面之注意事項再填寫本頁)550714 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Α8 Β8 C8 D8 VI. Application for Patent Scope No. 89102447 Patent Application Chinese Application for Patent Scope Amendment March 20, 1992 Amendment 1 · A bonding component is used for bonding An electronic component, a bonding member having different physical properties in the thickness direction, is characterized by a two-layer structure consisting of a first layer using a first resin as a base material and a second layer using a second resin as a base material. The second resin-dispersed conductive particles have a thickness of the second layer thinner than that of the first layer, and a viscosity of the second resin when melted is higher than that of the first resin. 2 · As for the adhesive member of the first scope of the patent application, only the aforementioned second resin is mixed into the silicon-based filler. 3. If the bonding member of item 1 of the patent application scope, wherein the first resin and the second resin are mixed into the silicon-based filler, the mixing ratio of the second resin to the silicon-based filler is greater than the first resin The mixing ratio of the aforementioned silicon-based fluorene filler. 4. The bonding member according to item 1 of the patent application, wherein the molecular weight of the second resin is greater than the molecular weight of the first resin. 5 · A semiconductor device, comprising: a semiconductor wafer 'a substrate on which a wiring pattern is formed; and a bonding member for electrically connecting the semiconductor wafer and the wiring pattern; the bonding member has different physical properties in a thickness direction, The two-layer structure of the first layer with the first resin as the base material and the second layer with the second resin as the base material is applicable to the Chinese National Standard (CNS) 8-4 specification (2ΐ〇χ297 公). (1%) .1τ ^ (Please read the notes on the back before filling this page) 550714 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A8 B8 C8 D8 6. The scope of patent application is only for the aforementioned second resin dispersed conductive particles. The thickness of the second layer is thinner than the first layer, and the viscosity of the second resin 'when melted is higher than that of the first resin. 6 · A circuit board comprising a semiconductor device, the semiconductor device comprising: a semiconductor wafer 'a substrate having a wiring pattern formed thereon; and a bonding member for electrically connecting the semiconductor wafer and the wiring pattern; The member has a two-layer structure having different physical properties in the thickness direction, and constitutes a first layer using a first resin as a base material and a second layer using a second resin as a base material. The conductive particles are dispersed only in the second resin. The thickness of the second layer is thinner than that of the first layer, and the viscosity of the second resin 'when melted is higher than that of the first resin. 7 · An electronic device having a semiconductor device, the semiconductor device includes: a semiconductor wafer, a substrate on which a wiring pattern is formed, and a bonding member electrically connecting the semiconductor wafer and the wiring pattern; the bonding member It is a two-layer structure with different physical properties in the thickness direction, and constitutes the first layer with the first resin as the base material and the second layer with the second resin as the base material. The conductive particles are dispersed only in the second resin. The thickness of the second layer is thinner than that of the first layer, and the viscosity of the second resin 'when melted is higher than that of the first resin. . This paper size applies to China National Standard (CNS) A4 specification (210X297mm) ------------ Order · ------ 0 (Please read the precautions on the back before filling in this page)
TW089102447A 1999-02-18 2000-02-14 Bonding material, semiconductor device, method of manufacturing semiconductor device, circuit board and electronic device TW550714B (en)

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