JPH0513119A - Tape connector for connecting electronic parts - Google Patents
Tape connector for connecting electronic partsInfo
- Publication number
- JPH0513119A JPH0513119A JP3164482A JP16448291A JPH0513119A JP H0513119 A JPH0513119 A JP H0513119A JP 3164482 A JP3164482 A JP 3164482A JP 16448291 A JP16448291 A JP 16448291A JP H0513119 A JPH0513119 A JP H0513119A
- Authority
- JP
- Japan
- Prior art keywords
- tape
- filler
- insulating
- circuits
- tape layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/2908—Plural core members being stacked
- H01L2224/29082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ＬＳＩ，液晶表示ユニ
ット等の電子部品を基板上に実装する電子部品接続用テ
ープコネクタに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component connecting tape connector for mounting electronic components such as an LSI and a liquid crystal display unit on a substrate.
【０００２】[0002]
【従来の技術】ＬＳＩ，液晶表示ユニット等の電子部品
を基板上に実装する方法として、テープコネクタを使用
する方法がある。図４は、実装概念図を示す。図におい
て、１は回路基板であり、この上にＬＳＩ１０と液晶表
示ユニット（ＬＣＤ）４が実装される。図５は、図１の
Ｘ−Ｘ´の断面図の一部を示す。図６はこの際に使用さ
れる異方性導電テープコネクタの部分断面図である。回
路基板１は、ポリイミドやガラスエポキシ，ポリエステ
ルといった比較的薄板状でフレシキブルな特性を持つベ
ース基材２と、この上に、銅箔にスズメッキあるいはＮ
ｉ−Ａｕメッキしたものやアルミ箔等の金属箔で回路パ
ターン状に形成された導体３とで構成されている。ＬＣ
Ｄ４は、ガラス基材５にインジウムやスズの蒸着薄膜
（ＩＴＯ等）を回路状に形成した導体６を備えている。
回路基板１とＬＣＤ４との間には異方性導電テープコネ
クタ７があり、この異方性導電テープコネクタ７は、ホ
ットメルト系の接着剤８の中にニッケルや金等の金属粉
末やプラスチック粒子表面に金属メッキを施したプラス
チックポリマー粒子体からなる導電性フィラー９を適量
混合分散させて構成されている。この異方性導電テープ
コネクタ７は、その接続原理からいって回路と回路とを
接続する方向にのみ導電性を持ち、隣接する他の回路と
は絶縁性を保つように接続加工されなければならない。
しかし、表示のカラー化（Ｒ・Ｇ・Ｂといった三色の信
号を引き出すために信号数は単純計算で三倍に増加す
る）や、液晶ＴＶのように表示画面の緻密さと大型化の
ために液晶表示信号はより精細ピッチに並べられ、その
数も増加の傾向にある。そこで、接続加工後に問題とな
りやすいのが隣接端子間のショートである。この接続不
良の状態を図７に示す。すなわち、上下の回路同士を接
続する役割を果たすべき導電性フィラーの径が大きいた
めに、本来導通してはならない隣接回路をも誤って導通
してしまう危険性が増してくることになる。この問題を
回避する手段として、一般には接続すべき回路の幅とそ
の回路と回路の間隔が狭くなるに従い（接続ピッチが精
細になるに従い）、その回路を接続する異方性導電テー
プコネクタの導電性フィラー９もより細かい微粒子に揃
え（一般には、フィラーを細かくすると平面上から見た
面積比が増えるために、そのままでは使えない。したが
って、含有率も同時に減らすことが必要になる）、しか
も、均一に分散させることが重要になる。このようにし
た異方性導電テープの断面図を図８に示す。2. Description of the Related Art As a method of mounting electronic parts such as an LSI and a liquid crystal display unit on a substrate, there is a method of using a tape connector. FIG. 4 shows a mounting conceptual diagram. In the figure, reference numeral 1 is a circuit board on which an LSI 10 and a liquid crystal display unit (LCD) 4 are mounted. FIG. 5 shows a part of a sectional view taken along line XX ′ of FIG. FIG. 6 is a partial cross-sectional view of the anisotropic conductive tape connector used in this case. The circuit board 1 includes a base material 2 such as polyimide, glass epoxy, or polyester, which has a relatively thin plate-like and flexible characteristics, and a copper foil, tin-plated or N-based on the base material 2.
The conductor 3 is formed of i-Au plated metal foil or metal foil such as aluminum foil in a circuit pattern. LC
D4 includes a conductor 6 in which a vapor-deposited thin film of indium or tin (ITO or the like) is formed in a circuit shape on a glass base material 5.
An anisotropic conductive tape connector 7 is provided between the circuit board 1 and the LCD 4, and the anisotropic conductive tape connector 7 includes a hot melt adhesive 8 containing metal powder such as nickel or gold or plastic particles. It is configured by mixing and dispersing an appropriate amount of conductive filler 9 made of a plastic polymer particle body having a metal plated surface. This anisotropic conductive tape connector 7 has a conductive property only in the direction of connecting the circuits due to its connection principle, and must be connected and processed so as to maintain insulation with other adjacent circuits. ..
However, in order to colorize the display (the number of signals is tripled by simple calculation to extract the three color signals such as R, G, and B) and to make the display screen more precise and larger, like LCD TVs. The liquid crystal display signals are arranged at a finer pitch, and the number thereof is also increasing. Therefore, a short circuit between adjacent terminals is likely to cause a problem after the connection processing. The state of this poor connection is shown in FIG. That is, since the diameter of the conductive filler that should play a role of connecting the upper and lower circuits is large, there is an increased risk of accidentally conducting even an adjacent circuit that should not be conducted. As a means for avoiding this problem, generally, as the width of the circuit to be connected and the distance between the circuits become narrower (as the connection pitch becomes finer), the conductivity of the anisotropic conductive tape connector for connecting the circuit is reduced. Filler 9 is also prepared with finer particles (generally, if the filler is made finer, the area ratio seen from the plane increases, so it cannot be used as it is. Therefore, it is necessary to reduce the content rate at the same time). It is important to disperse evenly. FIG. 8 shows a cross-sectional view of such an anisotropic conductive tape.
【０００３】[0003]
【発明が解決しようとする課題】ところが、上記の異方
性導電テープコネクタを使って接続加工させようとする
と、上下方向の回路同士をより近接させて異方性テープ
のより細かくなった導電性フィラーが互いの回路同士を
接続するように加工する必要が出てくる。この時の加工
後（接続後）の状態を図９に示す。すなわち、加工前の
異方性テープの厚さを２０μｍとし、その中に含まれる
導電性フィラーの粒子径を５μｍとすると、加工後には
２０μｍから５μｍまで異方性テープを圧縮しなければ
正常な回路同士の接続を得ることができない。この場
合、加工時の加圧力を単純に上げればよいことになる
が、ＬＣＤといったガラス素材の耐圧や加圧装置の精度
の限界等によって、加圧力を上げるには限界が出てく
る。このため、異方性テープ自体の素材を圧縮されやす
い材料にする設計が必要になってくる。一般的には、異
方性テープのホットメルト系接着剤を加圧，加熱した時
に流動しやすい材料にする方法が考えられる。たとえ
ば、エポキシ樹脂等の熱硬化性接着剤はポリエステルや
ウレタン、ゴムといった熱可塑性接着剤に比べてこの加
圧，加熱流動性が高いために、流動しやすい材料として
エポキシ樹脂が選ばれる。このような材料物性の異方性
テープコネクタを使うと加工時（加圧，加熱）に接着剤
ベースが流れ出して圧縮されやすくなるが、接着剤ベー
スが流れる時に同時に導電性フィラーも流れ出してしま
うことになる。この結果、導電性フィラーが均一に分散
されなくなり二次的な偏った集まり（二次凝集）を引き
起こし、結果的に隣接端子間のショートを招いてしまう
問題が出る。また、この問題を回避するために最初の異
方性テープの厚さを予め薄くしておくことも考えられる
が、回路同士を接続した後に回路と回路の間の凹部に接
着剤が十分に充填されずに隙間が生じてしまい、接着固
定力が低下し接続部分の信頼性が低下するという別の弊
害を生じてしまう問題がある。However, when the above anisotropic conductive tape connector is used for connection processing, the vertical circuits are made closer to each other, and the anisotropic tape has a finer conductivity. It will be necessary to process the filler so as to connect the circuits to each other. FIG. 9 shows a state after processing (after connection) at this time. That is, if the thickness of the anisotropic tape before processing is 20 μm and the particle diameter of the conductive filler contained therein is 5 μm, it will be normal if the anisotropic tape is not compressed from 20 μm to 5 μm after processing. You cannot get a connection between the circuits. In this case, it is sufficient to simply increase the pressing force at the time of processing, but there is a limit to increasing the pressing force due to the pressure resistance of the glass material such as LCD and the accuracy of the pressurizing device. Therefore, it is necessary to design the anisotropic tape itself so that it can be easily compressed. Generally, a method of making a hot-melt adhesive for anisotropic tape into a material that easily flows when pressurized and heated is considered. For example, a thermosetting adhesive such as an epoxy resin has higher pressurizing and heating fluidity than a thermoplastic adhesive such as polyester, urethane, or rubber, and thus an epoxy resin is selected as a material that easily flows. If an anisotropic tape connector with such material properties is used, the adhesive base will flow out during processing (pressurization, heating) and will be easily compressed, but the conductive filler will also flow out at the same time as the adhesive base flows. become. As a result, the conductive filler is not uniformly dispersed, causing a secondary biased aggregation (secondary aggregation), resulting in a problem of causing a short circuit between adjacent terminals. In order to avoid this problem, it is possible to reduce the thickness of the first anisotropic tape beforehand, but after connecting the circuits, the recesses between the circuits should be filled with adhesive sufficiently. However, there is a problem that a gap is generated without doing so, which causes another problem that the adhesive fixing force is reduced and the reliability of the connection portion is reduced.
【０００４】本発明の目的は、上述の従来技術の問題点
に鑑み、被着体の回路ピッチが小さくても隣接する端子
間のショートを回避し、しかも十分な接着力を確保でき
るテープコネクタを提供することにある。In view of the above-mentioned problems of the prior art, an object of the present invention is to provide a tape connector which can avoid a short circuit between adjacent terminals and can secure a sufficient adhesive force even if the circuit pitch of the adherend is small. To provide.
【０００５】[0005]
【課題を解決するための手段】本発明は、ホットメルト
系接着剤中に導電性フィラーを含有する異方性導電テー
プ層の上に、前記ホットメルト系接着剤に対して流動性
が高いホットメルト系接着剤中に前記導電性フィラーよ
りも小径の絶縁性フィラーを含有する絶縁テーブ層を設
けてなるものである。According to the present invention, a hot melt adhesive having a high fluidity is provided on an anisotropic conductive tape layer containing a conductive filler in the hot melt adhesive. An insulating tape layer containing an insulating filler having a diameter smaller than that of the conductive filler is provided in the melt adhesive.
【０００６】[0006]
【作用】被着体である電子部品を回路基板上に実装する
時に上記の構成のテープコネクタを被着体と回路基板間
において加圧，加熱すると、相対的に流動性が高い絶縁
テープ層が横方向に流れ出し、電子部品と基板の回路間
に異方性導電テープ層の導電性フィラーが位置するよう
になってそれらの回路間の接続が行われる。この場合、
加工時（加圧，加熱）に異方性導電テープ層が横方向に
流れださないために導電性フィラの二次凝集を防ぐこと
ができ、横方向の回路間のショートが防止される。すな
わち、導電性フィラーの均一な分散状態が保たれたまま
回路間の接続が行われる。一方、絶縁テープ層は加工時
に横方向に流れだすために横方向の回路間の凹部に接着
剤が十分に充填されることになって接着固定力も十分な
ものとなる。When an electronic component, which is an adherend, is mounted on a circuit board, when the tape connector having the above structure is pressed and heated between the adherend and the circuit board, an insulating tape layer having relatively high fluidity is formed. The conductive filler in the anisotropic conductive tape layer is positioned between the circuits of the electronic component and the substrate so as to flow in the lateral direction, and the connection between these circuits is made. in this case,
Since the anisotropic conductive tape layer does not flow laterally during processing (pressurization, heating), secondary aggregation of the conductive filler can be prevented, and short circuits between circuits in the lateral direction can be prevented. That is, the circuits are connected while maintaining a uniform dispersed state of the conductive filler. On the other hand, since the insulating tape layer flows out in the lateral direction during processing, the adhesive is sufficiently filled in the concave portions between the circuits in the lateral direction, and the adhesive fixing force is also sufficient.
【０００７】[0007]
【実施例】図１は本発明の実施例のテープコネクタの断
面図を示す。図に示すように、この電子部品接続用テー
プコネクタは、二層構造からなり、導電性フィラーを含
む異方性導電テープ層１２の上に、絶縁性フィラーを含
む絶縁テープ層１４を設けて構成されている。異方性導
電テープ層１２内に含有される導電性フィラー１３は絶
縁テープ層１４内に含有される絶縁性フィラー１５に比
較して粒子径が約３〜５倍に設定されている。具体的に
は、テープコネクタ１１の全体の厚さを２０μｍに設定
し、異方性導電テープ層１２の厚さを１０μｍに設定
し、導電性フィラ１３の系を５μｍ〜１０μｍに設定
し、絶縁性フィラア１５の系を１〜３μｍに設定する。
絶縁性フィラー１５の分散する量は導電性フィラー１３
の量に比べて多い。また、導電テープ層１２と絶縁テー
プ層１４は共にエポキシ系樹脂接着剤で構成されるが、
絶縁テープ層１４の流動性が導電テープ層１２のそれに
比較して高くなるように公知の方法で調整される。1 is a sectional view of a tape connector according to an embodiment of the present invention. As shown in the figure, this electronic component connecting tape connector has a two-layer structure, and an insulating tape layer 14 containing an insulating filler is provided on an anisotropic conductive tape layer 12 containing a conductive filler. Has been done. The particle size of the conductive filler 13 contained in the anisotropic conductive tape layer 12 is set to about 3 to 5 times that of the insulating filler 15 contained in the insulating tape layer 14. Specifically, the total thickness of the tape connector 11 is set to 20 μm, the thickness of the anisotropic conductive tape layer 12 is set to 10 μm, and the system of the conductive filler 13 is set to 5 μm to 10 μm. The system of sex filler 15 is set to 1 to 3 μm.
The amount of the insulating filler 15 dispersed is determined by the conductive filler 13
Compared to the amount of. The conductive tape layer 12 and the insulating tape layer 14 are both made of an epoxy resin adhesive,
The insulating tape layer 14 is adjusted by a known method so that the fluidity of the insulating tape layer 14 becomes higher than that of the conductive tape layer 12.
【０００８】上記の構成のテープコネクタ１１を使用し
て基板上にＬＣＤ４を実装した時の状態を図２に示し、
ＬＳＩチップ２１を実装した時の状態を図３に示す。い
ずれの場合も、基板上にテープコネクタを載せ、ＬＣＤ
４またはＬＳＩチップ２１の被着体の位置合わせを行っ
て加圧，加熱を行うことによって接着する。FIG. 2 shows a state in which the LCD 4 is mounted on the substrate by using the tape connector 11 having the above structure.
FIG. 3 shows a state in which the LSI chip 21 is mounted. In either case, place the tape connector on the board and
4 or the adherend of the LSI chip 21 is positioned and adhered by applying pressure and heat.
【０００９】図２に示す例では、加工時に流動性の高い
絶縁テープ層１４が横方向に流れ出し、加圧が集中する
回路面において導電性フィラー１３が絶縁テープ層１４
を破って回路同士を確実に接続する。一方、加圧のかか
らない横方向の回路間では絶縁性フィラー１５が保持さ
れるために、隣接端子間のショートが防がれる。しか
も、この間では接着剤の層が十分であるために隙間なく
充填され接着強度も十分に保持される。In the example shown in FIG. 2, the insulating tape layer 14 having a high fluidity flows out laterally during processing, and the conductive filler 13 forms the insulating tape layer 14 on the circuit surface where the pressure is concentrated.
Break and connect the circuits securely. On the other hand, since the insulating filler 15 is held between the circuits in the lateral direction where pressure is not applied, a short circuit between adjacent terminals is prevented. In addition, since the adhesive layer is sufficient during this period, the adhesive layer is filled without any gap and the adhesive strength is sufficiently maintained.
【００１０】また、ＬＳＩチップ２１を実装した図３に
示す例では、加工時に、加圧が集中する回路面（ＬＳＩ
チップ２１の回路２３と基板の回路３）では、導電性フ
ィラー１３が絶縁テープ層１４を突き破って接続が保持
される。一方、加圧のかからない部分では、すなわち、
回路３の間では接着剤が十分にあるために十分な強度を
保持できる。また、ＬＳＩチップの場合ＬＳＩベース２
２の端部のエッジ部２２ａが絶縁処理されていないため
に、このエッジ部２２ａとそれに対向する回路３との間
でショートが生じないようにする必要があるが、本実施
例ではこの間に絶縁性フィラー１５の含有された層が保
持されるためにこのＬＳＩエッジショートを防ぐことが
できる。Further, in the example shown in FIG. 3 in which the LSI chip 21 is mounted, the circuit surface (LSI
In the circuit 23 of the chip 21 and the circuit 3) of the substrate, the conductive filler 13 breaks through the insulating tape layer 14 and the connection is maintained. On the other hand, in the part where pressure is not applied, that is,
Since there is sufficient adhesive between the circuits 3, sufficient strength can be maintained. In the case of an LSI chip, the LSI base 2
Since the edge portion 22a at the end of No. 2 is not insulated, it is necessary to prevent a short circuit from occurring between the edge portion 22a and the circuit 3 facing it, but in this embodiment, insulation is provided between them. Since the layer containing the conductive filler 15 is retained, this LSI edge short circuit can be prevented.
【００１１】[0011]
【発明の効果】加圧，加熱時に絶縁テープ層が異方性導
電テープに比較してより流動することによって異方性導
電テープ層内の導電性フィラーの均一な分散状態を保持
したまま回路間の接続を行うことができる。すなわち、
回路間のショートが生じない。EFFECTS OF THE INVENTION The insulating tape layer is more fluid than the anisotropic conductive tape during pressurization and heating, so that the conductive filler in the anisotropic conductive tape layer is maintained in a uniform dispersed state between the circuits. Connection can be made. That is,
Short circuit does not occur.
【００１２】また、絶縁層テープは流動性があるために
加圧力も小さくてよい。また、加工時に横方向に流動し
た絶縁性フィラーを含む接着剤が横方向の回路間に充填
することになるためこの部分において十分な接着力を保
持できる。Further, since the insulating layer tape has fluidity, the pressing force may be small. Further, since the adhesive containing the insulating filler that has flowed in the lateral direction during processing is filled between the circuits in the lateral direction, a sufficient adhesive force can be maintained in this portion.
【図１】本発明の実施例の構成図を示す。FIG. 1 shows a block diagram of an embodiment of the present invention.
【図２】本発明の実施例のテープコネクタをＬＣＤ実装
に使用した場合の接続部の断面図を示す。FIG. 2 is a sectional view of a connecting portion when the tape connector according to the embodiment of the present invention is used for LCD mounting.
【図３】本発明の実施例のテープコネクタをＬＳＩチッ
プ実装に使用した場合の接続部の断面図を示す。FIG. 3 is a sectional view of a connecting portion when the tape connector according to the embodiment of the invention is used for mounting an LSI chip.
【図４】ＬＳＩ及びＬＣＤを回路基板に実装する時の実
装概念図を示す図FIG. 4 is a diagram showing a mounting conceptual diagram when mounting an LSI and an LCD on a circuit board.
【図５】従来のテープコネクタを使用してＬＣＤ実装を
行った場合の接続部の断面を示す図FIG. 5 is a view showing a cross section of a connection portion when an LCD is mounted using a conventional tape connector.
【図６】従来のテープコネクタの構造図を示す図FIG. 6 is a view showing a structural diagram of a conventional tape connector.
【図７】回路パターンが精細ピッチにある基板に対して
従来のテープコネクタを使用してＬＣＤ実装を行った場
合の接続部の断面を示す図FIG. 7 is a diagram showing a cross section of a connection portion when LCD mounting is performed using a conventional tape connector on a substrate having a fine circuit pattern.
【図８】改良された従来のテープコネクタの構造を示す
図FIG. 8 is a view showing the structure of an improved conventional tape connector.
【図９】上記改良された従来のテープコネクタを使用し
てＬＣＤ実装を行った場合の接続部の断面を示す図FIG. 9 is a view showing a cross section of a connecting portion when an LCD is mounted using the improved conventional tape connector.
１１−テープコネクタ １２−異方性導電テープ層 １３−導電性フィラー １４−絶縁テープ層 １５−絶縁性フィラー 11-tape connector 12-anisotropic conductive tape layer 13-conductive filler 14-insulating tape layer 15-insulating filler
Claims (1)
を含有する異方性導電テープ層の上に、前記ホットメル
ト系接着剤に対して流動性が高いホットメルト系接着剤
中に前記導電性フィラーよりも小径の絶縁性フィラーを
含有する絶縁テーブ層を設けてなる、電子部品接続用テ
ープコネクタ。Claim: What is claimed is: 1. A hot melt adhesive having a high fluidity with respect to the hot melt adhesive on an anisotropic conductive tape layer containing a conductive filler in the hot melt adhesive. A tape connector for connecting electronic parts, comprising an insulating tape layer containing an insulating filler having a diameter smaller than that of the conductive filler in the adhesive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3164482A JPH0513119A (en) | 1991-07-04 | 1991-07-04 | Tape connector for connecting electronic parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3164482A JPH0513119A (en) | 1991-07-04 | 1991-07-04 | Tape connector for connecting electronic parts |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0513119A true JPH0513119A (en) | 1993-01-22 |
Family
ID=15794014
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3164482A Pending JPH0513119A (en) | 1991-07-04 | 1991-07-04 | Tape connector for connecting electronic parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0513119A (en) |
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07175077A (en) * | 1993-12-17 | 1995-07-14 | Nec Corp | Structure of liquid crystal display element and its production |
| WO1996042107A1 (en) * | 1995-06-13 | 1996-12-27 | Hitachi Chemical Company, Ltd. | Semiconductor device, wiring board for mounting semiconductor and method of production of semiconductor device |
| JPH09162229A (en) * | 1995-12-04 | 1997-06-20 | Matsushita Electric Ind Co Ltd | Semiconductor unit and method of packaging semiconductor chip |
| WO1998028788A1 (en) * | 1996-12-24 | 1998-07-02 | Nitto Denko Corporation | Manufacture of semiconductor device |
| JPH11195860A (en) * | 1997-12-27 | 1999-07-21 | Canon Inc | Bonding member, multichip module with the bonding member and bonding method using the bonding member |
| JP2000113919A (en) * | 1998-08-03 | 2000-04-21 | Sony Corp | Electrical connection device and electrically connecting method |
| WO2000045430A1 (en) * | 1999-01-29 | 2000-08-03 | Matsushita Electric Industrial Co., Ltd. | Electronic parts mounting method and device therefor |
| WO2000049652A1 (en) * | 1999-02-18 | 2000-08-24 | Seiko Epson Corporation | Bonding material, semiconductor device, method of manufacturing semiconductor device, circuit board and electronic device |
| JP2003045515A (en) * | 2001-07-31 | 2003-02-14 | Hitachi Chem Co Ltd | Adhesive for connecting circuits, and circuit connecting method and connection structure using the same |
| MY119795A (en) * | 1997-04-02 | 2005-07-29 | Nitto Denko Corp | Process for the production of semiconductor device |
| JP2008022036A (en) * | 2007-10-03 | 2008-01-31 | Hitachi Chem Co Ltd | Connection member, connection structure of electrode using the same, and connection method |
| JP2008022037A (en) * | 2007-10-03 | 2008-01-31 | Hitachi Chem Co Ltd | Connection member, connection structure of electrode using the same, and connection method |
| JP2008071748A (en) * | 2006-08-16 | 2008-03-27 | Sony Chemical & Information Device Corp | Connecting method |
| JP2008147473A (en) * | 2006-12-12 | 2008-06-26 | Matsushita Electric Ind Co Ltd | Electrode connection method and electrode connection structure |
| JP2011109156A (en) * | 2011-03-11 | 2011-06-02 | Asahi Kasei E-Materials Corp | Connection structure |
| KR20170038916A (en) * | 2014-11-17 | 2017-04-07 | 데쿠세리아루즈 가부시키가이샤 | Anisotropic conductor film |
-
1991
- 1991-07-04 JP JP3164482A patent/JPH0513119A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07175077A (en) * | 1993-12-17 | 1995-07-14 | Nec Corp | Structure of liquid crystal display element and its production |
| WO1996042107A1 (en) * | 1995-06-13 | 1996-12-27 | Hitachi Chemical Company, Ltd. | Semiconductor device, wiring board for mounting semiconductor and method of production of semiconductor device |
| US6223429B1 (en) * | 1995-06-13 | 2001-05-01 | Hitachi Chemical Company, Ltd. | Method of production of semiconductor device |
| KR100290993B1 (en) * | 1995-06-13 | 2001-08-07 | 이사오 우치가사키 | Semiconductor device, wiring board for mounting semiconductor and method of production of semiconductor device |
| JPH09162229A (en) * | 1995-12-04 | 1997-06-20 | Matsushita Electric Ind Co Ltd | Semiconductor unit and method of packaging semiconductor chip |
| US6333206B1 (en) | 1996-12-24 | 2001-12-25 | Nitto Denko Corporation | Process for the production of semiconductor device |
| WO1998028788A1 (en) * | 1996-12-24 | 1998-07-02 | Nitto Denko Corporation | Manufacture of semiconductor device |
| MY119795A (en) * | 1997-04-02 | 2005-07-29 | Nitto Denko Corp | Process for the production of semiconductor device |
| JPH11195860A (en) * | 1997-12-27 | 1999-07-21 | Canon Inc | Bonding member, multichip module with the bonding member and bonding method using the bonding member |
| JP2000113919A (en) * | 1998-08-03 | 2000-04-21 | Sony Corp | Electrical connection device and electrically connecting method |
| WO2000045430A1 (en) * | 1999-01-29 | 2000-08-03 | Matsushita Electric Industrial Co., Ltd. | Electronic parts mounting method and device therefor |
| US8007627B2 (en) | 1999-01-29 | 2011-08-30 | Panasonic Corporation | Electronic component mounting method and apparatus |
| US7683482B2 (en) | 1999-01-29 | 2010-03-23 | Panasonic Corporation | Electronic component unit |
| US6926796B1 (en) | 1999-01-29 | 2005-08-09 | Matsushita Electric Industrial Co., Ltd. | Electronic parts mounting method and device therefor |
| WO2000049652A1 (en) * | 1999-02-18 | 2000-08-24 | Seiko Epson Corporation | Bonding material, semiconductor device, method of manufacturing semiconductor device, circuit board and electronic device |
| KR100514425B1 (en) * | 1999-02-18 | 2005-09-14 | 세이코 엡슨 가부시키가이샤 | Bonding material, semiconductor device, method of manufacturing semiconductor device, circuit board and electronic device |
| JP2003045515A (en) * | 2001-07-31 | 2003-02-14 | Hitachi Chem Co Ltd | Adhesive for connecting circuits, and circuit connecting method and connection structure using the same |
| JP4706142B2 (en) * | 2001-07-31 | 2011-06-22 | 日立化成工業株式会社 | Adhesive for circuit connection, circuit connection method using the same, and connection structure |
| JP2008071748A (en) * | 2006-08-16 | 2008-03-27 | Sony Chemical & Information Device Corp | Connecting method |
| JP2008147473A (en) * | 2006-12-12 | 2008-06-26 | Matsushita Electric Ind Co Ltd | Electrode connection method and electrode connection structure |
| JP4648294B2 (en) * | 2006-12-12 | 2011-03-09 | パナソニック株式会社 | Electrode bonding method and electrode bonding structure |
| JP2008022037A (en) * | 2007-10-03 | 2008-01-31 | Hitachi Chem Co Ltd | Connection member, connection structure of electrode using the same, and connection method |
| JP2008022036A (en) * | 2007-10-03 | 2008-01-31 | Hitachi Chem Co Ltd | Connection member, connection structure of electrode using the same, and connection method |
| JP2011109156A (en) * | 2011-03-11 | 2011-06-02 | Asahi Kasei E-Materials Corp | Connection structure |
| KR20170038916A (en) * | 2014-11-17 | 2017-04-07 | 데쿠세리아루즈 가부시키가이샤 | Anisotropic conductor film |
| US10026709B2 (en) | 2014-11-17 | 2018-07-17 | Dexerials Corporation | Anisotropic electrically conductive film |
| US10304796B2 (en) | 2014-11-17 | 2019-05-28 | Dexerials Corporation | Anisotropic electrically conductive film having electrically conductive particles disposed in a lattice point region of a planar lattice pattern |
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