JPH07249939A - Synchronizing circuit for oscillator - Google Patents

Abstract

PURPOSE:To reduce the number of transistors(TRs) having low radiating resistance in the case of mutually synchronizing two oscillators. CONSTITUTION:An oscillation pulse (b) from an oscillator 1 is branched to two pulse components by a transformer 2, positive and reverse phase signals (c), (d) are respectively differentiated by capacitors 4, 8 and their positive polarity differential signals are extracted by diodes 5, 9. These extracted signals are OR synthesized by diodes 6, 10 as an ON/OFF signal (e) for one TR 12. The charge of a frequency determining capacitor 15 for an oscillator 16 is reset by turning on/off the TR 12 to execute trigger. Since the radiating resistance of a TR is lower than that of a diode by 1/10 or less, the reduction of TRs is more effective through diodes are increased.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillator synchronizing circuit, and more particularly to an oscillator synchronizing circuit used to prevent noise due to a beat between two oscillators.

[0002]

2. Description of the Related Art FIG. 3 shows an example of a synchronizing circuit of this type of oscillator. In FIG. 3, assuming that the two oscillators 1 and 16 are closely mounted in the mounting panel of the electronic device, it is necessary to prevent the noise due to the beat between these two oscillators, and thus the oscillation output between the two oscillators must be prevented. The circuit having the following configuration is used for synchronization.

Oscillation output (obtained as a rectangular wave) b of the oscillator 1 is branched into two signals via a transformer 2. 1
The two signals are differentiated as a positive phase signal c by a differentiating circuit composed of the resistor 3 and the capacitor 4. Of this differential output, only the positive polarity signal is extracted by the diode 5 and becomes the base input d of the transistor 12 via the resistor 11.

The other signal from the transformer 2 is differentiated as a negative phase signal e by a differentiation circuit composed of the resistor 7 and the capacitor 8. Of this differential output, only the positive-polarity signal is extracted by the diode 9 and passed through the resistor 13 to the transistor 1
4 becomes the base input f.

The collectors of both transistors 12 and 14 are commonly connected to trigger the oscillator 16. Specifically, as shown in the figure, the capacitor 15 of the time constant circuit that determines the oscillation frequency of the oscillator 16 is shown. The charge state of is reset-controlled by turning on / off the transistors 12 and 14.

FIG. 4 is a waveform diagram of each part showing the operation of the circuit of FIG. 3, (a) is a charge / discharge waveform of the capacitor 15 when 16 is asynchronous, and (b) to (g) are each part when synchronized. Signal b
Correspondingly, the waveforms of ~ g are shown.

The oscillation frequency of the oscillator 16 is set to be slightly smaller than that of the oscillator 1.

When the oscillation output b of the oscillator 1 is a rectangular wave signal as shown in (b), the input signals c and e to the resistors 3 and 7 are given.
Becomes a positive / negative phase signal, as shown in (c) and (e).
Of the differential outputs of these signals, only the positive signals d and f are extracted by the diodes 5 and 9 and applied to the bases of the transistors 12 and 14, respectively. The waveforms of these positive polarity signals d and f are as shown in (d) and (f).

Therefore, the transistor 12 is momentarily turned on in synchronization with the rise of the oscillation pulse b of the oscillator 1, and the transistor 14 is momentarily turned on in synchronization with the fall of the oscillation pulse b. Therefore, as shown in the waveform (g), the capacitor 15 is discharged and reset each time these transistors 12 and 14 are turned on.

As a result, the oscillator 16 is triggered by the oscillation output of the oscillator 1, and the two are synchronized.

[0011]

In such a conventional oscillator synchronizing circuit, a trigger signal is generated in response to the forward and reverse signals of the oscillation pulse b, and two transistors are turned on / off by these trigger signals. Because it does
It is necessary to use two transistors with uniform characteristics.

In particular, in a use environment with a large amount of radiation such as a space environment, since the transistor has a radiation resistance of one digit or more lower than that of the diode, it is necessary to shield the transistor, and thus the mounting space is required to be large. This is a factor that prevents miniaturization of the device.

An object of the present invention is to provide a synchronizing circuit for an oscillator, which is capable of reducing the number of transistors having low radiation resistance and improving the characteristics thereof, and which can be miniaturized.

[0014]

According to the present invention, there is provided a synchronous circuit for controlling the first and second oscillators to synchronously oscillate with each other, wherein the oscillation output of the first oscillator is level-shifted in one direction. First trigger signal generating means for generating a first trigger signal in synchronization with the second trigger signal generating means for generating a second trigger signal in synchronization with the transition of the oscillation output to the level in the other direction. An oscillator synchronization circuit characterized by including a combining means for OR-combining these first and second trigger signals, and a transistor which is on / off controlled by the combined output to control the oscillation cycle of the second oscillator. Is obtained.

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention, and the same portions as those in FIG. 3 are designated by the same reference numerals. In the figure,
Oscillation pulses b of the oscillator 1 are transmitted to each other via the transformer 2.
Branched into one signal. One signal is differentiated as a positive phase signal c by a differentiation circuit including the resistor 3 and the capacitor 4. Of this differential output, only a positive polarity signal (a signal synchronized with the transition timing of the pulse b in the positive direction) is extracted by the diode 5 and input to the base of the transistor 12 via the diode 6.

The other signal from the transformer 2 is differentiated as a reverse phase signal d by a differentiation circuit including a resistor 7 and a capacitor 8. Of this differential output, only a positive polarity signal (a signal synchronized with the transition timing of the pulse b in the negative direction) is extracted by the diode 9 and input to the base of the transistor 12 via the diode 10.

The collector output of the transistor 12 triggers the oscillator 16, and the charge state of the capacitor 15 is reset as in the example of FIG.

FIG. 2 is a waveform chart of each part showing the operation of the circuit of FIG. 1, and FIG. 2 (a) shows the capacitor 1 when the oscillator 16 is asynchronous.
5 are waveforms of charge and discharge, and (b) to (f) respectively show the waveforms of the signals b to f at the time of synchronization.

Also in this example, the oscillation frequency of the oscillator 16 is set to be slightly lower than that of the oscillator 1.

When the oscillation output b of the oscillator 1 is a pulse signal as shown in (b), the input signals c and d to the resistors 3 and 7 are given.
Becomes a positive / negative phase signal, and has waveforms shown in (c) and (d). Only the positive polarity signals of the differential outputs of these signals are extracted by the diodes 5 and 9, respectively, and the diodes 6 and 1
OR logic synthesis is performed through 0.

Therefore, the OR logic synthesis output e is (e)
Waveform, and is generated as a trigger signal synchronized with each timing of the positive direction transition and the negative direction transition of the oscillation pulse b.

Since the transistor 12 is on / off controlled in synchronization with the trigger signal e, the charging / discharging waveform of the capacitor 15 becomes as shown in (f) and is synchronized with the pulse b of the oscillator 1.

In the circuit of FIG. 1, as compared with the conventional example of FIG. 3, only one transistor is provided instead of the addition of the OR logic synthesis diodes 6 and 10. As described above, the radiation resistance of a transistor is lower than that of a diode by one digit or more. Therefore, it is advantageous to reduce the number of transistors and reduce the shield, even if the number of diodes is increased.

[0025]

As described above, according to the present invention, since the number of transistors having a low radiation resistance is reduced to one, the shield is reduced accordingly, the mounting space is reduced, the reliability is improved, and the size is reduced. There is an effect that it becomes possible.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 is an operation waveform diagram of each part of the circuit according to the embodiment of the present invention.

FIG. 3 is a diagram showing a synchronization circuit of a conventional oscillator.

FIG. 4 is a diagram showing operation waveforms of respective parts of the circuit of FIG.

[Explanation of symbols]

 1,16 Oscillator 2 Transformer 3,7,11 Resistor 4,8,15 Capacitor 5,6,9,10 Diode 12 Transistor

Claims (4)

[Claims] 1. A synchronous circuit for controlling synchronous oscillation between a first oscillator and a second oscillator, wherein a first trigger signal synchronized with a unidirectional level transition of an oscillation output of the first oscillator is generated. First trigger signal generating means, second trigger signal generating means for generating a second trigger signal in synchronism with the transition of the oscillation output to the other level, and first and second trigger signals And a transistor for controlling the oscillation cycle of the second oscillator by ON / OFF control by the combined output. 2. The oscillator synchronization circuit according to claim 2, wherein the transistor is configured to reset a charged state of a capacitor of a time constant circuit that determines an oscillation cycle of the second oscillator. 3. The first trigger signal generating means, means for differentiating a positive phase signal of an oscillation output of the first oscillator,
Means for selectively deriving a unipolar output from the differential output, the second trigger signal generating means for differentiating a negative phase signal of the oscillation output of the first oscillator, and the differential 3. The oscillator synchronizing circuit according to claim 1, further comprising means for selectively deriving a unipolar output among the outputs. 4. The synthesizing means is composed of a synthesizing circuit including diodes.
A synchronizing circuit for the oscillator according to any one of the above.