JPH0722899Y2 - Muting circuit - Google Patents

Description

[Detailed Description of the Invention] (a) Industrial Application Field The present invention relates to a muting circuit for preventing a shock noise from being generated from an amplifier when the power is turned on, and a special time constant circuit is added. The present invention relates to a muting circuit that can prevent the generation of a shock noise without doing so.

(B) Prior art As shown in FIG. 2, the input capacitor (1) is connected to the positive input terminal.
A front-stage amplifier circuit (3) to which an input signal from an input signal source (2) is applied via a back-end amplifier circuit (4) and an output signal of the front-stage amplifier circuit (3) to a negative input terminal; An amplifier including is known. In this amplifier, an input signal from an input signal source (2) is in-phase amplified by a pre-stage amplification circuit (3) with a gain of "1" and then inverted and amplified by a post-stage amplification circuit (4) with a gain of "G", and an output terminal The output signal amplified in (5) is obtained. The front-stage amplifier circuit (3) and the rear-stage amplifier circuit (4) both amplify the difference voltage between the positive and negative input terminals and generate an output signal at the output terminal.
It is composed of a so-called differential amplifier. That is, the post-stage amplifier circuit (4) is composed of, for example, differentially connected transistors (4a) and (4b) and transistors (4c) and (4d) forming a current mirror circuit as shown in FIG. And an output signal is generated from the collector end of the transistor (4a). However, even if an output signal is obtained from the collector end of the transistor (4b), the transistor (4
Since d) is diode-connected, the transistor (4d) always generates the same current as the collector current of the transistor (4b), and the collector voltage of the transistor (4d) is fixed. Not obtained from (4b). Therefore, the pre-stage and post-stage amplification circuits (3) and (4) are commonly biased by the bias voltage (+ V _B ) applied to the bias terminal (6),
The bias voltage (+ V _B ) rises rapidly when the power is turned on. Therefore, when the power is turned on, the post-stage amplifier circuit (4) is immediately in a stable bias state. On the other hand, the input capacitor (1) is connected to the positive input terminal of the front stage amplifier circuit (3).
, The voltage at the positive input terminal of the preamplifier circuit (3) rises with a time constant determined by the resistors (7) and (8) and the input capacitor (1), and a fixed time elapses after the power is turned on. The output voltage of the pre-stage amplifier circuit (3) becomes a low value. As a result, the voltage of the positive input terminal of the post-stage amplifier circuit (4) becomes higher than the voltage of the negative input terminal, a voltage rapidly rising at the output terminal (5) is generated, and a large shock noise is generated.

In order to prevent the occurrence of the shock noise, it is sufficient to apply the muting to the post-stage amplifier circuit for a fixed time after the power is turned on. Usually, in order to perform the muting, a method of preparing a special time constant circuit and utilizing the time constant of the time constant circuit is adopted. This is described in detail in Japanese Patent Publication No. 59-46441 and Japanese Utility Model Publication No. 59-157321.

(C) Problems to be solved by the device However, providing an extra time constant circuit for muting causes complication of the circuit configuration, especially when the amplifier is integrated into an IC (integrated circuit). Since the capacitor forming the time constant circuit must be externally attached to the IC, this is not a preferable method.

(D) Means for Solving the Problems The present invention has been made in view of the above points, and an inverting muting amplifier circuit is arranged between a front-stage amplifier circuit and a rear-stage amplifier circuit, and an input capacitor is provided. It is characterized by performing muting using the time constant of.

(E) Function According to the present invention, the output voltage of the pre-stage amplifier circuit is kept low during the period from the power is turned on until the input capacitor is charged,
Since the output voltage of the muting amplifier circuit can be maintained high, the voltage of the output terminal can be lowered during the period, and muting can be performed.

(F) Embodiment FIG. 1 shows an embodiment of the present invention. (9) is an input signal source, (10) is a signal source resistance, (11) is an input capacitor, and (12) is a positive input. The input signal from the input signal source (9) and the bias voltage (+
V _B ) is applied and the output signal obtained at its output terminal is fed back to the negative input terminal, (14) is the output signal of the previous amplification circuit (12) and its output to the negative input terminal. The output signal obtained at the terminal is applied and the bias voltage is applied to the positive input terminal.
5) is a post-stage amplification circuit in which the output signal of the muting amplification circuit (14) and the output signal obtained at its own output terminal are applied to the negative input terminal and a bias voltage is applied to the positive input terminal, and (16 ) Is an output terminal from which an amplified output signal is obtained. The front stage amplifier circuit (12) and the rear stage amplifier circuit (15) in FIG. 1 are the same as the front stage amplifier circuit (3) and the rear stage amplifier circuit (4) in FIG.

Next, the operation will be described. The input signal generated from the input signal source (9) is amplified by the pre-stage amplifier circuit (12) having a gain of "1" and applied to the negative input terminal of the muting amplifier circuit (14). The muting amplifier circuit (1
After being inverted and amplified in 4), it is applied to the negative input terminal of the post-stage amplification circuit (15) and further inverted and amplified in the post-stage amplification circuit (15). In that case, if the gain of the muting amplification circuit (14) is “1” and the gain of the post-stage amplification circuit (15) is “G”, or the gain of the muting amplification circuit (14) is “G ₁ ”. , The gain of the post-stage amplification circuit (15) is set to “G ₂ ” and G ₁ ×
If G ₂ = G, the total gain of the amplifier of FIG. 1 and the total gain of the amplifier of FIG. 2 can be made equal.

Next, the operation when the power is turned on will be described with reference to FIG. When the power is turned on at time t ₁ , the power supply voltage immediately rises to + V _CC as shown in FIG.
The bias voltage applied to 3) also immediately rises to + V _B as shown in Fig. 3B. At that time, the pre-stage amplifier circuit (1
The voltage at the positive input terminal of 2) is as shown in Fig. 3 (c) because the input capacitor (11) is in the discharged state. (However, Rg is the resistance value of the signal source resistance (10), R ₁ is the resistance value of the bias resistance (17)), and then C ₁ (R ₁
+ Rg) time constant (where C ₁ is the capacity of the input capacitor (11)) increases to + V _B. Therefore, the pre-stage amplifier circuit (12)
The output voltage of is also as shown in FIG. When the voltage shown in FIG. 3C is applied to the negative input terminal of the muting amplifier circuit (14), the bias voltage (+ V _B ) is applied to the positive input terminal of the muting amplifier circuit (14). Is applied to the muting amplifier circuit (14).
As shown in Fig. 3 (d), the power supply voltage is maintained until the power supply voltage (+ V _CC ) rises at time t ₁ and the output voltage of the pre-stage amplifier circuit (12) rises to near the bias voltage. ,
After reaching the vicinity of the bias voltage, the output voltage V ₂ that starts to fall and converges to the bias voltage is obtained. Then,
When the voltage shown in FIG. 3 (d) is applied to the negative input terminal, the output voltage of the post-stage amplifier circuit (15), to which the bias voltage (+ V _B ) is applied to the positive input terminal, is at time t ₁ . It becomes zero, and that state continues until the output voltage of the muting amplifier circuit (14) drops to + V _B. At time t ₂ , when the output voltage of the muting amplifier circuit (14) reaches approximately the bias voltage (+ V _B ), the output voltage of the post-stage amplifier circuit (15) becomes negative as shown in FIG. The feedback operation gradually starts increasing and reaches a predetermined value V ₂ . The predetermined value V ₂ is a value determined by a design value when the latter-stage amplifier circuit (15) is achieved. Therefore, the voltage obtained at the output terminal (16) becomes zero during the period from power-on (time t ₁ ) to time t ₂ , and that time becomes the muting time. The muting time depends on the capacitance of the input capacitor (11) and the bias resistance (1
Since it depends on the resistance value of 7), the capacitance or resistance value may be increased when the muting time is lengthened, and may be decreased when the muting time is shortened. Normally, the muting time is about 1 second, so that the muting can be performed correctly if the capacitance and resistance values are properly set.

(G) Effect of the Invention As described above, according to the present invention, it is possible to provide a muting circuit capable of preventing a shock noise at power-on without providing a time constant circuit for defining a time constant. In particular, since an external capacitor is not particularly required, if the muting circuit according to the present application is used for an IC integrated amplifier, it is possible to reduce external elements and external pins.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional amplifier, and FIGS. 3 (a) to 3 (e) are characteristic diagrams for explaining the present invention. 4 and FIG. 4 are specific circuit examples of conventional amplifier circuits. Explanation of main figure numbers (11) …… Input capacitor, (12) …… Pre-stage amplifier circuit,
(14) …… Muting amplifier circuit, (15) …… Post-stage amplifier circuit, (17) …… Bias resistor.

Claims (1)

[Scope of utility model registration request] 1. A muting circuit for preventing shock noise from being generated from an amplifier when power is turned on, the muting circuit having positive and negative input terminals and an output terminal, wherein an input signal is input to a positive input terminal via an input capacitor. A front-stage amplifier circuit in which a bias voltage is applied to the positive input terminal and its output signal is negatively fed back to the negative input terminal; and an output signal of the front-stage amplifier circuit is applied to the negative input terminal and Of the muting amplifier circuit whose output signal is negatively fed back to the negative input terminal and a bias voltage is applied to the positive input terminal, and the output signal of the muting amplifier circuit is applied to the negative input terminal and A muting circuit comprising a post-stage amplification circuit in which an output signal is negatively fed back to the negative input terminal and a bias voltage is applied to the positive input terminal.