JPH07226593A - Multilayer wiring board and its manufacture - Google Patents

Multilayer wiring board and its manufacture

Info

Publication number
JPH07226593A
JPH07226593A JP1650394A JP1650394A JPH07226593A JP H07226593 A JPH07226593 A JP H07226593A JP 1650394 A JP1650394 A JP 1650394A JP 1650394 A JP1650394 A JP 1650394A JP H07226593 A JPH07226593 A JP H07226593A
Authority
JP
Japan
Prior art keywords
circuit
wiring board
multilayer wiring
copper foil
insulating adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1650394A
Other languages
Japanese (ja)
Inventor
Teiichi Inada
禎一 稲田
義之 ▲つる▼
Yoshiyuki Tsuru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP1650394A priority Critical patent/JPH07226593A/en
Publication of JPH07226593A publication Critical patent/JPH07226593A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To realize molding property improvement, surface flatness and thinness of a multilayer wiring board and to improve reliability of interlaminar connection and heat dissipation of a substrate by arranging a filler in a recessed part between circuits of a multilayer wiring board wherein an insulation bonding material and a circuit layer are laminated at least once on a circuit board. CONSTITUTION:After a recessed part filler 3 is printed or applied to a necessary part of a circuit board 1 or all over there by using a screen print method, etc., it is dried and set. In a process for laminating a copper foil 2 with an insulation bonding material which is bored in advance, polishing is carried out form removing the recessed part filler 3 on a conductor circuit of the circuit board 1 wherein the recessed part filler 3 is printed or applied in advance. After they are laminated and integrated, interlaminar connection can be carried out by conductive paste, etc., if necessary. Thereafter, an insulation bonding material 2b is bored by chemical etching by using sulfonic acid. A conductor circuit is formed by forming etching resist and removing unnecessary copper.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、多層配線板とその製造
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board and its manufacturing method.

【0002】[0002]

【従来の技術】近年、多層配線板の高密度化、薄型化が
進展し、薄物ガラス−エポキシプリプレグを回路基板の
間に挟んで積層多層化する方法、もしくはガラスクロス
を使用しないで、可とう性を有するシート状接着材料を
回路基板の間に挟んで積層多層化する多層配線板製造法
が検討されている。また、隣接する配線層のみ接続を行
う、いわゆるインタースティシャルバイアホールを形成
する方法が検討されている。このような例として、特開
平5−259649号公報に開示されているように、層
間接続用穴を予め明けた絶縁接着材料付き銅箔を回路基
板に積層する方法がある。
2. Description of the Related Art In recent years, multi-layer wiring boards have been made higher in density and thinner, and a method of laminating a thin glass-epoxy prepreg between circuit boards to form a multi-layer structure or using no glass cloth is possible. A multilayer wiring board manufacturing method has been studied in which a sheet-like adhesive material having a property is sandwiched between circuit boards to form a multilayer structure. Further, a method of forming a so-called interstitial via hole in which only adjacent wiring layers are connected has been studied. As such an example, as disclosed in Japanese Patent Laid-Open No. 5-259649, there is a method of laminating a copper foil with an insulating adhesive material in which a hole for interlayer connection is preliminarily formed on a circuit board.

【0003】[0003]

【発明が解決しようとする課題】上記した従来技術のう
ち、薄物ガラス−エポキシプリプレグを使用して積層多
層化する方法については、樹脂の流動量が十分でないた
め、成形性、回路充填性が十分でないという課題があ
る。また、可とう性を有するシート状接着材料を回路基
板の間に挟んで多層化する方法についても、回路銅箔の
厚さが35μm以上になると、回路充填性が十分でない
という課題がある。さらにまた、層間接続用穴を予め明
けた絶縁接着材料付き銅箔を、回路基板に積層する方法
では、特に回路の厚さが35μm以上の場合には、回路
充填性の向上と、層間接続用穴からの絶縁接着材料の流
動量低減の両立が難しいという課題がある。
Among the above-mentioned prior arts, the method of laminating and laminating using thin glass-epoxy prepreg has insufficient moldability and circuit filling because the resin flow amount is not sufficient. There is a problem that is not. Further, also in the method of sandwiching a flexible sheet-shaped adhesive material between circuit boards to form a multilayer, there is a problem that the circuit filling property is not sufficient when the thickness of the circuit copper foil is 35 μm or more. Furthermore, in a method of laminating a copper foil with an insulating adhesive material, in which holes for interlayer connection are preliminarily drilled, on a circuit board, especially when the thickness of the circuit is 35 μm or more, improvement of circuit filling property and interlayer connection There is a problem that it is difficult to reduce the flow rate of the insulating adhesive material through the holes.

【0004】[0004]

【課題を解決するための手段】本発明の多層配線板は、
回路基板上に絶縁接着材料と回路層を少なくとも1回以
上積層した多層配線板において、回路間の凹部に充填材
を有することを特徴とする。
The multilayer wiring board of the present invention comprises:
A multilayer wiring board in which an insulating adhesive material and a circuit layer are laminated at least once on a circuit board is characterized by having a filling material in the concave portion between the circuits.

【0005】このような多層配線板は、以下に示す工程
によって、製造することができる。 (a)回路基板上全面に、カミケルエッチング可能な樹
脂層を形成する工程 (b)予め必要な箇所に穴をあけた、絶縁性接着剤層付
き銅箔を、その絶縁性接着剤層と前記樹脂とが接するよ
うに重ね、積層一体化する工程 (c)穴から露出した前記樹脂を、ケミカルエッチング
して除去する工程 (d)外層の銅箔と穴から露出した回路との接続、及び
外層の銅箔を加工して表面回路を形成する工程 (e)必要な回路層数に応じて前記工程(a)から
(d)を繰り返す工程
Such a multilayer wiring board can be manufactured by the following steps. (A) A step of forming a resin layer that can be Kamikel-etched on the entire surface of the circuit board. (B) A copper foil with an insulating adhesive layer, in which holes are preliminarily formed at necessary locations, is used as the insulating adhesive layer. Step of stacking and stacking so as to be in contact with the resin so as to be laminated and integrated (c) Step of removing the resin exposed from the hole by chemical etching (d) Connection between the outer layer copper foil and the circuit exposed from the hole, and Step of processing outer layer copper foil to form surface circuit (e) Step of repeating steps (a) to (d) according to the required number of circuit layers

【0006】本発明に用いる回路基板は、ガラス布−エ
ポキシ樹脂を用いた銅張り積層板、紙−フェノール樹脂
を用いた銅張り積層板、金属ベース基板、金属コア基
板、等を用いることができる。
The circuit board used in the present invention may be a glass cloth-copper-clad laminate using epoxy resin, a paper-copper-clad laminate using phenol resin, a metal base substrate, a metal core substrate, or the like. .

【0007】凹部充填材の組成は、絶縁信頼性が良好で
あるならば特に制限するものではないが、例えばエポキ
シ樹脂系、フェノール樹脂系を用いることができる。ま
た、これらの樹脂系と無機フィラーとの混合物も用いる
ことができる。このような無機フィラーとしては、シリ
カ、アルミナ等がある。また、重点剤に、市販の熱硬化
型ソルダーレジストCCR−506GTH(アサヒ化研
株式会社製、商品名)、紫外線硬化型ソルダーレジスト
PSR−4000(アサヒ化研株式会社製、商品名)等
を用いても良い。
The composition of the recess filling material is not particularly limited as long as the insulation reliability is good, but for example, an epoxy resin type or a phenol resin type can be used. Also, a mixture of these resin systems and an inorganic filler can be used. Examples of such inorganic fillers include silica and alumina. In addition, commercially available thermosetting solder resist CCR-506GTH (manufactured by Asahi Kaken Co., Ltd.), UV curable solder resist PSR-4000 (manufactured by Asahi Kaken Co., Ltd.), etc. are used as the focus agents. May be.

【0008】絶縁性接着剤は、ガラス−エポキシプリプ
レグ、可とう性付与成分を含むフィルム状接着材料を用
いることができ、可とう性を付与する材料としては、フ
ェノキシ等の高分子量エポキシ樹脂、アクリルゴム、ア
クリロニトリルゴム等のゴム材料、及び、特開平4−1
20122号公報、特開平4−120123号公報、特
開平4−120124号公報、特開平4−120125
号公報、特開平4−122713号公報、または特開平
4−122714号公報に開示されている高分子量エポ
キシ樹脂あるいは超高分子量エポキシ樹脂等をもちいる
ことができる。
As the insulating adhesive, a glass-epoxy prepreg or a film-like adhesive material containing a flexibility imparting component can be used. As the material imparting flexibility, a high molecular weight epoxy resin such as phenoxy or acrylic is used. Rubber materials such as rubber and acrylonitrile rubber, and JP-A-4-1-1
201222, JP 4-120123 A, JP 4-120124 A, JP 4-120125 A.
The high molecular weight epoxy resin or the ultrahigh molecular weight epoxy resin disclosed in Japanese Patent Laid-Open No. 4-122713, or Japanese Patent Laid-Open No. 4-122714 can be used.

【0009】絶縁製接着剤は、特に制限するものではな
いが、エポキシ樹脂系絶縁接着材料、これらを銅箔に塗
布したものが使用でき、これらの絶縁接着材料をフィル
ム化したものと銅箔を積層一体化したものを用いること
もできる。
The insulating adhesive is not particularly limited, but an epoxy resin-based insulating adhesive material or a copper foil coated with these can be used, and a film of these insulating adhesive materials and a copper foil can be used. It is also possible to use a laminated and integrated product.

【0010】凹部充填材及びもしくは絶縁接着材料にア
ルミナ、窒化アルミ、窒化ホウ素等の高放熱性の無機フ
ィラーを含有せしめることにより、多層配線板の放熱性
を向上させることができ、放熱性の高い回路基板と組み
合わせることにより、放熱性を向上する上で好ましい。
By incorporating a highly heat-dissipating inorganic filler such as alumina, aluminum nitride, or boron nitride in the recess filling material and / or the insulating adhesive material, the heat dissipation of the multilayer wiring board can be improved and the heat dissipation is high. Combining with a circuit board is preferable for improving heat dissipation.

【0011】本発明の製造法において、凹部充填材の印
刷、または塗工方法は、スクリーン印刷法、カーテンコ
ート法、スキージを用いた塗布法等があり、これらの方
法を用いて、回路基板の必要部分あるいは全面に印刷も
しくは塗布を行った後、乾燥、硬化を行う。この凹部充
填材の量は、凹部を埋めるに十分な量を印刷もしくは塗
布する必要がある。
In the manufacturing method of the present invention, the method for printing or coating the recess filling material includes a screen printing method, a curtain coating method, a coating method using a squeegee, and the like. After printing or coating on a required portion or the entire surface, drying and curing are performed. The amount of the recess filling material needs to be printed or applied in an amount sufficient to fill the recess.

【0012】予め穴明け加工を施した絶縁接着材料付き
銅箔を積層する工程では、予め凹部充填材を印刷または
塗布した回路基板の、導体回路上の凹部充填材を取り除
くために研磨を行い、積層一体化した後、必要に応じ
て、導電ペースト、めっき、ワイヤボンディング等によ
り層間接続を行うことができる。
In the step of laminating the copper foil with the insulating adhesive material which has been preliminarily perforated, the circuit board on which the recess filler is printed or applied is polished to remove the recess filler on the conductor circuit. After stacking and integrating, interlayer connection can be performed by a conductive paste, plating, wire bonding or the like, if necessary.

【0013】この絶縁接着剤を積層したのち、ケミカル
エッチングにより絶縁接着材料に穴明けする方法として
は、エッチング液として、スルホン酸類を用いることに
よって行うことができる。
A method of forming holes in the insulating adhesive material by chemical etching after laminating this insulating adhesive can be carried out by using sulfonic acids as an etching solution.

【0014】積層方法については、プレス、真空プレ
ス、ホットロールラミネータ、真空ラミネータ等を使用
することができる。
As a lamination method, a press, a vacuum press, a hot roll laminator, a vacuum laminator or the like can be used.

【0015】回路の形成は、エッチングレジストを形成
し、不要な銅をエッチング除去して、基板の必要な箇所
に導体回路を形成する。
To form a circuit, an etching resist is formed, unnecessary copper is removed by etching, and a conductor circuit is formed at a necessary portion of the substrate.

【0016】[0016]

【作用】回路間の凹部を充填剤により平坦化を行った
後、接着材料を積層することによって多層配線板を構成
することにより、多層配線板の成形性向上、表面平坦
化、薄型化を図ることができる。
The multilayer wiring board is formed by flattening the recesses between the circuits with the filler and then laminating the adhesive material to improve the formability, surface flattening and thinning of the multilayer wiring board. be able to.

【0017】多層配線板において、回路間の凹部を樹脂
により平坦化を行った後、予め層間接続を行う部分に穴
明け加工を施した絶縁接着材料付き銅箔もしくは接着材
料を積層することによって、層間接続の信頼性を向上す
ることができる。
In the multi-layer wiring board, the recesses between the circuits are flattened with a resin, and then a copper foil with an insulating adhesive material or a bonding material, which has been subjected to perforation processing, is laminated in advance at a portion where the interlayer connection is made. The reliability of interlayer connection can be improved.

【0018】凹部充填材及びもしくは絶縁接着材料に、
高熱伝導の無機フィラーを含むことにより、基板の放熱
性を向上することができる。
For the recess filling material and / or the insulating adhesive material,
The inclusion of the high thermal conductive inorganic filler can improve the heat dissipation of the substrate.

【0019】[0019]

【実施例】【Example】

実施例1 (1)銅箔の厚さが35μmである配線板にソルダーレ
ジストCCR−506GTH(アサヒ化研株式会社製、
商品名)を乾燥、硬化後の膜厚が35μmになるように
印刷した後、160℃にて10分乾燥硬化する。 (2)低分子エポキシ樹脂を高分子量エポキシ樹脂を主
成分とするシート状絶縁接着材料(厚さ100μm)
を、前記の凹部充填材料を印刷した配線板2枚の間に挟
んで加熱加圧一体化する。 (3)ドリル穴明け及び、スルーホールめっきにより、
層間接続を行う。
Example 1 (1) Solder resist CCR-506GTH (manufactured by Asahi Kaken Co., Ltd., on a wiring board having a copper foil thickness of 35 μm)
(Trade name) is printed so that the film thickness after drying and curing is 35 μm, and then dried and cured at 160 ° C. for 10 minutes. (2) Sheet-shaped insulating adhesive material (thickness 100 μm) whose main component is low-molecular epoxy resin
Is sandwiched between two wiring boards printed with the above-mentioned recess filling material, and integrated under heating and pressure. (3) By drilling and through-hole plating,
Perform interlayer connection.

【0020】実施例2 (1)銅箔の厚さが70μmである配線板にソルダーレ
ジストCCR−506GTH(アサヒ化研株式会社製、
商品名)を乾燥、硬化後の膜厚が70μmになるように
印刷した後、160℃にて10分乾燥硬化する。 (2)回路銅箔上のソルダーレジストを研磨により除去
する。 (3)低分子エポキシ樹脂を、高分子量エポキシ樹脂を
主成分とする絶縁接着材料(厚さ50μm)付き銅箔
の、層間接続を行う部所にパンチングで穴明けを行い、
これと前記の凹部充填材料を印刷した配線板を加熱加圧
一体化する。 (4)めっきにより、層間接続を行う。 (5)不要な銅箔をエッチング除去し、回路パターンを
形成する。
Example 2 (1) Solder resist CCR-506GTH (manufactured by Asahi Kaken Co., Ltd., on a wiring board having a copper foil thickness of 70 μm,
(Trade name) is printed so that the film thickness after drying and curing is 70 μm, and then dried and cured at 160 ° C. for 10 minutes. (2) The solder resist on the circuit copper foil is removed by polishing. (3) A low-molecular epoxy resin is punched at a portion of the copper foil with an insulating adhesive material (thickness 50 μm) containing a high-molecular-weight epoxy resin as a main component to perform interlayer connection by punching,
This and the wiring board printed with the recess filling material are integrated under heating and pressure. (4) The layers are connected by plating. (5) Unnecessary copper foil is removed by etching to form a circuit pattern.

【0021】実施例3 ソルダーレジストを、スクリーン印刷法を用いて塗布す
る他は、実施例2と同様に行う。
Example 3 The same procedure as in Example 2 is carried out except that the solder resist is applied by the screen printing method.

【0022】実施例4 (1)銅箔の厚さが70μmであるアルミベース配線板
にソルダーレジストCCR−506GTH(アサヒ化研
株式会社製、商品名)を乾燥、硬化後の膜厚が70μm
になるように印刷した後、160℃にて10分乾燥硬化
する。 (2)回路銅箔上のソルダーレジストを研磨により除去
する。 (3)低分子エポキシ樹脂を、アルミナフィラーを主成
分とする絶縁接着材料(厚さ50μm)付き銅箔の、層
間接続を行う部所にパンチングで穴明けを行い、これと
前記の凹部充填材料を印刷した配線板を、加熱加圧して
積層一体化する。 (4)めっきにより、層間接続を行う。 (5)不要な銅箔をエッチング除去し、回路パターンを
形成する。
Example 4 (1) Solder resist CCR-506GTH (trade name, manufactured by Asahi Kaken Co., Ltd.) was dried and cured to a thickness of 70 μm on an aluminum base wiring board having a copper foil thickness of 70 μm.
After that, it is dried and cured at 160 ° C. for 10 minutes. (2) The solder resist on the circuit copper foil is removed by polishing. (3) A low-molecular epoxy resin is punched at a place where interlayer connection is made in a copper foil with an insulating adhesive material (thickness 50 μm) containing alumina filler as a main component, and this and the above-mentioned recess filling material. The wiring board printed with is heated and pressed to be laminated and integrated. (4) The layers are connected by plating. (5) Unnecessary copper foil is removed by etching to form a circuit pattern.

【0023】比較例1 凹部充填材料によって、回路間の凹部の充填を行わない
他は、実施例1と同様に行う。
Comparative Example 1 The same procedure as in Example 1 was performed except that the recesses between the circuits were not filled with the recess filling material.

【0024】比較例2 凹部充填材料によって、回路間の凹部の充填を行わない
他は、実施例2と同様に行う。
Comparative Example 2 The same procedure as in Example 2 was carried out except that the recesses between the circuits were not filled with the recess filling material.

【0025】以上に述べたようにして作製した多層配線
板を、評価し、その特性を表1に示す。
The multilayer wiring board produced as described above was evaluated, and its characteristics are shown in Table 1.

【0026】評価の方法は、以下に示す。 (回路充填性)顕微鏡観察を行い、下層銅箔と絶縁接着
材料との間に、直径10μmを越える空隙の発生がない
ものを良好とし、直径が10μm以上の空隙が発生して
いるものを不良とした。 (耐電圧)25℃で、上下の回路間に交流電圧を0Vか
ら始めて、100V/secの速度で上昇し、電流1m
A流れたときに絶縁破壊と定めたときの電圧とした。 (はんだ耐熱性)基板を、260℃のはんだ浴に180
秒間浸漬し、膨れや剥がれのないものを良好とした。
The evaluation method is shown below. (Circuit filling property) Microscopic observation was conducted, and those having no voids having a diameter of more than 10 μm between the lower copper foil and the insulating adhesive material were considered good, and those having voids having a diameter of 10 μm or more were defective. And (Withstand voltage) At 25 ℃, AC voltage between the upper and lower circuits starts from 0V, rises at a speed of 100V / sec, current 1m
A: The voltage was defined as the dielectric breakdown when flowing. (Soldering heat resistance) The substrate is placed in a solder bath at 260 ° C for 180
It was soaked for a second, and those without swelling or peeling were regarded as good.

【0027】[0027]

【表1】 1)耐電圧は上下パターン間で測定。[Table 1] 1) Withstand voltage is measured between upper and lower patterns.

【0028】この結果から、本発明による多層配線板
は、比較例に比べて、表面平坦性の点で優れている。
From these results, the multilayer wiring board according to the present invention is superior in surface flatness to the comparative example.

【0029】[0029]

【発明の効果】以上に説明したように、本発明により、
多層配線板の成形性向上、表面平坦化、薄型化を図るこ
とができ、また、層間接続の信頼性を向上することがで
き、さらにまた、基板の放熱性を向上することもでき
る。
As described above, according to the present invention,
It is possible to improve the formability of the multilayer wiring board, make the surface flat and thin, improve the reliability of interlayer connection, and further improve the heat dissipation of the substrate.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す断面図である。FIG. 1 is a sectional view showing an embodiment of the present invention.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】回路基板上に絶縁接着層と回路層とを少な
くとも1回以上積層した多層配線板において、回路間の
凹部に充填材を有することを特徴とする多層配線板。
1. A multilayer wiring board in which an insulating adhesive layer and a circuit layer are laminated at least once on a circuit board, wherein a filling material is provided in the recesses between the circuits.
【請求項2】以下の工程を含むことを特徴とする多層配
線板の製造方法。 (a)回路基板上全面に、カミケルエッチング可能な樹
脂層を形成する工程 (b)予め必要な箇所に穴をあけた、絶縁性接着剤層付
き銅箔を、その絶縁性接着剤層と前記樹脂とが接するよ
うに重ね、積層一体化する工程 (c)穴から露出した前記樹脂を、ケミカルエッチング
して除去する工程 (d)外層の銅箔と穴から露出した回路との接続、及び
外層の銅箔を加工して表面回路を形成する工程 (e)必要な回路層数に応じて前記工程(a)から
(d)を繰り返す工程
2. A method for manufacturing a multilayer wiring board, comprising the following steps. (A) A step of forming a resin layer that can be Kamikel-etched on the entire surface of the circuit board. (B) A copper foil with an insulating adhesive layer, in which holes are preliminarily formed at necessary locations, is used as the insulating adhesive layer. Step of stacking and stacking so as to be in contact with the resin so as to be laminated and integrated (c) Step of removing the resin exposed from the hole by chemical etching (d) Connection between the outer layer copper foil and the circuit exposed from the hole, and Step of processing outer layer copper foil to form surface circuit (e) Step of repeating steps (a) to (d) according to the required number of circuit layers
【請求項3】少なくとも、樹脂または絶縁接着剤のいず
れかに、高熱伝導の無機フィラーを含むことを特徴とす
る請求項2に記載の多層配線板の製造方法。
3. The method for manufacturing a multilayer wiring board according to claim 2, wherein at least one of the resin and the insulating adhesive contains a high thermal conductive inorganic filler.
JP1650394A 1994-02-10 1994-02-10 Multilayer wiring board and its manufacture Pending JPH07226593A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1650394A JPH07226593A (en) 1994-02-10 1994-02-10 Multilayer wiring board and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1650394A JPH07226593A (en) 1994-02-10 1994-02-10 Multilayer wiring board and its manufacture

Publications (1)

Publication Number Publication Date
JPH07226593A true JPH07226593A (en) 1995-08-22

Family

ID=11918086

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1650394A Pending JPH07226593A (en) 1994-02-10 1994-02-10 Multilayer wiring board and its manufacture

Country Status (1)

Country Link
JP (1) JPH07226593A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0804061A1 (en) * 1995-11-10 1997-10-29 Ibiden Co, Ltd. Multilayered printed wiring board and its manufacture
CN116456609A (en) * 2023-03-29 2023-07-18 南通威斯派尔半导体技术有限公司 Prefilled ceramic copper-clad ceramic insulator circuit board, power device and preparation method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0804061A1 (en) * 1995-11-10 1997-10-29 Ibiden Co, Ltd. Multilayered printed wiring board and its manufacture
EP0804061A4 (en) * 1995-11-10 2000-01-05 Ibiden Co Ltd Multilayered printed wiring board and its manufacture
CN116456609A (en) * 2023-03-29 2023-07-18 南通威斯派尔半导体技术有限公司 Prefilled ceramic copper-clad ceramic insulator circuit board, power device and preparation method
CN116456609B (en) * 2023-03-29 2024-03-26 南通威斯派尔半导体技术有限公司 Prefilled ceramic copper-clad ceramic insulator circuit board, power device and preparation method

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